1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License as published by 4 * the Free Software Foundation; either version 2 of the License, or 5 * (at your option) any later version. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 * 12 * You should have received a copy of the GNU General Public License 13 * along with this program; if not, write to the Free Software 14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 15 * 16 */ 17 18 /* 19 * 2002-07 Benny Sjostrand benny@hostmobility.com 20 */ 21 22 23 #include <asm/io.h> 24 #include <linux/delay.h> 25 #include <linux/pm.h> 26 #include <linux/init.h> 27 #include <linux/slab.h> 28 #include <linux/vmalloc.h> 29 #include <linux/mutex.h> 30 31 #include <sound/core.h> 32 #include <sound/control.h> 33 #include <sound/info.h> 34 #include <sound/asoundef.h> 35 #include <sound/cs46xx.h> 36 37 #include "cs46xx_lib.h" 38 #include "dsp_spos.h" 39 40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, 41 struct dsp_scb_descriptor * fg_entry); 42 43 static enum wide_opcode wide_opcodes[] = { 44 WIDE_FOR_BEGIN_LOOP, 45 WIDE_FOR_BEGIN_LOOP2, 46 WIDE_COND_GOTO_ADDR, 47 WIDE_COND_GOTO_CALL, 48 WIDE_TBEQ_COND_GOTO_ADDR, 49 WIDE_TBEQ_COND_CALL_ADDR, 50 WIDE_TBEQ_NCOND_GOTO_ADDR, 51 WIDE_TBEQ_NCOND_CALL_ADDR, 52 WIDE_TBEQ_COND_GOTO1_ADDR, 53 WIDE_TBEQ_COND_CALL1_ADDR, 54 WIDE_TBEQ_NCOND_GOTOI_ADDR, 55 WIDE_TBEQ_NCOND_CALL1_ADDR 56 }; 57 58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size, 59 u32 overlay_begin_address) 60 { 61 unsigned int i = 0, j, nreallocated = 0; 62 u32 hival,loval,address; 63 u32 mop_operands,mop_type,wide_op; 64 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 65 66 snd_assert( ((size % 2) == 0), return -EINVAL); 67 68 while (i < size) { 69 loval = data[i++]; 70 hival = data[i++]; 71 72 if (ins->code.offset > 0) { 73 mop_operands = (hival >> 6) & 0x03fff; 74 mop_type = mop_operands >> 10; 75 76 /* check for wide type instruction */ 77 if (mop_type == 0 && 78 (mop_operands & WIDE_LADD_INSTR_MASK) == 0 && 79 (mop_operands & WIDE_INSTR_MASK) != 0) { 80 wide_op = loval & 0x7f; 81 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) { 82 if (wide_opcodes[j] == wide_op) { 83 /* need to reallocate instruction */ 84 address = (hival & 0x00FFF) << 5; 85 address |= loval >> 15; 86 87 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address); 88 89 if ( !(address & 0x8000) ) { 90 address += (ins->code.offset / 2) - overlay_begin_address; 91 } else { 92 snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n"); 93 } 94 95 hival &= 0xFF000; 96 loval &= 0x07FFF; 97 98 hival |= ( (address >> 5) & 0x00FFF); 99 loval |= ( (address << 15) & 0xF8000); 100 101 address = (hival & 0x00FFF) << 5; 102 address |= loval >> 15; 103 104 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address); 105 nreallocated ++; 106 } /* wide_opcodes[j] == wide_op */ 107 } /* for */ 108 } /* mod_type == 0 ... */ 109 } /* ins->code.offset > 0 */ 110 111 ins->code.data[ins->code.size++] = loval; 112 ins->code.data[ins->code.size++] = hival; 113 } 114 115 snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated); 116 return nreallocated; 117 } 118 119 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type) 120 { 121 int i; 122 for (i = 0;i < module->nsegments; ++i) { 123 if (module->segments[i].segment_type == seg_type) { 124 return (module->segments + i); 125 } 126 } 127 128 return NULL; 129 }; 130 131 static int find_free_symbol_index (struct dsp_spos_instance * ins) 132 { 133 int index = ins->symbol_table.nsymbols,i; 134 135 for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) { 136 if (ins->symbol_table.symbols[i].deleted) { 137 index = i; 138 break; 139 } 140 } 141 142 return index; 143 } 144 145 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module) 146 { 147 int i; 148 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 149 150 if (module->symbol_table.nsymbols > 0) { 151 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") && 152 module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) { 153 module->overlay_begin_address = module->symbol_table.symbols[0].address; 154 } 155 } 156 157 for (i = 0;i < module->symbol_table.nsymbols; ++i) { 158 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { 159 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n"); 160 return -ENOMEM; 161 } 162 163 164 if (cs46xx_dsp_lookup_symbol(chip, 165 module->symbol_table.symbols[i].symbol_name, 166 module->symbol_table.symbols[i].symbol_type) == NULL) { 167 168 ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i]; 169 ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address); 170 ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module; 171 ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0; 172 173 if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index) 174 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols; 175 176 ins->symbol_table.nsymbols++; 177 } else { 178 /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n", 179 module->symbol_table.symbols[i].symbol_name); */ 180 } 181 } 182 183 return 0; 184 } 185 186 static struct dsp_symbol_entry * 187 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type) 188 { 189 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 190 struct dsp_symbol_entry * symbol = NULL; 191 int index; 192 193 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { 194 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n"); 195 return NULL; 196 } 197 198 if (cs46xx_dsp_lookup_symbol(chip, 199 symbol_name, 200 type) != NULL) { 201 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name); 202 return NULL; 203 } 204 205 index = find_free_symbol_index (ins); 206 207 strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name); 208 ins->symbol_table.symbols[index].address = address; 209 ins->symbol_table.symbols[index].symbol_type = type; 210 ins->symbol_table.symbols[index].module = NULL; 211 ins->symbol_table.symbols[index].deleted = 0; 212 symbol = (ins->symbol_table.symbols + index); 213 214 if (index > ins->symbol_table.highest_frag_index) 215 ins->symbol_table.highest_frag_index = index; 216 217 if (index == ins->symbol_table.nsymbols) 218 ins->symbol_table.nsymbols++; /* no frag. in list */ 219 220 return symbol; 221 } 222 223 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip) 224 { 225 struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL); 226 227 if (ins == NULL) 228 return NULL; 229 230 /* better to use vmalloc for this big table */ 231 ins->symbol_table.nsymbols = 0; 232 ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) * 233 DSP_MAX_SYMBOLS); 234 ins->symbol_table.highest_frag_index = 0; 235 236 if (ins->symbol_table.symbols == NULL) { 237 cs46xx_dsp_spos_destroy(chip); 238 goto error; 239 } 240 241 ins->code.offset = 0; 242 ins->code.size = 0; 243 ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL); 244 245 if (ins->code.data == NULL) { 246 cs46xx_dsp_spos_destroy(chip); 247 goto error; 248 } 249 250 ins->nscb = 0; 251 ins->ntask = 0; 252 253 ins->nmodules = 0; 254 ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL); 255 256 if (ins->modules == NULL) { 257 cs46xx_dsp_spos_destroy(chip); 258 goto error; 259 } 260 261 /* default SPDIF input sample rate 262 to 48000 khz */ 263 ins->spdif_in_sample_rate = 48000; 264 265 /* maximize volume */ 266 ins->dac_volume_right = 0x8000; 267 ins->dac_volume_left = 0x8000; 268 ins->spdif_input_volume_right = 0x8000; 269 ins->spdif_input_volume_left = 0x8000; 270 271 /* set left and right validity bits and 272 default channel status */ 273 ins->spdif_csuv_default = 274 ins->spdif_csuv_stream = 275 /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) | 276 /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) | 277 /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) | 278 /* left and right validity bits */ (1 << 13) | (1 << 12); 279 280 return ins; 281 282 error: 283 kfree(ins); 284 return NULL; 285 } 286 287 void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip) 288 { 289 int i; 290 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 291 292 snd_assert(ins != NULL, return); 293 294 mutex_lock(&chip->spos_mutex); 295 for (i = 0; i < ins->nscb; ++i) { 296 if (ins->scbs[i].deleted) continue; 297 298 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); 299 } 300 301 kfree(ins->code.data); 302 vfree(ins->symbol_table.symbols); 303 kfree(ins->modules); 304 kfree(ins); 305 mutex_unlock(&chip->spos_mutex); 306 } 307 308 static int dsp_load_parameter(struct snd_cs46xx *chip, 309 struct dsp_segment_desc *parameter) 310 { 311 u32 doffset, dsize; 312 313 if (!parameter) { 314 snd_printdd("dsp_spos: module got no parameter segment\n"); 315 return 0; 316 } 317 318 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET); 319 dsize = parameter->size * 4; 320 321 snd_printdd("dsp_spos: " 322 "downloading parameter data to chip (%08x-%08x)\n", 323 doffset,doffset + dsize); 324 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) { 325 snd_printk(KERN_ERR "dsp_spos: " 326 "failed to download parameter data to DSP\n"); 327 return -EINVAL; 328 } 329 return 0; 330 } 331 332 static int dsp_load_sample(struct snd_cs46xx *chip, 333 struct dsp_segment_desc *sample) 334 { 335 u32 doffset, dsize; 336 337 if (!sample) { 338 snd_printdd("dsp_spos: module got no sample segment\n"); 339 return 0; 340 } 341 342 doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET); 343 dsize = sample->size * 4; 344 345 snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n", 346 doffset,doffset + dsize); 347 348 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) { 349 snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n"); 350 return -EINVAL; 351 } 352 return 0; 353 } 354 355 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module) 356 { 357 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 358 struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM); 359 u32 doffset, dsize; 360 int err; 361 362 if (ins->nmodules == DSP_MAX_MODULES - 1) { 363 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n"); 364 return -ENOMEM; 365 } 366 367 snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name); 368 369 if (ins->nmodules == 0) { 370 snd_printdd("dsp_spos: clearing parameter area\n"); 371 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE); 372 } 373 374 err = dsp_load_parameter(chip, get_segment_desc(module, 375 SEGTYPE_SP_PARAMETER)); 376 if (err < 0) 377 return err; 378 379 if (ins->nmodules == 0) { 380 snd_printdd("dsp_spos: clearing sample area\n"); 381 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE); 382 } 383 384 err = dsp_load_sample(chip, get_segment_desc(module, 385 SEGTYPE_SP_SAMPLE)); 386 if (err < 0) 387 return err; 388 389 if (ins->nmodules == 0) { 390 snd_printdd("dsp_spos: clearing code area\n"); 391 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); 392 } 393 394 if (code == NULL) { 395 snd_printdd("dsp_spos: module got no code segment\n"); 396 } else { 397 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) { 398 snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n"); 399 return -ENOMEM; 400 } 401 402 module->load_address = ins->code.offset; 403 module->overlay_begin_address = 0x000; 404 405 /* if module has a code segment it must have 406 symbol table */ 407 snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM); 408 if (add_symbols(chip,module)) { 409 snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n"); 410 return -ENOMEM; 411 } 412 413 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET); 414 dsize = code->size * 4; 415 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n", 416 doffset,doffset + dsize); 417 418 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address); 419 420 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) { 421 snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n"); 422 return -EINVAL; 423 } 424 425 ins->code.offset += code->size; 426 } 427 428 /* NOTE: module segments and symbol table must be 429 statically allocated. Case that module data is 430 not generated by the ospparser */ 431 ins->modules[ins->nmodules] = *module; 432 ins->nmodules++; 433 434 return 0; 435 } 436 437 struct dsp_symbol_entry * 438 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type) 439 { 440 int i; 441 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 442 443 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { 444 445 if (ins->symbol_table.symbols[i].deleted) 446 continue; 447 448 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) && 449 ins->symbol_table.symbols[i].symbol_type == symbol_type) { 450 return (ins->symbol_table.symbols + i); 451 } 452 } 453 454 #if 0 455 printk ("dsp_spos: symbol <%s> type %02x not found\n", 456 symbol_name,symbol_type); 457 #endif 458 459 return NULL; 460 } 461 462 463 #ifdef CONFIG_PROC_FS 464 static struct dsp_symbol_entry * 465 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type) 466 { 467 int i; 468 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 469 470 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { 471 472 if (ins->symbol_table.symbols[i].deleted) 473 continue; 474 475 if (ins->symbol_table.symbols[i].address == address && 476 ins->symbol_table.symbols[i].symbol_type == symbol_type) { 477 return (ins->symbol_table.symbols + i); 478 } 479 } 480 481 482 return NULL; 483 } 484 485 486 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry, 487 struct snd_info_buffer *buffer) 488 { 489 struct snd_cs46xx *chip = entry->private_data; 490 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 491 int i; 492 493 snd_iprintf(buffer, "SYMBOLS:\n"); 494 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { 495 char *module_str = "system"; 496 497 if (ins->symbol_table.symbols[i].deleted) 498 continue; 499 500 if (ins->symbol_table.symbols[i].module != NULL) { 501 module_str = ins->symbol_table.symbols[i].module->module_name; 502 } 503 504 505 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n", 506 ins->symbol_table.symbols[i].address, 507 ins->symbol_table.symbols[i].symbol_type, 508 ins->symbol_table.symbols[i].symbol_name, 509 module_str); 510 } 511 } 512 513 514 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry, 515 struct snd_info_buffer *buffer) 516 { 517 struct snd_cs46xx *chip = entry->private_data; 518 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 519 int i,j; 520 521 mutex_lock(&chip->spos_mutex); 522 snd_iprintf(buffer, "MODULES:\n"); 523 for ( i = 0; i < ins->nmodules; ++i ) { 524 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name); 525 snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols); 526 snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups); 527 528 for (j = 0; j < ins->modules[i].nsegments; ++ j) { 529 struct dsp_segment_desc * desc = (ins->modules[i].segments + j); 530 snd_iprintf(buffer, " segment %02x offset %08x size %08x\n", 531 desc->segment_type,desc->offset, desc->size); 532 } 533 } 534 mutex_unlock(&chip->spos_mutex); 535 } 536 537 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry, 538 struct snd_info_buffer *buffer) 539 { 540 struct snd_cs46xx *chip = entry->private_data; 541 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 542 int i, j, col; 543 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; 544 545 mutex_lock(&chip->spos_mutex); 546 snd_iprintf(buffer, "TASK TREES:\n"); 547 for ( i = 0; i < ins->ntask; ++i) { 548 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name); 549 550 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) { 551 u32 val; 552 if (col == 4) { 553 snd_iprintf(buffer,"\n"); 554 col = 0; 555 } 556 val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32)); 557 snd_iprintf(buffer,"%08x ",val); 558 } 559 } 560 561 snd_iprintf(buffer,"\n"); 562 mutex_unlock(&chip->spos_mutex); 563 } 564 565 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry, 566 struct snd_info_buffer *buffer) 567 { 568 struct snd_cs46xx *chip = entry->private_data; 569 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 570 int i; 571 572 mutex_lock(&chip->spos_mutex); 573 snd_iprintf(buffer, "SCB's:\n"); 574 for ( i = 0; i < ins->nscb; ++i) { 575 if (ins->scbs[i].deleted) 576 continue; 577 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name); 578 579 if (ins->scbs[i].parent_scb_ptr != NULL) { 580 snd_iprintf(buffer,"parent [%s:%04x] ", 581 ins->scbs[i].parent_scb_ptr->scb_name, 582 ins->scbs[i].parent_scb_ptr->address); 583 } else snd_iprintf(buffer,"parent [none] "); 584 585 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n", 586 ins->scbs[i].sub_list_ptr->scb_name, 587 ins->scbs[i].sub_list_ptr->address, 588 ins->scbs[i].next_scb_ptr->scb_name, 589 ins->scbs[i].next_scb_ptr->address, 590 ins->scbs[i].task_entry->symbol_name, 591 ins->scbs[i].task_entry->address); 592 } 593 594 snd_iprintf(buffer,"\n"); 595 mutex_unlock(&chip->spos_mutex); 596 } 597 598 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry, 599 struct snd_info_buffer *buffer) 600 { 601 struct snd_cs46xx *chip = entry->private_data; 602 /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */ 603 unsigned int i, col = 0; 604 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; 605 struct dsp_symbol_entry * symbol; 606 607 for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) { 608 if (col == 4) { 609 snd_iprintf(buffer,"\n"); 610 col = 0; 611 } 612 613 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) { 614 col = 0; 615 snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name); 616 } 617 618 if (col == 0) { 619 snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32)); 620 } 621 622 snd_iprintf(buffer,"%08X ",readl(dst + i)); 623 } 624 } 625 626 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry, 627 struct snd_info_buffer *buffer) 628 { 629 struct snd_cs46xx *chip = entry->private_data; 630 int i,col = 0; 631 void __iomem *dst = chip->region.idx[2].remap_addr; 632 633 snd_iprintf(buffer,"PCMREADER:\n"); 634 for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) { 635 if (col == 4) { 636 snd_iprintf(buffer,"\n"); 637 col = 0; 638 } 639 640 if (col == 0) { 641 snd_iprintf(buffer, "%04X ",i); 642 } 643 644 snd_iprintf(buffer,"%08X ",readl(dst + i)); 645 } 646 647 snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n"); 648 649 col = 0; 650 for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) { 651 if (col == 4) { 652 snd_iprintf(buffer,"\n"); 653 col = 0; 654 } 655 656 if (col == 0) { 657 snd_iprintf(buffer, "%04X ",i); 658 } 659 660 snd_iprintf(buffer,"%08X ",readl(dst + i)); 661 } 662 663 snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n"); 664 col = 0; 665 for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) { 666 if (col == 4) { 667 snd_iprintf(buffer,"\n"); 668 col = 0; 669 } 670 671 if (col == 0) { 672 snd_iprintf(buffer, "%04X ",i); 673 } 674 675 snd_iprintf(buffer,"%08X ",readl(dst + i)); 676 } 677 678 679 snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n"); 680 col = 0; 681 for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) { 682 if (col == 4) { 683 snd_iprintf(buffer,"\n"); 684 col = 0; 685 } 686 687 if (col == 0) { 688 snd_iprintf(buffer, "%04X ",i); 689 } 690 691 snd_iprintf(buffer,"%08X ",readl(dst + i)); 692 } 693 694 snd_iprintf(buffer,"\n...\n"); 695 col = 0; 696 697 for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) { 698 if (col == 4) { 699 snd_iprintf(buffer,"\n"); 700 col = 0; 701 } 702 703 if (col == 0) { 704 snd_iprintf(buffer, "%04X ",i); 705 } 706 707 snd_iprintf(buffer,"%08X ",readl(dst + i)); 708 } 709 710 711 snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n"); 712 col = 0; 713 for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) { 714 if (col == 4) { 715 snd_iprintf(buffer,"\n"); 716 col = 0; 717 } 718 719 if (col == 0) { 720 snd_iprintf(buffer, "%04X ",i); 721 } 722 723 snd_iprintf(buffer,"%08X ",readl(dst + i)); 724 } 725 726 snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n"); 727 col = 0; 728 for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) { 729 if (col == 4) { 730 snd_iprintf(buffer,"\n"); 731 col = 0; 732 } 733 734 if (col == 0) { 735 snd_iprintf(buffer, "%04X ",i); 736 } 737 738 snd_iprintf(buffer,"%08X ",readl(dst + i)); 739 } 740 #if 0 741 snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n"); 742 col = 0; 743 for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) { 744 if (col == 4) { 745 snd_iprintf(buffer,"\n"); 746 col = 0; 747 } 748 749 if (col == 0) { 750 snd_iprintf(buffer, "%04X ",i); 751 } 752 753 snd_iprintf(buffer,"%08X ",readl(dst + i)); 754 } 755 #endif 756 757 snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n"); 758 col = 0; 759 for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) { 760 if (col == 4) { 761 snd_iprintf(buffer,"\n"); 762 col = 0; 763 } 764 765 if (col == 0) { 766 snd_iprintf(buffer, "%04X ",i); 767 } 768 769 snd_iprintf(buffer,"%08X ",readl(dst + i)); 770 } 771 snd_iprintf(buffer,"\n"); 772 } 773 774 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip) 775 { 776 struct snd_info_entry *entry; 777 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 778 int i; 779 780 ins->snd_card = card; 781 782 if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) { 783 entry->content = SNDRV_INFO_CONTENT_TEXT; 784 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO; 785 786 if (snd_info_register(entry) < 0) { 787 snd_info_free_entry(entry); 788 entry = NULL; 789 } 790 } 791 792 ins->proc_dsp_dir = entry; 793 794 if (!ins->proc_dsp_dir) 795 return -ENOMEM; 796 797 if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) { 798 entry->content = SNDRV_INFO_CONTENT_TEXT; 799 entry->private_data = chip; 800 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 801 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read; 802 if (snd_info_register(entry) < 0) { 803 snd_info_free_entry(entry); 804 entry = NULL; 805 } 806 } 807 ins->proc_sym_info_entry = entry; 808 809 if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) { 810 entry->content = SNDRV_INFO_CONTENT_TEXT; 811 entry->private_data = chip; 812 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 813 entry->c.text.read = cs46xx_dsp_proc_modules_read; 814 if (snd_info_register(entry) < 0) { 815 snd_info_free_entry(entry); 816 entry = NULL; 817 } 818 } 819 ins->proc_modules_info_entry = entry; 820 821 if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) { 822 entry->content = SNDRV_INFO_CONTENT_TEXT; 823 entry->private_data = chip; 824 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 825 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read; 826 if (snd_info_register(entry) < 0) { 827 snd_info_free_entry(entry); 828 entry = NULL; 829 } 830 } 831 ins->proc_parameter_dump_info_entry = entry; 832 833 if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) { 834 entry->content = SNDRV_INFO_CONTENT_TEXT; 835 entry->private_data = chip; 836 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 837 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read; 838 if (snd_info_register(entry) < 0) { 839 snd_info_free_entry(entry); 840 entry = NULL; 841 } 842 } 843 ins->proc_sample_dump_info_entry = entry; 844 845 if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) { 846 entry->content = SNDRV_INFO_CONTENT_TEXT; 847 entry->private_data = chip; 848 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 849 entry->c.text.read = cs46xx_dsp_proc_task_tree_read; 850 if (snd_info_register(entry) < 0) { 851 snd_info_free_entry(entry); 852 entry = NULL; 853 } 854 } 855 ins->proc_task_info_entry = entry; 856 857 if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) { 858 entry->content = SNDRV_INFO_CONTENT_TEXT; 859 entry->private_data = chip; 860 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 861 entry->c.text.read = cs46xx_dsp_proc_scb_read; 862 if (snd_info_register(entry) < 0) { 863 snd_info_free_entry(entry); 864 entry = NULL; 865 } 866 } 867 ins->proc_scb_info_entry = entry; 868 869 mutex_lock(&chip->spos_mutex); 870 /* register/update SCB's entries on proc */ 871 for (i = 0; i < ins->nscb; ++i) { 872 if (ins->scbs[i].deleted) continue; 873 874 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i)); 875 } 876 mutex_unlock(&chip->spos_mutex); 877 878 return 0; 879 } 880 881 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip) 882 { 883 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 884 int i; 885 886 snd_info_free_entry(ins->proc_sym_info_entry); 887 ins->proc_sym_info_entry = NULL; 888 889 snd_info_free_entry(ins->proc_modules_info_entry); 890 ins->proc_modules_info_entry = NULL; 891 892 snd_info_free_entry(ins->proc_parameter_dump_info_entry); 893 ins->proc_parameter_dump_info_entry = NULL; 894 895 snd_info_free_entry(ins->proc_sample_dump_info_entry); 896 ins->proc_sample_dump_info_entry = NULL; 897 898 snd_info_free_entry(ins->proc_scb_info_entry); 899 ins->proc_scb_info_entry = NULL; 900 901 snd_info_free_entry(ins->proc_task_info_entry); 902 ins->proc_task_info_entry = NULL; 903 904 mutex_lock(&chip->spos_mutex); 905 for (i = 0; i < ins->nscb; ++i) { 906 if (ins->scbs[i].deleted) continue; 907 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); 908 } 909 mutex_unlock(&chip->spos_mutex); 910 911 snd_info_free_entry(ins->proc_dsp_dir); 912 ins->proc_dsp_dir = NULL; 913 914 return 0; 915 } 916 #endif /* CONFIG_PROC_FS */ 917 918 static int debug_tree; 919 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data, 920 u32 dest, int size) 921 { 922 void __iomem *spdst = chip->region.idx[1].remap_addr + 923 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); 924 int i; 925 926 for (i = 0; i < size; ++i) { 927 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]); 928 writel(task_data[i],spdst); 929 spdst += sizeof(u32); 930 } 931 } 932 933 static int debug_scb; 934 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest) 935 { 936 void __iomem *spdst = chip->region.idx[1].remap_addr + 937 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); 938 int i; 939 940 for (i = 0; i < 0x10; ++i) { 941 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]); 942 writel(scb_data[i],spdst); 943 spdst += sizeof(u32); 944 } 945 } 946 947 static int find_free_scb_index (struct dsp_spos_instance * ins) 948 { 949 int index = ins->nscb, i; 950 951 for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) { 952 if (ins->scbs[i].deleted) { 953 index = i; 954 break; 955 } 956 } 957 958 return index; 959 } 960 961 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest) 962 { 963 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 964 struct dsp_scb_descriptor * desc = NULL; 965 int index; 966 967 if (ins->nscb == DSP_MAX_SCB_DESC - 1) { 968 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n"); 969 return NULL; 970 } 971 972 index = find_free_scb_index (ins); 973 974 strcpy(ins->scbs[index].scb_name, name); 975 ins->scbs[index].address = dest; 976 ins->scbs[index].index = index; 977 ins->scbs[index].proc_info = NULL; 978 ins->scbs[index].ref_count = 1; 979 ins->scbs[index].deleted = 0; 980 spin_lock_init(&ins->scbs[index].lock); 981 982 desc = (ins->scbs + index); 983 ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER); 984 985 if (index > ins->scb_highest_frag_index) 986 ins->scb_highest_frag_index = index; 987 988 if (index == ins->nscb) 989 ins->nscb++; 990 991 return desc; 992 } 993 994 static struct dsp_task_descriptor * 995 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size) 996 { 997 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 998 struct dsp_task_descriptor * desc = NULL; 999 1000 if (ins->ntask == DSP_MAX_TASK_DESC - 1) { 1001 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n"); 1002 return NULL; 1003 } 1004 1005 if (name) 1006 strcpy(ins->tasks[ins->ntask].task_name, name); 1007 else 1008 strcpy(ins->tasks[ins->ntask].task_name, "(NULL)"); 1009 ins->tasks[ins->ntask].address = dest; 1010 ins->tasks[ins->ntask].size = size; 1011 1012 /* quick find in list */ 1013 ins->tasks[ins->ntask].index = ins->ntask; 1014 desc = (ins->tasks + ins->ntask); 1015 ins->ntask++; 1016 1017 if (name) 1018 add_symbol (chip,name,dest,SYMBOL_PARAMETER); 1019 return desc; 1020 } 1021 1022 struct dsp_scb_descriptor * 1023 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest) 1024 { 1025 struct dsp_scb_descriptor * desc; 1026 1027 desc = _map_scb (chip,name,dest); 1028 if (desc) { 1029 desc->data = scb_data; 1030 _dsp_create_scb(chip,scb_data,dest); 1031 } else { 1032 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n"); 1033 } 1034 1035 return desc; 1036 } 1037 1038 1039 static struct dsp_task_descriptor * 1040 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data, 1041 u32 dest, int size) 1042 { 1043 struct dsp_task_descriptor * desc; 1044 1045 desc = _map_task_tree (chip,name,dest,size); 1046 if (desc) { 1047 desc->data = task_data; 1048 _dsp_create_task_tree(chip,task_data,dest,size); 1049 } else { 1050 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n"); 1051 } 1052 1053 return desc; 1054 } 1055 1056 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip) 1057 { 1058 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1059 struct dsp_symbol_entry * fg_task_tree_header_code; 1060 struct dsp_symbol_entry * task_tree_header_code; 1061 struct dsp_symbol_entry * task_tree_thread; 1062 struct dsp_symbol_entry * null_algorithm; 1063 struct dsp_symbol_entry * magic_snoop_task; 1064 1065 struct dsp_scb_descriptor * timing_master_scb; 1066 struct dsp_scb_descriptor * codec_out_scb; 1067 struct dsp_scb_descriptor * codec_in_scb; 1068 struct dsp_scb_descriptor * src_task_scb; 1069 struct dsp_scb_descriptor * master_mix_scb; 1070 struct dsp_scb_descriptor * rear_mix_scb; 1071 struct dsp_scb_descriptor * record_mix_scb; 1072 struct dsp_scb_descriptor * write_back_scb; 1073 struct dsp_scb_descriptor * vari_decimate_scb; 1074 struct dsp_scb_descriptor * rear_codec_out_scb; 1075 struct dsp_scb_descriptor * clfe_codec_out_scb; 1076 struct dsp_scb_descriptor * magic_snoop_scb; 1077 1078 int fifo_addr, fifo_span, valid_slots; 1079 1080 static struct dsp_spos_control_block sposcb = { 1081 /* 0 */ HFG_TREE_SCB,HFG_STACK, 1082 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR, 1083 /* 2 */ DSP_SPOS_DC,0, 1084 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC, 1085 /* 4 */ 0,0, 1086 /* 5 */ DSP_SPOS_UU,0, 1087 /* 6 */ FG_TASK_HEADER_ADDR,0, 1088 /* 7 */ 0,0, 1089 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC, 1090 /* 9 */ 0, 1091 /* A */ 0,HFG_FIRST_EXECUTE_MODE, 1092 /* B */ DSP_SPOS_UU,DSP_SPOS_UU, 1093 /* C */ DSP_SPOS_DC_DC, 1094 /* D */ DSP_SPOS_DC_DC, 1095 /* E */ DSP_SPOS_DC_DC, 1096 /* F */ DSP_SPOS_DC_DC 1097 }; 1098 1099 cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10); 1100 1101 null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE); 1102 if (null_algorithm == NULL) { 1103 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n"); 1104 return -EIO; 1105 } 1106 1107 fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE); 1108 if (fg_task_tree_header_code == NULL) { 1109 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n"); 1110 return -EIO; 1111 } 1112 1113 task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE); 1114 if (task_tree_header_code == NULL) { 1115 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n"); 1116 return -EIO; 1117 } 1118 1119 task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE); 1120 if (task_tree_thread == NULL) { 1121 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n"); 1122 return -EIO; 1123 } 1124 1125 magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE); 1126 if (magic_snoop_task == NULL) { 1127 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n"); 1128 return -EIO; 1129 } 1130 1131 { 1132 /* create the null SCB */ 1133 static struct dsp_generic_scb null_scb = { 1134 { 0, 0, 0, 0 }, 1135 { 0, 0, 0, 0, 0 }, 1136 NULL_SCB_ADDR, NULL_SCB_ADDR, 1137 0, 0, 0, 0, 0, 1138 { 1139 0,0, 1140 0,0, 1141 } 1142 }; 1143 1144 null_scb.entry_point = null_algorithm->address; 1145 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR); 1146 ins->the_null_scb->task_entry = null_algorithm; 1147 ins->the_null_scb->sub_list_ptr = ins->the_null_scb; 1148 ins->the_null_scb->next_scb_ptr = ins->the_null_scb; 1149 ins->the_null_scb->parent_scb_ptr = NULL; 1150 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb); 1151 } 1152 1153 { 1154 /* setup foreground task tree */ 1155 static struct dsp_task_tree_control_block fg_task_tree_hdr = { 1156 { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10), 1157 DSP_SPOS_DC_DC, 1158 DSP_SPOS_DC_DC, 1159 0x0000,DSP_SPOS_DC, 1160 DSP_SPOS_DC, DSP_SPOS_DC, 1161 DSP_SPOS_DC_DC, 1162 DSP_SPOS_DC_DC, 1163 DSP_SPOS_DC_DC, 1164 DSP_SPOS_DC,DSP_SPOS_DC }, 1165 1166 { 1167 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR, 1168 0, 1169 FG_TASK_HEADER_ADDR + TCBData, 1170 }, 1171 1172 { 1173 4,0, 1174 1,0, 1175 2,SPOSCB_ADDR + HFGFlags, 1176 0,0, 1177 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK 1178 }, 1179 1180 { 1181 DSP_SPOS_DC,0, 1182 DSP_SPOS_DC,DSP_SPOS_DC, 1183 DSP_SPOS_DC,DSP_SPOS_DC, 1184 DSP_SPOS_DC,DSP_SPOS_DC, 1185 DSP_SPOS_DC,DSP_SPOS_DC, 1186 DSP_SPOS_DCDC, 1187 DSP_SPOS_UU,1, 1188 DSP_SPOS_DCDC, 1189 DSP_SPOS_DCDC, 1190 DSP_SPOS_DCDC, 1191 DSP_SPOS_DCDC, 1192 DSP_SPOS_DCDC, 1193 DSP_SPOS_DCDC, 1194 DSP_SPOS_DCDC, 1195 DSP_SPOS_DCDC, 1196 DSP_SPOS_DCDC, 1197 DSP_SPOS_DCDC, 1198 DSP_SPOS_DCDC, 1199 DSP_SPOS_DCDC, 1200 DSP_SPOS_DCDC, 1201 DSP_SPOS_DCDC, 1202 DSP_SPOS_DCDC, 1203 DSP_SPOS_DCDC, 1204 DSP_SPOS_DCDC, 1205 DSP_SPOS_DCDC, 1206 DSP_SPOS_DCDC, 1207 DSP_SPOS_DCDC, 1208 DSP_SPOS_DCDC, 1209 DSP_SPOS_DCDC, 1210 DSP_SPOS_DCDC, 1211 DSP_SPOS_DCDC, 1212 DSP_SPOS_DCDC, 1213 DSP_SPOS_DCDC, 1214 DSP_SPOS_DCDC, 1215 DSP_SPOS_DCDC 1216 }, 1217 { 1218 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, 1219 0,0 1220 } 1221 }; 1222 1223 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address; 1224 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; 1225 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35); 1226 } 1227 1228 1229 { 1230 /* setup foreground task tree */ 1231 static struct dsp_task_tree_control_block bg_task_tree_hdr = { 1232 { DSP_SPOS_DC_DC, 1233 DSP_SPOS_DC_DC, 1234 DSP_SPOS_DC_DC, 1235 DSP_SPOS_DC, DSP_SPOS_DC, 1236 DSP_SPOS_DC, DSP_SPOS_DC, 1237 DSP_SPOS_DC_DC, 1238 DSP_SPOS_DC_DC, 1239 DSP_SPOS_DC_DC, 1240 DSP_SPOS_DC,DSP_SPOS_DC }, 1241 1242 { 1243 NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */ 1244 0, 1245 BG_TREE_SCB_ADDR + TCBData, 1246 }, 1247 1248 { 1249 9999,0, 1250 0,1, 1251 0,SPOSCB_ADDR + HFGFlags, 1252 0,0, 1253 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK 1254 }, 1255 1256 { 1257 DSP_SPOS_DC,0, 1258 DSP_SPOS_DC,DSP_SPOS_DC, 1259 DSP_SPOS_DC,DSP_SPOS_DC, 1260 DSP_SPOS_DC,DSP_SPOS_DC, 1261 DSP_SPOS_DC,DSP_SPOS_DC, 1262 DSP_SPOS_DCDC, 1263 DSP_SPOS_UU,1, 1264 DSP_SPOS_DCDC, 1265 DSP_SPOS_DCDC, 1266 DSP_SPOS_DCDC, 1267 DSP_SPOS_DCDC, 1268 DSP_SPOS_DCDC, 1269 DSP_SPOS_DCDC, 1270 DSP_SPOS_DCDC, 1271 DSP_SPOS_DCDC, 1272 DSP_SPOS_DCDC, 1273 DSP_SPOS_DCDC, 1274 DSP_SPOS_DCDC, 1275 DSP_SPOS_DCDC, 1276 DSP_SPOS_DCDC, 1277 DSP_SPOS_DCDC, 1278 DSP_SPOS_DCDC, 1279 DSP_SPOS_DCDC, 1280 DSP_SPOS_DCDC, 1281 DSP_SPOS_DCDC, 1282 DSP_SPOS_DCDC, 1283 DSP_SPOS_DCDC, 1284 DSP_SPOS_DCDC, 1285 DSP_SPOS_DCDC, 1286 DSP_SPOS_DCDC, 1287 DSP_SPOS_DCDC, 1288 DSP_SPOS_DCDC, 1289 DSP_SPOS_DCDC, 1290 DSP_SPOS_DCDC, 1291 DSP_SPOS_DCDC 1292 }, 1293 { 1294 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, 1295 0,0 1296 } 1297 }; 1298 1299 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address; 1300 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; 1301 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35); 1302 } 1303 1304 /* create timing master SCB */ 1305 timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip); 1306 1307 /* create the CODEC output task */ 1308 codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000, 1309 MASTERMIX_SCB_ADDR, 1310 CODECOUT_SCB_ADDR,timing_master_scb, 1311 SCB_ON_PARENT_SUBLIST_SCB); 1312 1313 if (!codec_out_scb) goto _fail_end; 1314 /* create the master mix SCB */ 1315 master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB", 1316 MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR, 1317 codec_out_scb, 1318 SCB_ON_PARENT_SUBLIST_SCB); 1319 ins->master_mix_scb = master_mix_scb; 1320 1321 if (!master_mix_scb) goto _fail_end; 1322 1323 /* create codec in */ 1324 codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0, 1325 CODEC_INPUT_BUF1, 1326 CODECIN_SCB_ADDR,codec_out_scb, 1327 SCB_ON_PARENT_NEXT_SCB); 1328 if (!codec_in_scb) goto _fail_end; 1329 ins->codec_in_scb = codec_in_scb; 1330 1331 /* create write back scb */ 1332 write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB", 1333 WRITE_BACK_BUF1,WRITE_BACK_SPB, 1334 WRITEBACK_SCB_ADDR, 1335 timing_master_scb, 1336 SCB_ON_PARENT_NEXT_SCB); 1337 if (!write_back_scb) goto _fail_end; 1338 1339 { 1340 static struct dsp_mix2_ostream_spb mix2_ostream_spb = { 1341 0x00020000, 1342 0x0000ffff 1343 }; 1344 1345 if (!cs46xx_dsp_create_task_tree(chip, NULL, 1346 (u32 *)&mix2_ostream_spb, 1347 WRITE_BACK_SPB, 2)) 1348 goto _fail_end; 1349 } 1350 1351 /* input sample converter */ 1352 vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB", 1353 VARI_DECIMATE_BUF0, 1354 VARI_DECIMATE_BUF1, 1355 VARIDECIMATE_SCB_ADDR, 1356 write_back_scb, 1357 SCB_ON_PARENT_SUBLIST_SCB); 1358 if (!vari_decimate_scb) goto _fail_end; 1359 1360 /* create the record mixer SCB */ 1361 record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB", 1362 MIX_SAMPLE_BUF2, 1363 RECORD_MIXER_SCB_ADDR, 1364 vari_decimate_scb, 1365 SCB_ON_PARENT_SUBLIST_SCB); 1366 ins->record_mixer_scb = record_mix_scb; 1367 1368 if (!record_mix_scb) goto _fail_end; 1369 1370 valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV); 1371 1372 snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2); 1373 1374 if (chip->nr_ac97_codecs == 1) { 1375 /* output on slot 5 and 11 1376 on primary CODEC */ 1377 fifo_addr = 0x20; 1378 fifo_span = 0x60; 1379 1380 /* enable slot 5 and 11 */ 1381 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11; 1382 } else { 1383 /* output on slot 7 and 8 1384 on secondary CODEC */ 1385 fifo_addr = 0x40; 1386 fifo_span = 0x10; 1387 1388 /* enable slot 7 and 8 */ 1389 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8; 1390 } 1391 /* create CODEC tasklet for rear speakers output*/ 1392 rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr, 1393 REAR_MIXER_SCB_ADDR, 1394 REAR_CODECOUT_SCB_ADDR,codec_in_scb, 1395 SCB_ON_PARENT_NEXT_SCB); 1396 if (!rear_codec_out_scb) goto _fail_end; 1397 1398 1399 /* create the rear PCM channel mixer SCB */ 1400 rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB", 1401 MIX_SAMPLE_BUF3, 1402 REAR_MIXER_SCB_ADDR, 1403 rear_codec_out_scb, 1404 SCB_ON_PARENT_SUBLIST_SCB); 1405 ins->rear_mix_scb = rear_mix_scb; 1406 if (!rear_mix_scb) goto _fail_end; 1407 1408 if (chip->nr_ac97_codecs == 2) { 1409 /* create CODEC tasklet for rear Center/LFE output 1410 slot 6 and 9 on seconadry CODEC */ 1411 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030, 1412 CLFE_MIXER_SCB_ADDR, 1413 CLFE_CODEC_SCB_ADDR, 1414 rear_codec_out_scb, 1415 SCB_ON_PARENT_NEXT_SCB); 1416 if (!clfe_codec_out_scb) goto _fail_end; 1417 1418 1419 /* create the rear PCM channel mixer SCB */ 1420 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB", 1421 MIX_SAMPLE_BUF4, 1422 CLFE_MIXER_SCB_ADDR, 1423 clfe_codec_out_scb, 1424 SCB_ON_PARENT_SUBLIST_SCB); 1425 if (!ins->center_lfe_mix_scb) goto _fail_end; 1426 1427 /* enable slot 6 and 9 */ 1428 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9; 1429 } else { 1430 clfe_codec_out_scb = rear_codec_out_scb; 1431 ins->center_lfe_mix_scb = rear_mix_scb; 1432 } 1433 1434 /* enable slots depending on CODEC configuration */ 1435 snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots); 1436 1437 /* the magic snooper */ 1438 magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR, 1439 OUTPUT_SNOOP_BUFFER, 1440 codec_out_scb, 1441 clfe_codec_out_scb, 1442 SCB_ON_PARENT_NEXT_SCB); 1443 1444 1445 if (!magic_snoop_scb) goto _fail_end; 1446 ins->ref_snoop_scb = magic_snoop_scb; 1447 1448 /* SP IO access */ 1449 if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR, 1450 magic_snoop_scb, 1451 SCB_ON_PARENT_NEXT_SCB)) 1452 goto _fail_end; 1453 1454 /* SPDIF input sampel rate converter */ 1455 src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI", 1456 ins->spdif_in_sample_rate, 1457 SRC_OUTPUT_BUF1, 1458 SRC_DELAY_BUF1,SRCTASK_SCB_ADDR, 1459 master_mix_scb, 1460 SCB_ON_PARENT_SUBLIST_SCB,1); 1461 1462 if (!src_task_scb) goto _fail_end; 1463 cs46xx_src_unlink(chip,src_task_scb); 1464 1465 /* NOTE: when we now how to detect the SPDIF input 1466 sample rate we will use this SRC to adjust it */ 1467 ins->spdif_in_src = src_task_scb; 1468 1469 cs46xx_dsp_async_init(chip,timing_master_scb); 1470 return 0; 1471 1472 _fail_end: 1473 snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n"); 1474 return -EINVAL; 1475 } 1476 1477 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, 1478 struct dsp_scb_descriptor * fg_entry) 1479 { 1480 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1481 struct dsp_symbol_entry * s16_async_codec_input_task; 1482 struct dsp_symbol_entry * spdifo_task; 1483 struct dsp_symbol_entry * spdifi_task; 1484 struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc; 1485 1486 s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE); 1487 if (s16_async_codec_input_task == NULL) { 1488 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n"); 1489 return -EIO; 1490 } 1491 spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE); 1492 if (spdifo_task == NULL) { 1493 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n"); 1494 return -EIO; 1495 } 1496 1497 spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE); 1498 if (spdifi_task == NULL) { 1499 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n"); 1500 return -EIO; 1501 } 1502 1503 { 1504 /* 0xBC0 */ 1505 struct dsp_spdifoscb spdifo_scb = { 1506 /* 0 */ DSP_SPOS_UUUU, 1507 { 1508 /* 1 */ 0xb0, 1509 /* 2 */ 0, 1510 /* 3 */ 0, 1511 /* 4 */ 0, 1512 }, 1513 /* NOTE: the SPDIF output task read samples in mono 1514 format, the AsynchFGTxSCB task writes to buffer 1515 in stereo format 1516 */ 1517 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256, 1518 /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC, 1519 /* 7 */ 0,0, 1520 /* 8 */ 0, 1521 /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR, 1522 /* A */ spdifo_task->address, 1523 SPDIFO_SCB_INST + SPDIFOFIFOPointer, 1524 { 1525 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/ 1526 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/ 1527 }, 1528 /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */ 1529 /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */ 1530 /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */ 1531 }; 1532 1533 /* 0xBB0 */ 1534 struct dsp_spdifiscb spdifi_scb = { 1535 /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI, 1536 /* 1 */ 0, 1537 /* 2 */ 0, 1538 /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */ 1539 /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */ 1540 /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */ 1541 /* 6 */ DSP_SPOS_UUUU, /* Free3 */ 1542 /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/ 1543 /* 8 */ DSP_SPOS_UUUU, /* TempStatus */ 1544 /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR, 1545 /* A */ spdifi_task->address, 1546 SPDIFI_SCB_INST + SPDIFIFIFOPointer, 1547 /* NOTE: The SPDIF input task write the sample in mono 1548 format from the HW FIFO, the AsynchFGRxSCB task reads 1549 them in stereo 1550 */ 1551 /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128, 1552 /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, 1553 /* D */ 0x8048,0, 1554 /* E */ 0x01f0,0x0001, 1555 /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */ 1556 }; 1557 1558 /* 0xBA0 */ 1559 struct dsp_async_codec_input_scb async_codec_input_scb = { 1560 /* 0 */ DSP_SPOS_UUUU, 1561 /* 1 */ 0, 1562 /* 2 */ 0, 1563 /* 3 */ 1,4000, 1564 /* 4 */ 0x0118,0x0001, 1565 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64, 1566 /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, 1567 /* 7 */ DSP_SPOS_UU,0x3, 1568 /* 8 */ DSP_SPOS_UUUU, 1569 /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR, 1570 /* A */ s16_async_codec_input_task->address, 1571 HFG_TREE_SCB + AsyncCIOFIFOPointer, 1572 1573 /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, 1574 /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/ 1575 1576 #ifdef UseASER1Input 1577 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; 1578 Init. 0000:8042: for ASER1 1579 0000:8044: for ASER2 */ 1580 /* D */ 0x8042,0, 1581 1582 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; 1583 Init 1 stero:8050 ASER1 1584 Init 0 mono:8070 ASER2 1585 Init 1 Stereo : 0100 ASER1 (Set by script) */ 1586 /* E */ 0x0100,0x0001, 1587 1588 #endif 1589 1590 #ifdef UseASER2Input 1591 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; 1592 Init. 0000:8042: for ASER1 1593 0000:8044: for ASER2 */ 1594 /* D */ 0x8044,0, 1595 1596 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; 1597 Init 1 stero:8050 ASER1 1598 Init 0 mono:8070 ASER2 1599 Init 1 Stereo : 0100 ASER1 (Set by script) */ 1600 /* E */ 0x0110,0x0001, 1601 1602 #endif 1603 1604 /* short AsyncCIOutputBufModulo:AsyncCIFree; 1605 AsyncCIOutputBufModulo: The modulo size for 1606 the output buffer of this task */ 1607 /* F */ 0, /* DSP_SPOS_UUUU */ 1608 }; 1609 1610 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST); 1611 1612 snd_assert(spdifo_scb_desc, return -EIO); 1613 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST); 1614 snd_assert(spdifi_scb_desc, return -EIO); 1615 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB); 1616 snd_assert(async_codec_scb_desc, return -EIO); 1617 1618 async_codec_scb_desc->parent_scb_ptr = NULL; 1619 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc; 1620 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb; 1621 async_codec_scb_desc->task_entry = s16_async_codec_input_task; 1622 1623 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc; 1624 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc; 1625 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb; 1626 spdifi_scb_desc->task_entry = spdifi_task; 1627 1628 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc; 1629 spdifo_scb_desc->next_scb_ptr = fg_entry; 1630 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb; 1631 spdifo_scb_desc->task_entry = spdifo_task; 1632 1633 /* this one is faked, as the parnet of SPDIFO task 1634 is the FG task tree */ 1635 fg_entry->parent_scb_ptr = spdifo_scb_desc; 1636 1637 /* for proc fs */ 1638 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc); 1639 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc); 1640 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc); 1641 1642 /* Async MASTER ENABLE, affects both SPDIF input and output */ 1643 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 ); 1644 } 1645 1646 return 0; 1647 } 1648 1649 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip) 1650 { 1651 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1652 1653 /* set SPDIF output FIFO slot */ 1654 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0); 1655 1656 /* SPDIF output MASTER ENABLE */ 1657 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0); 1658 1659 /* right and left validate bit */ 1660 /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/ 1661 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0); 1662 1663 /* clear fifo pointer */ 1664 cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0); 1665 1666 /* monitor state */ 1667 ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED; 1668 } 1669 1670 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip) 1671 { 1672 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1673 1674 /* if hw-ctrl already enabled, turn off to reset logic ... */ 1675 cs46xx_dsp_disable_spdif_hw (chip); 1676 udelay(50); 1677 1678 /* set SPDIF output FIFO slot */ 1679 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) )); 1680 1681 /* SPDIF output MASTER ENABLE */ 1682 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000); 1683 1684 /* right and left validate bit */ 1685 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default); 1686 1687 /* monitor state */ 1688 ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED; 1689 1690 return 0; 1691 } 1692 1693 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip) 1694 { 1695 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1696 1697 /* turn on amplifier */ 1698 chip->active_ctrl(chip, 1); 1699 chip->amplifier_ctrl(chip, 1); 1700 1701 snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL); 1702 snd_assert (ins->spdif_in_src != NULL,return -EINVAL); 1703 1704 mutex_lock(&chip->spos_mutex); 1705 1706 if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) { 1707 /* time countdown enable */ 1708 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005); 1709 /* NOTE: 80000005 value is just magic. With all values 1710 that I've tested this one seem to give the best result. 1711 Got no explication why. (Benny) */ 1712 1713 /* SPDIF input MASTER ENABLE */ 1714 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff); 1715 1716 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED; 1717 } 1718 1719 /* create and start the asynchronous receiver SCB */ 1720 ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB", 1721 ASYNCRX_SCB_ADDR, 1722 SPDIFI_SCB_INST, 1723 SPDIFI_IP_OUTPUT_BUFFER1, 1724 ins->spdif_in_src, 1725 SCB_ON_PARENT_SUBLIST_SCB); 1726 1727 spin_lock_irq(&chip->reg_lock); 1728 1729 /* reset SPDIF input sample buffer pointer */ 1730 /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2, 1731 (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/ 1732 1733 /* reset FIFO ptr */ 1734 /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/ 1735 cs46xx_src_link(chip,ins->spdif_in_src); 1736 1737 /* unmute SRC volume */ 1738 cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff); 1739 1740 spin_unlock_irq(&chip->reg_lock); 1741 1742 /* set SPDIF input sample rate and unmute 1743 NOTE: only 48khz support for SPDIF input this time */ 1744 /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */ 1745 1746 /* monitor state */ 1747 ins->spdif_status_in = 1; 1748 mutex_unlock(&chip->spos_mutex); 1749 1750 return 0; 1751 } 1752 1753 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip) 1754 { 1755 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1756 1757 snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL); 1758 snd_assert (ins->spdif_in_src != NULL,return -EINVAL); 1759 1760 mutex_lock(&chip->spos_mutex); 1761 1762 /* Remove the asynchronous receiver SCB */ 1763 cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb); 1764 ins->asynch_rx_scb = NULL; 1765 1766 cs46xx_src_unlink(chip,ins->spdif_in_src); 1767 1768 /* monitor state */ 1769 ins->spdif_status_in = 0; 1770 mutex_unlock(&chip->spos_mutex); 1771 1772 /* restore amplifier */ 1773 chip->active_ctrl(chip, -1); 1774 chip->amplifier_ctrl(chip, -1); 1775 1776 return 0; 1777 } 1778 1779 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip) 1780 { 1781 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1782 1783 snd_assert (ins->pcm_input == NULL,return -EINVAL); 1784 snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL); 1785 1786 mutex_lock(&chip->spos_mutex); 1787 ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR, 1788 "PCMSerialInput_Wave"); 1789 mutex_unlock(&chip->spos_mutex); 1790 1791 return 0; 1792 } 1793 1794 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip) 1795 { 1796 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1797 1798 snd_assert (ins->pcm_input != NULL,return -EINVAL); 1799 1800 mutex_lock(&chip->spos_mutex); 1801 cs46xx_dsp_remove_scb (chip,ins->pcm_input); 1802 ins->pcm_input = NULL; 1803 mutex_unlock(&chip->spos_mutex); 1804 1805 return 0; 1806 } 1807 1808 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip) 1809 { 1810 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1811 1812 snd_assert (ins->adc_input == NULL,return -EINVAL); 1813 snd_assert (ins->codec_in_scb != NULL,return -EINVAL); 1814 1815 mutex_lock(&chip->spos_mutex); 1816 ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR, 1817 "PCMSerialInput_ADC"); 1818 mutex_unlock(&chip->spos_mutex); 1819 1820 return 0; 1821 } 1822 1823 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip) 1824 { 1825 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1826 1827 snd_assert (ins->adc_input != NULL,return -EINVAL); 1828 1829 mutex_lock(&chip->spos_mutex); 1830 cs46xx_dsp_remove_scb (chip,ins->adc_input); 1831 ins->adc_input = NULL; 1832 mutex_unlock(&chip->spos_mutex); 1833 1834 return 0; 1835 } 1836 1837 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data) 1838 { 1839 u32 temp; 1840 int i; 1841 1842 /* santiy check the parameters. (These numbers are not 100% correct. They are 1843 a rough guess from looking at the controller spec.) */ 1844 if (address < 0x8000 || address >= 0x9000) 1845 return -EINVAL; 1846 1847 /* initialize the SP_IO_WRITE SCB with the data. */ 1848 temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */ 1849 1850 snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp); 1851 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */ 1852 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */ 1853 1854 /* Poke this location to tell the task to start */ 1855 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10); 1856 1857 /* Verify that the task ran */ 1858 for (i=0; i<25; i++) { 1859 udelay(125); 1860 1861 temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2)); 1862 if (temp == 0x00000000) 1863 break; 1864 } 1865 1866 if (i == 25) { 1867 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n"); 1868 return -EBUSY; 1869 } 1870 1871 return 0; 1872 } 1873 1874 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right) 1875 { 1876 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1877 struct dsp_scb_descriptor * scb; 1878 1879 mutex_lock(&chip->spos_mutex); 1880 1881 /* main output */ 1882 scb = ins->master_mix_scb->sub_list_ptr; 1883 while (scb != ins->the_null_scb) { 1884 cs46xx_dsp_scb_set_volume (chip,scb,left,right); 1885 scb = scb->next_scb_ptr; 1886 } 1887 1888 /* rear output */ 1889 scb = ins->rear_mix_scb->sub_list_ptr; 1890 while (scb != ins->the_null_scb) { 1891 cs46xx_dsp_scb_set_volume (chip,scb,left,right); 1892 scb = scb->next_scb_ptr; 1893 } 1894 1895 ins->dac_volume_left = left; 1896 ins->dac_volume_right = right; 1897 1898 mutex_unlock(&chip->spos_mutex); 1899 1900 return 0; 1901 } 1902 1903 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right) 1904 { 1905 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1906 1907 mutex_lock(&chip->spos_mutex); 1908 1909 if (ins->asynch_rx_scb != NULL) 1910 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb, 1911 left,right); 1912 1913 ins->spdif_input_volume_left = left; 1914 ins->spdif_input_volume_right = right; 1915 1916 mutex_unlock(&chip->spos_mutex); 1917 1918 return 0; 1919 } 1920 1921 #ifdef CONFIG_PM 1922 int cs46xx_dsp_resume(struct snd_cs46xx * chip) 1923 { 1924 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1925 int i, err; 1926 1927 /* clear parameter, sample and code areas */ 1928 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, 1929 DSP_PARAMETER_BYTE_SIZE); 1930 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, 1931 DSP_SAMPLE_BYTE_SIZE); 1932 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); 1933 1934 for (i = 0; i < ins->nmodules; i++) { 1935 struct dsp_module_desc *module = &ins->modules[i]; 1936 struct dsp_segment_desc *seg; 1937 u32 doffset, dsize; 1938 1939 seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER); 1940 err = dsp_load_parameter(chip, seg); 1941 if (err < 0) 1942 return err; 1943 1944 seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE); 1945 err = dsp_load_sample(chip, seg); 1946 if (err < 0) 1947 return err; 1948 1949 seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM); 1950 if (!seg) 1951 continue; 1952 1953 doffset = seg->offset * 4 + module->load_address * 4 1954 + DSP_CODE_BYTE_OFFSET; 1955 dsize = seg->size * 4; 1956 err = snd_cs46xx_download(chip, 1957 ins->code.data + module->load_address, 1958 doffset, dsize); 1959 if (err < 0) 1960 return err; 1961 } 1962 1963 for (i = 0; i < ins->ntask; i++) { 1964 struct dsp_task_descriptor *t = &ins->tasks[i]; 1965 _dsp_create_task_tree(chip, t->data, t->address, t->size); 1966 } 1967 1968 for (i = 0; i < ins->nscb; i++) { 1969 struct dsp_scb_descriptor *s = &ins->scbs[i]; 1970 if (s->deleted) 1971 continue; 1972 _dsp_create_scb(chip, s->data, s->address); 1973 } 1974 1975 return 0; 1976 } 1977 #endif 1978