1 /* 2 * azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168). 3 * Copyright (C) 2002, 2005 by Andreas Mohr <andi AT lisas.de> 4 * 5 * Framework borrowed from Bart Hartgers's als4000.c. 6 * Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801), 7 * found in a Fujitsu-Siemens PC ("Cordant", aluminum case). 8 * Other versions are: 9 * PCI168 A(W), sub ID 1800 10 * PCI168 A/AP, sub ID 8000 11 * Please give me feedback in case you try my driver with one of these!! 12 * 13 * GPL LICENSE 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or 17 * (at your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 24 * You should have received a copy of the GNU General Public License 25 * along with this program; if not, write to the Free Software 26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 27 * 28 * NOTES 29 * Since Aztech does not provide any chipset documentation, 30 * even on repeated request to various addresses, 31 * and the answer that was finally given was negative 32 * (and I was stupid enough to manage to get hold of a PCI168 soundcard 33 * in the first place >:-P}), 34 * I was forced to base this driver on reverse engineering 35 * (3 weeks' worth of evenings filled with driver work). 36 * (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros) 37 * 38 * The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name 39 * for compatibility reasons) has the following features: 40 * 41 * - builtin AC97 conformant codec (SNR over 80dB) 42 * (really AC97 compliant?? I really doubt it when looking 43 * at the mixer register layout) 44 * - builtin genuine OPL3 45 * - full duplex 16bit playback/record at independent sampling rate 46 * - MPU401 (+ legacy address support) FIXME: how to enable legacy addr?? 47 * - game port (legacy address support) 48 * - built-in General DirectX timer having a 20 bits counter 49 * with 1us resolution (see below!) 50 * - I2S serial port for external DAC 51 * - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI 52 * - supports hardware volume control 53 * - single chip low cost solution (128 pin QFP) 54 * - supports programmable Sub-vendor and Sub-system ID 55 * required for Microsoft's logo compliance (FIXME: where?) 56 * - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms 57 * 58 * Note that this driver now is actually *better* than the Windows driver, 59 * since it additionally supports the card's 1MHz DirectX timer - just try 60 * the following snd-seq module parameters etc.: 61 * - options snd-seq seq_default_timer_class=2 seq_default_timer_sclass=0 62 * seq_default_timer_card=0 seq_client_load=1 seq_default_timer_device=0 63 * seq_default_timer_subdevice=0 seq_default_timer_resolution=1000000 64 * - "timidity -iAv -B2,8 -Os -EFreverb=0" 65 * - "pmidi -p 128:0 jazz.mid" 66 * 67 * Certain PCI versions of this card are susceptible to DMA traffic underruns 68 * in some systems (resulting in sound crackling/clicking/popping), 69 * probably because they don't have a DMA FIFO buffer or so. 70 * Overview (PCI ID/PCI subID/PCI rev.): 71 * - no DMA crackling on SiS735: 0x50DC/0x1801/16 72 * - unknown performance: 0x50DC/0x1801/10 73 * (well, it's not bad on an Athlon 1800 with now very optimized IRQ handler) 74 * 75 * Crackling happens with VIA chipsets or, in my case, an SiS735, which is 76 * supposed to be very fast and supposed to get rid of crackling much 77 * better than a VIA, yet ironically I still get crackling, like many other 78 * people with the same chipset. 79 * Possible remedies: 80 * - plug card into a different PCI slot, preferrably one that isn't shared 81 * too much (this helps a lot, but not completely!) 82 * - get rid of PCI VGA card, use AGP instead 83 * - upgrade or downgrade BIOS 84 * - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX) 85 * Not too helpful. 86 * - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS 87 * 88 * BUGS 89 * - full-duplex might *still* be problematic, not fully tested recently 90 * 91 * TODO 92 * - test MPU401 MIDI playback etc. 93 * - power management. See e.g. intel8x0 or cs4281. 94 * This would be nice since the chip runs a bit hot, and it's *required* 95 * anyway for proper ACPI power management. 96 * - figure out what all unknown port bits are responsible for 97 */ 98 99 #include <sound/driver.h> 100 #include <asm/io.h> 101 #include <linux/init.h> 102 #include <linux/pci.h> 103 #include <linux/delay.h> 104 #include <linux/slab.h> 105 #include <linux/gameport.h> 106 #include <linux/moduleparam.h> 107 #include <linux/dma-mapping.h> 108 #include <sound/core.h> 109 #include <sound/control.h> 110 #include <sound/pcm.h> 111 #include <sound/rawmidi.h> 112 #include <sound/mpu401.h> 113 #include <sound/opl3.h> 114 #include <sound/initval.h> 115 #include "azt3328.h" 116 117 MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>"); 118 MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)"); 119 MODULE_LICENSE("GPL"); 120 MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}"); 121 122 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) 123 #define SUPPORT_JOYSTICK 1 124 #endif 125 126 #define DEBUG_MISC 0 127 #define DEBUG_CALLS 0 128 #define DEBUG_MIXER 0 129 #define DEBUG_PLAY_REC 0 130 #define DEBUG_IO 0 131 #define DEBUG_TIMER 0 132 #define MIXER_TESTING 0 133 134 #if DEBUG_MISC 135 #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args) 136 #else 137 #define snd_azf3328_dbgmisc(format, args...) 138 #endif 139 140 #if DEBUG_CALLS 141 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args) 142 #define snd_azf3328_dbgcallenter() printk(KERN_ERR "--> %s\n", __FUNCTION__) 143 #define snd_azf3328_dbgcallleave() printk(KERN_ERR "<-- %s\n", __FUNCTION__) 144 #else 145 #define snd_azf3328_dbgcalls(format, args...) 146 #define snd_azf3328_dbgcallenter() 147 #define snd_azf3328_dbgcallleave() 148 #endif 149 150 #if DEBUG_MIXER 151 #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args) 152 #else 153 #define snd_azf3328_dbgmixer(format, args...) 154 #endif 155 156 #if DEBUG_PLAY_REC 157 #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args) 158 #else 159 #define snd_azf3328_dbgplay(format, args...) 160 #endif 161 162 #if DEBUG_MISC 163 #define snd_azf3328_dbgtimer(format, args...) printk(KERN_ERR format, ##args) 164 #else 165 #define snd_azf3328_dbgtimer(format, args...) 166 #endif 167 168 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 169 module_param_array(index, int, NULL, 0444); 170 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard."); 171 172 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 173 module_param_array(id, charp, NULL, 0444); 174 MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard."); 175 176 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 177 module_param_array(enable, bool, NULL, 0444); 178 MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard."); 179 180 #ifdef SUPPORT_JOYSTICK 181 static int joystick[SNDRV_CARDS]; 182 module_param_array(joystick, bool, NULL, 0444); 183 MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard."); 184 #endif 185 186 static int seqtimer_scaling = 128; 187 module_param(seqtimer_scaling, int, 0444); 188 MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128."); 189 190 struct snd_azf3328 { 191 /* often-used fields towards beginning, then grouped */ 192 unsigned long codec_port; 193 unsigned long io2_port; 194 unsigned long mpu_port; 195 unsigned long synth_port; 196 unsigned long mixer_port; 197 198 spinlock_t reg_lock; 199 200 struct snd_timer *timer; 201 202 struct snd_pcm *pcm; 203 struct snd_pcm_substream *playback_substream; 204 struct snd_pcm_substream *capture_substream; 205 unsigned int is_playing; 206 unsigned int is_recording; 207 208 struct snd_card *card; 209 struct snd_rawmidi *rmidi; 210 211 #ifdef SUPPORT_JOYSTICK 212 struct gameport *gameport; 213 #endif 214 215 struct pci_dev *pci; 216 int irq; 217 }; 218 219 static const struct pci_device_id snd_azf3328_ids[] __devinitdata = { 220 { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* PCI168/3328 */ 221 { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 3328 */ 222 { 0, } 223 }; 224 225 MODULE_DEVICE_TABLE(pci, snd_azf3328_ids); 226 227 static inline void 228 snd_azf3328_codec_outb(const struct snd_azf3328 *chip, int reg, u8 value) 229 { 230 outb(value, chip->codec_port + reg); 231 } 232 233 static inline u8 234 snd_azf3328_codec_inb(const struct snd_azf3328 *chip, int reg) 235 { 236 return inb(chip->codec_port + reg); 237 } 238 239 static inline void 240 snd_azf3328_codec_outw(const struct snd_azf3328 *chip, int reg, u16 value) 241 { 242 outw(value, chip->codec_port + reg); 243 } 244 245 static inline u16 246 snd_azf3328_codec_inw(const struct snd_azf3328 *chip, int reg) 247 { 248 return inw(chip->codec_port + reg); 249 } 250 251 static inline void 252 snd_azf3328_codec_outl(const struct snd_azf3328 *chip, int reg, u32 value) 253 { 254 outl(value, chip->codec_port + reg); 255 } 256 257 static inline void 258 snd_azf3328_io2_outb(const struct snd_azf3328 *chip, int reg, u8 value) 259 { 260 outb(value, chip->io2_port + reg); 261 } 262 263 static inline u8 264 snd_azf3328_io2_inb(const struct snd_azf3328 *chip, int reg) 265 { 266 return inb(chip->io2_port + reg); 267 } 268 269 static inline void 270 snd_azf3328_mixer_outw(const struct snd_azf3328 *chip, int reg, u16 value) 271 { 272 outw(value, chip->mixer_port + reg); 273 } 274 275 static inline u16 276 snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, int reg) 277 { 278 return inw(chip->mixer_port + reg); 279 } 280 281 static void 282 snd_azf3328_mixer_set_mute(const struct snd_azf3328 *chip, int reg, int do_mute) 283 { 284 unsigned long portbase = chip->mixer_port + reg + 1; 285 unsigned char oldval; 286 287 /* the mute bit is on the *second* (i.e. right) register of a 288 * left/right channel setting */ 289 oldval = inb(portbase); 290 if (do_mute) 291 oldval |= 0x80; 292 else 293 oldval &= ~0x80; 294 outb(oldval, portbase); 295 } 296 297 static void 298 snd_azf3328_mixer_write_volume_gradually(const struct snd_azf3328 *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay) 299 { 300 unsigned long portbase = chip->mixer_port + reg; 301 unsigned char curr_vol_left = 0, curr_vol_right = 0; 302 int left_done = 0, right_done = 0; 303 304 snd_azf3328_dbgcallenter(); 305 if (chan_sel & SET_CHAN_LEFT) 306 curr_vol_left = inb(portbase + 1); 307 else 308 left_done = 1; 309 if (chan_sel & SET_CHAN_RIGHT) 310 curr_vol_right = inb(portbase + 0); 311 else 312 right_done = 1; 313 314 /* take care of muting flag (0x80) contained in left channel */ 315 if (curr_vol_left & 0x80) 316 dst_vol_left |= 0x80; 317 else 318 dst_vol_left &= ~0x80; 319 320 do 321 { 322 if (!left_done) 323 { 324 if (curr_vol_left > dst_vol_left) 325 curr_vol_left--; 326 else 327 if (curr_vol_left < dst_vol_left) 328 curr_vol_left++; 329 else 330 left_done = 1; 331 outb(curr_vol_left, portbase + 1); 332 } 333 if (!right_done) 334 { 335 if (curr_vol_right > dst_vol_right) 336 curr_vol_right--; 337 else 338 if (curr_vol_right < dst_vol_right) 339 curr_vol_right++; 340 else 341 right_done = 1; 342 /* during volume change, the right channel is crackling 343 * somewhat more than the left channel, unfortunately. 344 * This seems to be a hardware issue. */ 345 outb(curr_vol_right, portbase + 0); 346 } 347 if (delay) 348 mdelay(delay); 349 } 350 while ((!left_done) || (!right_done)); 351 snd_azf3328_dbgcallleave(); 352 } 353 354 /* 355 * general mixer element 356 */ 357 struct azf3328_mixer_reg { 358 unsigned int reg; 359 unsigned int lchan_shift, rchan_shift; 360 unsigned int mask; 361 unsigned int invert: 1; 362 unsigned int stereo: 1; 363 unsigned int enum_c: 4; 364 }; 365 366 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \ 367 ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \ 368 (mask << 16) | \ 369 (invert << 24) | \ 370 (stereo << 25) | \ 371 (enum_c << 26)) 372 373 static void snd_azf3328_mixer_reg_decode(struct azf3328_mixer_reg *r, unsigned long val) 374 { 375 r->reg = val & 0xff; 376 r->lchan_shift = (val >> 8) & 0x0f; 377 r->rchan_shift = (val >> 12) & 0x0f; 378 r->mask = (val >> 16) & 0xff; 379 r->invert = (val >> 24) & 1; 380 r->stereo = (val >> 25) & 1; 381 r->enum_c = (val >> 26) & 0x0f; 382 } 383 384 /* 385 * mixer switches/volumes 386 */ 387 388 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \ 389 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 390 .info = snd_azf3328_info_mixer, \ 391 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 392 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \ 393 } 394 395 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \ 396 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 397 .info = snd_azf3328_info_mixer, \ 398 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 399 .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \ 400 } 401 402 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \ 403 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 404 .info = snd_azf3328_info_mixer, \ 405 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 406 .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \ 407 } 408 409 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \ 410 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 411 .info = snd_azf3328_info_mixer, \ 412 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 413 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \ 414 } 415 416 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \ 417 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 418 .info = snd_azf3328_info_mixer_enum, \ 419 .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \ 420 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \ 421 } 422 423 static int 424 snd_azf3328_info_mixer(struct snd_kcontrol *kcontrol, 425 struct snd_ctl_elem_info *uinfo) 426 { 427 struct azf3328_mixer_reg reg; 428 429 snd_azf3328_dbgcallenter(); 430 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 431 uinfo->type = reg.mask == 1 ? 432 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 433 uinfo->count = reg.stereo + 1; 434 uinfo->value.integer.min = 0; 435 uinfo->value.integer.max = reg.mask; 436 snd_azf3328_dbgcallleave(); 437 return 0; 438 } 439 440 static int 441 snd_azf3328_get_mixer(struct snd_kcontrol *kcontrol, 442 struct snd_ctl_elem_value *ucontrol) 443 { 444 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 445 struct azf3328_mixer_reg reg; 446 unsigned int oreg, val; 447 448 snd_azf3328_dbgcallenter(); 449 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 450 451 oreg = snd_azf3328_mixer_inw(chip, reg.reg); 452 val = (oreg >> reg.lchan_shift) & reg.mask; 453 if (reg.invert) 454 val = reg.mask - val; 455 ucontrol->value.integer.value[0] = val; 456 if (reg.stereo) { 457 val = (oreg >> reg.rchan_shift) & reg.mask; 458 if (reg.invert) 459 val = reg.mask - val; 460 ucontrol->value.integer.value[1] = val; 461 } 462 snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx " 463 "(shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", 464 reg.reg, oreg, 465 ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], 466 reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo); 467 snd_azf3328_dbgcallleave(); 468 return 0; 469 } 470 471 static int 472 snd_azf3328_put_mixer(struct snd_kcontrol *kcontrol, 473 struct snd_ctl_elem_value *ucontrol) 474 { 475 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 476 struct azf3328_mixer_reg reg; 477 unsigned int oreg, nreg, val; 478 479 snd_azf3328_dbgcallenter(); 480 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 481 oreg = snd_azf3328_mixer_inw(chip, reg.reg); 482 val = ucontrol->value.integer.value[0] & reg.mask; 483 if (reg.invert) 484 val = reg.mask - val; 485 nreg = oreg & ~(reg.mask << reg.lchan_shift); 486 nreg |= (val << reg.lchan_shift); 487 if (reg.stereo) { 488 val = ucontrol->value.integer.value[1] & reg.mask; 489 if (reg.invert) 490 val = reg.mask - val; 491 nreg &= ~(reg.mask << reg.rchan_shift); 492 nreg |= (val << reg.rchan_shift); 493 } 494 if (reg.mask >= 0x07) /* it's a volume control, so better take care */ 495 snd_azf3328_mixer_write_volume_gradually( 496 chip, reg.reg, nreg >> 8, nreg & 0xff, 497 /* just set both channels, doesn't matter */ 498 SET_CHAN_LEFT|SET_CHAN_RIGHT, 499 0); 500 else 501 snd_azf3328_mixer_outw(chip, reg.reg, nreg); 502 503 snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, " 504 "oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", 505 reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], 506 oreg, reg.lchan_shift, reg.rchan_shift, 507 nreg, snd_azf3328_mixer_inw(chip, reg.reg)); 508 snd_azf3328_dbgcallleave(); 509 return (nreg != oreg); 510 } 511 512 static int 513 snd_azf3328_info_mixer_enum(struct snd_kcontrol *kcontrol, 514 struct snd_ctl_elem_info *uinfo) 515 { 516 static const char * const texts1[] = { 517 "ModemOut1", "ModemOut2" 518 }; 519 static const char * const texts2[] = { 520 "MonoSelectSource1", "MonoSelectSource2" 521 }; 522 static const char * const texts3[] = { 523 "Mic", "CD", "Video", "Aux", 524 "Line", "Mix", "Mix Mono", "Phone" 525 }; 526 struct azf3328_mixer_reg reg; 527 528 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 529 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 530 uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1; 531 uinfo->value.enumerated.items = reg.enum_c; 532 if (uinfo->value.enumerated.item > reg.enum_c - 1U) 533 uinfo->value.enumerated.item = reg.enum_c - 1U; 534 if (reg.reg == IDX_MIXER_ADVCTL2) 535 { 536 if (reg.lchan_shift == 8) /* modem out sel */ 537 strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]); 538 else /* mono sel source */ 539 strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]); 540 } 541 else 542 strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item] 543 ); 544 return 0; 545 } 546 547 static int 548 snd_azf3328_get_mixer_enum(struct snd_kcontrol *kcontrol, 549 struct snd_ctl_elem_value *ucontrol) 550 { 551 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 552 struct azf3328_mixer_reg reg; 553 unsigned short val; 554 555 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 556 val = snd_azf3328_mixer_inw(chip, reg.reg); 557 if (reg.reg == IDX_MIXER_REC_SELECT) 558 { 559 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1); 560 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1); 561 } 562 else 563 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1); 564 565 snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", 566 reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], 567 reg.lchan_shift, reg.enum_c); 568 return 0; 569 } 570 571 static int 572 snd_azf3328_put_mixer_enum(struct snd_kcontrol *kcontrol, 573 struct snd_ctl_elem_value *ucontrol) 574 { 575 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 576 struct azf3328_mixer_reg reg; 577 unsigned int oreg, nreg, val; 578 579 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 580 oreg = snd_azf3328_mixer_inw(chip, reg.reg); 581 val = oreg; 582 if (reg.reg == IDX_MIXER_REC_SELECT) 583 { 584 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U || 585 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U) 586 return -EINVAL; 587 val = (ucontrol->value.enumerated.item[0] << 8) | 588 (ucontrol->value.enumerated.item[1] << 0); 589 } 590 else 591 { 592 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U) 593 return -EINVAL; 594 val &= ~((reg.enum_c - 1) << reg.lchan_shift); 595 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift); 596 } 597 snd_azf3328_mixer_outw(chip, reg.reg, val); 598 nreg = val; 599 600 snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg); 601 return (nreg != oreg); 602 } 603 604 static const struct snd_kcontrol_new snd_azf3328_mixer_controls[] __devinitdata = { 605 AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1), 606 AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1), 607 AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1), 608 AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1), 609 AZF3328_MIXER_SWITCH("Wave 3D Bypass Playback Switch", IDX_MIXER_ADVCTL2, 7, 1), 610 AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1), 611 AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1), 612 AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1), 613 AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1), 614 AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1), 615 AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0), 616 AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0), 617 AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1), 618 AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1), 619 AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0), 620 AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1), 621 AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1), 622 AZF3328_MIXER_SWITCH("PC Speaker Playback Switch", IDX_MIXER_PCBEEP, 15, 1), 623 AZF3328_MIXER_VOL_SPECIAL("PC Speaker Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1), 624 AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1), 625 AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1), 626 AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1), 627 AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1), 628 AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1), 629 AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1), 630 AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1), 631 AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1), 632 AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8), 633 AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9), 634 AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0), 635 AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0), 636 AZF3328_MIXER_SWITCH("3D Control - Switch", IDX_MIXER_ADVCTL2, 13, 0), 637 AZF3328_MIXER_VOL_SPECIAL("3D Control - Wide", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */ 638 AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */ 639 #if MIXER_TESTING 640 AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0), 641 AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0), 642 AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0), 643 AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0), 644 AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0), 645 AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0), 646 AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0), 647 AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0), 648 AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0), 649 AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0), 650 AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0), 651 AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0), 652 AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0), 653 AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0), 654 AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0), 655 AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0), 656 #endif 657 }; 658 659 static const u16 __devinitdata snd_azf3328_init_values[][2] = { 660 { IDX_MIXER_PLAY_MASTER, MIXER_MUTE_MASK|0x1f1f }, 661 { IDX_MIXER_MODEMOUT, MIXER_MUTE_MASK|0x1f1f }, 662 { IDX_MIXER_BASSTREBLE, 0x0000 }, 663 { IDX_MIXER_PCBEEP, MIXER_MUTE_MASK|0x1f1f }, 664 { IDX_MIXER_MODEMIN, MIXER_MUTE_MASK|0x1f1f }, 665 { IDX_MIXER_MIC, MIXER_MUTE_MASK|0x001f }, 666 { IDX_MIXER_LINEIN, MIXER_MUTE_MASK|0x1f1f }, 667 { IDX_MIXER_CDAUDIO, MIXER_MUTE_MASK|0x1f1f }, 668 { IDX_MIXER_VIDEO, MIXER_MUTE_MASK|0x1f1f }, 669 { IDX_MIXER_AUX, MIXER_MUTE_MASK|0x1f1f }, 670 { IDX_MIXER_WAVEOUT, MIXER_MUTE_MASK|0x1f1f }, 671 { IDX_MIXER_FMSYNTH, MIXER_MUTE_MASK|0x1f1f }, 672 { IDX_MIXER_REC_VOLUME, MIXER_MUTE_MASK|0x0707 }, 673 }; 674 675 static int __devinit 676 snd_azf3328_mixer_new(struct snd_azf3328 *chip) 677 { 678 struct snd_card *card; 679 const struct snd_kcontrol_new *sw; 680 unsigned int idx; 681 int err; 682 683 snd_azf3328_dbgcallenter(); 684 snd_assert(chip != NULL && chip->card != NULL, return -EINVAL); 685 686 card = chip->card; 687 688 /* mixer reset */ 689 snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000); 690 691 /* mute and zero volume channels */ 692 for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_init_values); idx++) { 693 snd_azf3328_mixer_outw(chip, 694 snd_azf3328_init_values[idx][0], 695 snd_azf3328_init_values[idx][1]); 696 } 697 698 /* add mixer controls */ 699 sw = snd_azf3328_mixer_controls; 700 for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) { 701 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0) 702 return err; 703 } 704 snd_component_add(card, "AZF3328 mixer"); 705 strcpy(card->mixername, "AZF3328 mixer"); 706 707 snd_azf3328_dbgcallleave(); 708 return 0; 709 } 710 711 static int 712 snd_azf3328_hw_params(struct snd_pcm_substream *substream, 713 struct snd_pcm_hw_params *hw_params) 714 { 715 int res; 716 snd_azf3328_dbgcallenter(); 717 res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 718 snd_azf3328_dbgcallleave(); 719 return res; 720 } 721 722 static int 723 snd_azf3328_hw_free(struct snd_pcm_substream *substream) 724 { 725 snd_azf3328_dbgcallenter(); 726 snd_pcm_lib_free_pages(substream); 727 snd_azf3328_dbgcallleave(); 728 return 0; 729 } 730 731 static void 732 snd_azf3328_setfmt(struct snd_azf3328 *chip, 733 unsigned int reg, 734 unsigned int bitrate, 735 unsigned int format_width, 736 unsigned int channels 737 ) 738 { 739 u16 val = 0xff00; 740 unsigned long flags; 741 742 snd_azf3328_dbgcallenter(); 743 switch (bitrate) { 744 case 4000: val |= SOUNDFORMAT_FREQ_SUSPECTED_4000; break; 745 case 4800: val |= SOUNDFORMAT_FREQ_SUSPECTED_4800; break; 746 case 5512: val |= SOUNDFORMAT_FREQ_5510; break; /* the AZF3328 names it "5510" for some strange reason */ 747 case 6620: val |= SOUNDFORMAT_FREQ_6620; break; 748 case 8000: val |= SOUNDFORMAT_FREQ_8000; break; 749 case 9600: val |= SOUNDFORMAT_FREQ_9600; break; 750 case 11025: val |= SOUNDFORMAT_FREQ_11025; break; 751 case 13240: val |= SOUNDFORMAT_FREQ_SUSPECTED_13240; break; 752 case 16000: val |= SOUNDFORMAT_FREQ_16000; break; 753 case 22050: val |= SOUNDFORMAT_FREQ_22050; break; 754 case 32000: val |= SOUNDFORMAT_FREQ_32000; break; 755 case 44100: val |= SOUNDFORMAT_FREQ_44100; break; 756 case 48000: val |= SOUNDFORMAT_FREQ_48000; break; 757 case 66200: val |= SOUNDFORMAT_FREQ_SUSPECTED_66200; break; 758 default: 759 snd_printk(KERN_WARNING "unknown bitrate %d, assuming 44.1kHz!\n", bitrate); 760 val |= SOUNDFORMAT_FREQ_44100; 761 break; 762 } 763 /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) hmm, 66120, 65967, 66123 */ 764 /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) hmm, 13237.2Hz? */ 765 /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) yup, 4803Hz */ 766 /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) yup, 4003Hz */ 767 /* val = 0xff05; 5m11.556s (... -> 44100Hz) */ 768 /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */ 769 /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */ 770 /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */ 771 /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */ 772 773 if (channels == 2) 774 val |= SOUNDFORMAT_FLAG_2CHANNELS; 775 776 if (format_width == 16) 777 val |= SOUNDFORMAT_FLAG_16BIT; 778 779 spin_lock_irqsave(&chip->reg_lock, flags); 780 781 /* set bitrate/format */ 782 snd_azf3328_codec_outw(chip, reg, val); 783 784 /* changing the bitrate/format settings switches off the 785 * audio output with an annoying click in case of 8/16bit format change 786 * (maybe shutting down DAC/ADC?), thus immediately 787 * do some tweaking to reenable it and get rid of the clicking 788 * (FIXME: yes, it works, but what exactly am I doing here?? :) 789 * FIXME: does this have some side effects for full-duplex 790 * or other dramatic side effects? */ 791 if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */ 792 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 793 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | 794 DMA_PLAY_SOMETHING1 | 795 DMA_PLAY_SOMETHING2 | 796 SOMETHING_ALMOST_ALWAYS_SET | 797 DMA_EPILOGUE_SOMETHING | 798 DMA_SOMETHING_ELSE 799 ); 800 801 spin_unlock_irqrestore(&chip->reg_lock, flags); 802 snd_azf3328_dbgcallleave(); 803 } 804 805 static void 806 snd_azf3328_setdmaa(struct snd_azf3328 *chip, 807 long unsigned int addr, 808 unsigned int count, 809 unsigned int size, 810 int do_recording) 811 { 812 unsigned long flags, portbase; 813 unsigned int is_running; 814 815 snd_azf3328_dbgcallenter(); 816 if (do_recording) 817 { 818 /* access capture registers, i.e. skip playback reg section */ 819 portbase = chip->codec_port + 0x20; 820 is_running = chip->is_recording; 821 } 822 else 823 { 824 /* access the playback register section */ 825 portbase = chip->codec_port + 0x00; 826 is_running = chip->is_playing; 827 } 828 829 /* AZF3328 uses a two buffer pointer DMA playback approach */ 830 if (!is_running) 831 { 832 unsigned long addr_area2; 833 unsigned long count_areas, count_tmp; /* width 32bit -- overflow!! */ 834 count_areas = size/2; 835 addr_area2 = addr+count_areas; 836 count_areas--; /* max. index */ 837 snd_azf3328_dbgplay("set DMA: buf1 %08lx[%lu], buf2 %08lx[%lu]\n", addr, count_areas, addr_area2, count_areas); 838 839 /* build combined I/O buffer length word */ 840 count_tmp = count_areas; 841 count_areas |= (count_tmp << 16); 842 spin_lock_irqsave(&chip->reg_lock, flags); 843 outl(addr, portbase + IDX_IO_PLAY_DMA_START_1); 844 outl(addr_area2, portbase + IDX_IO_PLAY_DMA_START_2); 845 outl(count_areas, portbase + IDX_IO_PLAY_DMA_LEN_1); 846 spin_unlock_irqrestore(&chip->reg_lock, flags); 847 } 848 snd_azf3328_dbgcallleave(); 849 } 850 851 static int 852 snd_azf3328_playback_prepare(struct snd_pcm_substream *substream) 853 { 854 #if 0 855 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 856 struct snd_pcm_runtime *runtime = substream->runtime; 857 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 858 unsigned int count = snd_pcm_lib_period_bytes(substream); 859 #endif 860 861 snd_azf3328_dbgcallenter(); 862 #if 0 863 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 864 runtime->rate, 865 snd_pcm_format_width(runtime->format), 866 runtime->channels); 867 snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0); 868 #endif 869 snd_azf3328_dbgcallleave(); 870 return 0; 871 } 872 873 static int 874 snd_azf3328_capture_prepare(struct snd_pcm_substream *substream) 875 { 876 #if 0 877 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 878 struct snd_pcm_runtime *runtime = substream->runtime; 879 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 880 unsigned int count = snd_pcm_lib_period_bytes(substream); 881 #endif 882 883 snd_azf3328_dbgcallenter(); 884 #if 0 885 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, 886 runtime->rate, 887 snd_pcm_format_width(runtime->format), 888 runtime->channels); 889 snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1); 890 #endif 891 snd_azf3328_dbgcallleave(); 892 return 0; 893 } 894 895 static int 896 snd_azf3328_playback_trigger(struct snd_pcm_substream *substream, int cmd) 897 { 898 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 899 struct snd_pcm_runtime *runtime = substream->runtime; 900 int result = 0; 901 unsigned int status1; 902 903 snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd); 904 905 switch (cmd) { 906 case SNDRV_PCM_TRIGGER_START: 907 snd_azf3328_dbgplay("START PLAYBACK\n"); 908 909 /* mute WaveOut */ 910 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); 911 912 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 913 runtime->rate, 914 snd_pcm_format_width(runtime->format), 915 runtime->channels); 916 917 spin_lock(&chip->reg_lock); 918 /* stop playback */ 919 status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS); 920 status1 &= ~DMA_RESUME; 921 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 922 923 /* FIXME: clear interrupts or what??? */ 924 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_IRQTYPE, 0xffff); 925 spin_unlock(&chip->reg_lock); 926 927 snd_azf3328_setdmaa(chip, runtime->dma_addr, 928 snd_pcm_lib_period_bytes(substream), 929 snd_pcm_lib_buffer_bytes(substream), 930 0); 931 932 spin_lock(&chip->reg_lock); 933 #ifdef WIN9X 934 /* FIXME: enable playback/recording??? */ 935 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2; 936 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 937 938 /* start playback again */ 939 /* FIXME: what is this value (0x0010)??? */ 940 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING; 941 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 942 #else /* NT4 */ 943 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 944 0x0000); 945 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 946 DMA_PLAY_SOMETHING1); 947 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 948 DMA_PLAY_SOMETHING1 | 949 DMA_PLAY_SOMETHING2); 950 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 951 DMA_RESUME | 952 SOMETHING_ALMOST_ALWAYS_SET | 953 DMA_EPILOGUE_SOMETHING | 954 DMA_SOMETHING_ELSE); 955 #endif 956 spin_unlock(&chip->reg_lock); 957 958 /* now unmute WaveOut */ 959 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0); 960 961 chip->is_playing = 1; 962 snd_azf3328_dbgplay("STARTED PLAYBACK\n"); 963 break; 964 case SNDRV_PCM_TRIGGER_STOP: 965 snd_azf3328_dbgplay("STOP PLAYBACK\n"); 966 967 /* mute WaveOut */ 968 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); 969 970 spin_lock(&chip->reg_lock); 971 /* stop playback */ 972 status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS); 973 974 status1 &= ~DMA_RESUME; 975 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 976 977 /* hmm, is this really required? we're resetting the same bit 978 * immediately thereafter... */ 979 status1 |= DMA_PLAY_SOMETHING1; 980 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 981 982 status1 &= ~DMA_PLAY_SOMETHING1; 983 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 984 spin_unlock(&chip->reg_lock); 985 986 /* now unmute WaveOut */ 987 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0); 988 chip->is_playing = 0; 989 snd_azf3328_dbgplay("STOPPED PLAYBACK\n"); 990 break; 991 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 992 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n"); 993 break; 994 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 995 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n"); 996 break; 997 default: 998 return -EINVAL; 999 } 1000 1001 snd_azf3328_dbgcallleave(); 1002 return result; 1003 } 1004 1005 /* this is just analogous to playback; I'm not quite sure whether recording 1006 * should actually be triggered like that */ 1007 static int 1008 snd_azf3328_capture_trigger(struct snd_pcm_substream *substream, int cmd) 1009 { 1010 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1011 struct snd_pcm_runtime *runtime = substream->runtime; 1012 int result = 0; 1013 unsigned int status1; 1014 1015 snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd); 1016 1017 switch (cmd) { 1018 case SNDRV_PCM_TRIGGER_START: 1019 1020 snd_azf3328_dbgplay("START CAPTURE\n"); 1021 1022 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, 1023 runtime->rate, 1024 snd_pcm_format_width(runtime->format), 1025 runtime->channels); 1026 1027 spin_lock(&chip->reg_lock); 1028 /* stop recording */ 1029 status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS); 1030 status1 &= ~DMA_RESUME; 1031 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1032 1033 /* FIXME: clear interrupts or what??? */ 1034 snd_azf3328_codec_outw(chip, IDX_IO_REC_IRQTYPE, 0xffff); 1035 spin_unlock(&chip->reg_lock); 1036 1037 snd_azf3328_setdmaa(chip, runtime->dma_addr, 1038 snd_pcm_lib_period_bytes(substream), 1039 snd_pcm_lib_buffer_bytes(substream), 1040 1); 1041 1042 spin_lock(&chip->reg_lock); 1043 #ifdef WIN9X 1044 /* FIXME: enable playback/recording??? */ 1045 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2; 1046 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1047 1048 /* start capture again */ 1049 /* FIXME: what is this value (0x0010)??? */ 1050 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING; 1051 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1052 #else 1053 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1054 0x0000); 1055 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1056 DMA_PLAY_SOMETHING1); 1057 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1058 DMA_PLAY_SOMETHING1 | 1059 DMA_PLAY_SOMETHING2); 1060 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1061 DMA_RESUME | 1062 SOMETHING_ALMOST_ALWAYS_SET | 1063 DMA_EPILOGUE_SOMETHING | 1064 DMA_SOMETHING_ELSE); 1065 #endif 1066 spin_unlock(&chip->reg_lock); 1067 1068 chip->is_recording = 1; 1069 snd_azf3328_dbgplay("STARTED CAPTURE\n"); 1070 break; 1071 case SNDRV_PCM_TRIGGER_STOP: 1072 snd_azf3328_dbgplay("STOP CAPTURE\n"); 1073 1074 spin_lock(&chip->reg_lock); 1075 /* stop recording */ 1076 status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS); 1077 1078 status1 &= ~DMA_RESUME; 1079 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1080 1081 status1 |= DMA_PLAY_SOMETHING1; 1082 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1083 1084 status1 &= ~DMA_PLAY_SOMETHING1; 1085 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1086 spin_unlock(&chip->reg_lock); 1087 1088 chip->is_recording = 0; 1089 snd_azf3328_dbgplay("STOPPED CAPTURE\n"); 1090 break; 1091 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 1092 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n"); 1093 break; 1094 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 1095 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n"); 1096 break; 1097 default: 1098 return -EINVAL; 1099 } 1100 1101 snd_azf3328_dbgcallleave(); 1102 return result; 1103 } 1104 1105 static snd_pcm_uframes_t 1106 snd_azf3328_playback_pointer(struct snd_pcm_substream *substream) 1107 { 1108 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1109 unsigned long bufptr, result; 1110 snd_pcm_uframes_t frmres; 1111 1112 #ifdef QUERY_HARDWARE 1113 bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1); 1114 #else 1115 bufptr = substream->runtime->dma_addr; 1116 #endif 1117 result = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS); 1118 1119 /* calculate offset */ 1120 result -= bufptr; 1121 frmres = bytes_to_frames( substream->runtime, result); 1122 snd_azf3328_dbgplay("PLAY @ 0x%8lx, frames %8ld\n", result, frmres); 1123 return frmres; 1124 } 1125 1126 static snd_pcm_uframes_t 1127 snd_azf3328_capture_pointer(struct snd_pcm_substream *substream) 1128 { 1129 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1130 unsigned long bufptr, result; 1131 snd_pcm_uframes_t frmres; 1132 1133 #ifdef QUERY_HARDWARE 1134 bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1); 1135 #else 1136 bufptr = substream->runtime->dma_addr; 1137 #endif 1138 result = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS); 1139 1140 /* calculate offset */ 1141 result -= bufptr; 1142 frmres = bytes_to_frames( substream->runtime, result); 1143 snd_azf3328_dbgplay("REC @ 0x%8lx, frames %8ld\n", result, frmres); 1144 return frmres; 1145 } 1146 1147 static irqreturn_t 1148 snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs) 1149 { 1150 struct snd_azf3328 *chip = dev_id; 1151 u8 status, which; 1152 static unsigned long irq_count; 1153 1154 status = snd_azf3328_codec_inb(chip, IDX_IO_IRQSTATUS); 1155 1156 /* fast path out, to ease interrupt sharing */ 1157 if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_TIMER))) 1158 return IRQ_NONE; /* must be interrupt for another device */ 1159 1160 snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQTYPE %04x, IDX_IO_IRQSTATUS %04x\n", 1161 irq_count, 1162 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS), 1163 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_IRQTYPE), 1164 status); 1165 1166 if (status & IRQ_TIMER) 1167 { 1168 /* snd_azf3328_dbgplay("timer %ld\n", inl(chip->codec_port+IDX_IO_TIMER_VALUE) & TIMER_VALUE_MASK); */ 1169 if (chip->timer) 1170 snd_timer_interrupt(chip->timer, chip->timer->sticks); 1171 /* ACK timer */ 1172 spin_lock(&chip->reg_lock); 1173 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07); 1174 spin_unlock(&chip->reg_lock); 1175 snd_azf3328_dbgplay("azt3328: timer IRQ\n"); 1176 } 1177 if (status & IRQ_PLAYBACK) 1178 { 1179 spin_lock(&chip->reg_lock); 1180 which = snd_azf3328_codec_inb(chip, IDX_IO_PLAY_IRQTYPE); 1181 /* ack all IRQ types immediately */ 1182 snd_azf3328_codec_outb(chip, IDX_IO_PLAY_IRQTYPE, which); 1183 spin_unlock(&chip->reg_lock); 1184 1185 if (chip->pcm && chip->playback_substream) 1186 { 1187 snd_pcm_period_elapsed(chip->playback_substream); 1188 snd_azf3328_dbgplay("PLAY period done (#%x), @ %x\n", 1189 which, 1190 inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS)); 1191 } 1192 else 1193 snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n"); 1194 if (which & IRQ_PLAY_SOMETHING) 1195 snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n"); 1196 } 1197 if (status & IRQ_RECORDING) 1198 { 1199 spin_lock(&chip->reg_lock); 1200 which = snd_azf3328_codec_inb(chip, IDX_IO_REC_IRQTYPE); 1201 /* ack all IRQ types immediately */ 1202 snd_azf3328_codec_outb(chip, IDX_IO_REC_IRQTYPE, which); 1203 spin_unlock(&chip->reg_lock); 1204 1205 if (chip->pcm && chip->capture_substream) 1206 { 1207 snd_pcm_period_elapsed(chip->capture_substream); 1208 snd_azf3328_dbgplay("REC period done (#%x), @ %x\n", 1209 which, 1210 inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS)); 1211 } 1212 else 1213 snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n"); 1214 if (which & IRQ_REC_SOMETHING) 1215 snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n"); 1216 } 1217 /* MPU401 has less critical IRQ requirements 1218 * than timer and playback/recording, right? */ 1219 if (status & IRQ_MPU401) 1220 { 1221 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); 1222 1223 /* hmm, do we have to ack the IRQ here somehow? 1224 * If so, then I don't know how... */ 1225 snd_azf3328_dbgplay("azt3328: MPU401 IRQ\n"); 1226 } 1227 irq_count++; 1228 return IRQ_HANDLED; 1229 } 1230 1231 /*****************************************************************/ 1232 1233 static const struct snd_pcm_hardware snd_azf3328_playback = 1234 { 1235 /* FIXME!! Correct? */ 1236 .info = SNDRV_PCM_INFO_MMAP | 1237 SNDRV_PCM_INFO_INTERLEAVED | 1238 SNDRV_PCM_INFO_MMAP_VALID, 1239 .formats = SNDRV_PCM_FMTBIT_S8 | 1240 SNDRV_PCM_FMTBIT_U8 | 1241 SNDRV_PCM_FMTBIT_S16_LE | 1242 SNDRV_PCM_FMTBIT_U16_LE, 1243 .rates = SNDRV_PCM_RATE_5512 | 1244 SNDRV_PCM_RATE_8000_48000 | 1245 SNDRV_PCM_RATE_KNOT, 1246 .rate_min = 4000, 1247 .rate_max = 66200, 1248 .channels_min = 1, 1249 .channels_max = 2, 1250 .buffer_bytes_max = 65536, 1251 .period_bytes_min = 64, 1252 .period_bytes_max = 65536, 1253 .periods_min = 1, 1254 .periods_max = 1024, 1255 /* FIXME: maybe that card actually has a FIFO? 1256 * Hmm, it seems newer revisions do have one, but we still don't know 1257 * its size... */ 1258 .fifo_size = 0, 1259 }; 1260 1261 static const struct snd_pcm_hardware snd_azf3328_capture = 1262 { 1263 /* FIXME */ 1264 .info = SNDRV_PCM_INFO_MMAP | 1265 SNDRV_PCM_INFO_INTERLEAVED | 1266 SNDRV_PCM_INFO_MMAP_VALID, 1267 .formats = SNDRV_PCM_FMTBIT_S8 | 1268 SNDRV_PCM_FMTBIT_U8 | 1269 SNDRV_PCM_FMTBIT_S16_LE | 1270 SNDRV_PCM_FMTBIT_U16_LE, 1271 .rates = SNDRV_PCM_RATE_5512 | 1272 SNDRV_PCM_RATE_8000_48000 | 1273 SNDRV_PCM_RATE_KNOT, 1274 .rate_min = 4000, 1275 .rate_max = 66200, 1276 .channels_min = 1, 1277 .channels_max = 2, 1278 .buffer_bytes_max = 65536, 1279 .period_bytes_min = 64, 1280 .period_bytes_max = 65536, 1281 .periods_min = 1, 1282 .periods_max = 1024, 1283 .fifo_size = 0, 1284 }; 1285 1286 1287 static unsigned int snd_azf3328_fixed_rates[] = { 1288 4000, 4800, 5512, 6620, 8000, 9600, 11025, 13240, 16000, 22050, 32000, 1289 44100, 48000, 66200 }; 1290 static struct snd_pcm_hw_constraint_list snd_azf3328_hw_constraints_rates = { 1291 .count = ARRAY_SIZE(snd_azf3328_fixed_rates), 1292 .list = snd_azf3328_fixed_rates, 1293 .mask = 0, 1294 }; 1295 1296 /*****************************************************************/ 1297 1298 static int 1299 snd_azf3328_playback_open(struct snd_pcm_substream *substream) 1300 { 1301 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1302 struct snd_pcm_runtime *runtime = substream->runtime; 1303 1304 snd_azf3328_dbgcallenter(); 1305 chip->playback_substream = substream; 1306 runtime->hw = snd_azf3328_playback; 1307 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1308 &snd_azf3328_hw_constraints_rates); 1309 snd_azf3328_dbgcallleave(); 1310 return 0; 1311 } 1312 1313 static int 1314 snd_azf3328_capture_open(struct snd_pcm_substream *substream) 1315 { 1316 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1317 struct snd_pcm_runtime *runtime = substream->runtime; 1318 1319 snd_azf3328_dbgcallenter(); 1320 chip->capture_substream = substream; 1321 runtime->hw = snd_azf3328_capture; 1322 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1323 &snd_azf3328_hw_constraints_rates); 1324 snd_azf3328_dbgcallleave(); 1325 return 0; 1326 } 1327 1328 static int 1329 snd_azf3328_playback_close(struct snd_pcm_substream *substream) 1330 { 1331 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1332 1333 snd_azf3328_dbgcallenter(); 1334 1335 chip->playback_substream = NULL; 1336 snd_azf3328_dbgcallleave(); 1337 return 0; 1338 } 1339 1340 static int 1341 snd_azf3328_capture_close(struct snd_pcm_substream *substream) 1342 { 1343 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1344 1345 snd_azf3328_dbgcallenter(); 1346 chip->capture_substream = NULL; 1347 snd_azf3328_dbgcallleave(); 1348 return 0; 1349 } 1350 1351 /******************************************************************/ 1352 1353 static struct snd_pcm_ops snd_azf3328_playback_ops = { 1354 .open = snd_azf3328_playback_open, 1355 .close = snd_azf3328_playback_close, 1356 .ioctl = snd_pcm_lib_ioctl, 1357 .hw_params = snd_azf3328_hw_params, 1358 .hw_free = snd_azf3328_hw_free, 1359 .prepare = snd_azf3328_playback_prepare, 1360 .trigger = snd_azf3328_playback_trigger, 1361 .pointer = snd_azf3328_playback_pointer 1362 }; 1363 1364 static struct snd_pcm_ops snd_azf3328_capture_ops = { 1365 .open = snd_azf3328_capture_open, 1366 .close = snd_azf3328_capture_close, 1367 .ioctl = snd_pcm_lib_ioctl, 1368 .hw_params = snd_azf3328_hw_params, 1369 .hw_free = snd_azf3328_hw_free, 1370 .prepare = snd_azf3328_capture_prepare, 1371 .trigger = snd_azf3328_capture_trigger, 1372 .pointer = snd_azf3328_capture_pointer 1373 }; 1374 1375 static int __devinit 1376 snd_azf3328_pcm(struct snd_azf3328 *chip, int device) 1377 { 1378 struct snd_pcm *pcm; 1379 int err; 1380 1381 snd_azf3328_dbgcallenter(); 1382 if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0) 1383 return err; 1384 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops); 1385 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops); 1386 1387 pcm->private_data = chip; 1388 pcm->info_flags = 0; 1389 strcpy(pcm->name, chip->card->shortname); 1390 chip->pcm = pcm; 1391 1392 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1393 snd_dma_pci_data(chip->pci), 64*1024, 64*1024); 1394 1395 snd_azf3328_dbgcallleave(); 1396 return 0; 1397 } 1398 1399 /******************************************************************/ 1400 1401 #ifdef SUPPORT_JOYSTICK 1402 static int __devinit 1403 snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) 1404 { 1405 struct gameport *gp; 1406 struct resource *r; 1407 1408 if (!joystick[dev]) 1409 return -ENODEV; 1410 1411 if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) { 1412 printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n"); 1413 return -EBUSY; 1414 } 1415 1416 chip->gameport = gp = gameport_allocate_port(); 1417 if (!gp) { 1418 printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n"); 1419 release_and_free_resource(r); 1420 return -ENOMEM; 1421 } 1422 1423 gameport_set_name(gp, "AZF3328 Gameport"); 1424 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); 1425 gameport_set_dev_parent(gp, &chip->pci->dev); 1426 gp->io = 0x200; 1427 gameport_set_port_data(gp, r); 1428 1429 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, 1430 snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY); 1431 1432 gameport_register_port(chip->gameport); 1433 1434 return 0; 1435 } 1436 1437 static void 1438 snd_azf3328_free_joystick(struct snd_azf3328 *chip) 1439 { 1440 if (chip->gameport) { 1441 struct resource *r = gameport_get_port_data(chip->gameport); 1442 1443 gameport_unregister_port(chip->gameport); 1444 chip->gameport = NULL; 1445 /* disable gameport */ 1446 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, 1447 snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY); 1448 release_and_free_resource(r); 1449 } 1450 } 1451 #else 1452 static inline int 1453 snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) { return -ENOSYS; } 1454 static inline void 1455 snd_azf3328_free_joystick(struct snd_azf3328 *chip) { } 1456 #endif 1457 1458 /******************************************************************/ 1459 1460 static int 1461 snd_azf3328_free(struct snd_azf3328 *chip) 1462 { 1463 if (chip->irq < 0) 1464 goto __end_hw; 1465 1466 /* reset (close) mixer */ 1467 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */ 1468 snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000); 1469 1470 /* interrupt setup - mask everything (FIXME!) */ 1471 /* well, at least we know how to disable the timer IRQ */ 1472 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); 1473 1474 synchronize_irq(chip->irq); 1475 __end_hw: 1476 snd_azf3328_free_joystick(chip); 1477 if (chip->irq >= 0) 1478 free_irq(chip->irq, (void *)chip); 1479 pci_release_regions(chip->pci); 1480 pci_disable_device(chip->pci); 1481 1482 kfree(chip); 1483 return 0; 1484 } 1485 1486 static int 1487 snd_azf3328_dev_free(struct snd_device *device) 1488 { 1489 struct snd_azf3328 *chip = device->device_data; 1490 return snd_azf3328_free(chip); 1491 } 1492 1493 /******************************************************************/ 1494 1495 /*** NOTE: the physical timer resolution actually is 1024000 ticks per second, 1496 *** but announcing those attributes to user-space would make programs 1497 *** configure the timer to a 1 tick value, resulting in an absolutely fatal 1498 *** timer IRQ storm. 1499 *** Thus I chose to announce a down-scaled virtual timer to the outside and 1500 *** calculate real timer countdown values internally. 1501 *** (the scale factor can be set via module parameter "seqtimer_scaling"). 1502 ***/ 1503 1504 static int 1505 snd_azf3328_timer_start(struct snd_timer *timer) 1506 { 1507 struct snd_azf3328 *chip; 1508 unsigned long flags; 1509 unsigned int delay; 1510 1511 snd_azf3328_dbgcallenter(); 1512 chip = snd_timer_chip(timer); 1513 delay = ((timer->sticks * seqtimer_scaling) - 1) & TIMER_VALUE_MASK; 1514 if (delay < 49) 1515 { 1516 /* uhoh, that's not good, since user-space won't know about 1517 * this timing tweak 1518 * (we need to do it to avoid a lockup, though) */ 1519 1520 snd_azf3328_dbgtimer("delay was too low (%d)!\n", delay); 1521 delay = 49; /* minimum time is 49 ticks */ 1522 } 1523 snd_azf3328_dbgtimer("setting timer countdown value %d, add COUNTDOWN|IRQ\n", delay); 1524 delay |= TIMER_ENABLE_COUNTDOWN | TIMER_ENABLE_IRQ; 1525 spin_lock_irqsave(&chip->reg_lock, flags); 1526 snd_azf3328_codec_outl(chip, IDX_IO_TIMER_VALUE, delay); 1527 spin_unlock_irqrestore(&chip->reg_lock, flags); 1528 snd_azf3328_dbgcallleave(); 1529 return 0; 1530 } 1531 1532 static int 1533 snd_azf3328_timer_stop(struct snd_timer *timer) 1534 { 1535 struct snd_azf3328 *chip; 1536 unsigned long flags; 1537 1538 snd_azf3328_dbgcallenter(); 1539 chip = snd_timer_chip(timer); 1540 spin_lock_irqsave(&chip->reg_lock, flags); 1541 /* disable timer countdown and interrupt */ 1542 /* FIXME: should we write TIMER_ACK_IRQ here? */ 1543 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0); 1544 spin_unlock_irqrestore(&chip->reg_lock, flags); 1545 snd_azf3328_dbgcallleave(); 1546 return 0; 1547 } 1548 1549 1550 static int 1551 snd_azf3328_timer_precise_resolution(struct snd_timer *timer, 1552 unsigned long *num, unsigned long *den) 1553 { 1554 snd_azf3328_dbgcallenter(); 1555 *num = 1; 1556 *den = 1024000 / seqtimer_scaling; 1557 snd_azf3328_dbgcallleave(); 1558 return 0; 1559 } 1560 1561 static struct snd_timer_hardware snd_azf3328_timer_hw = { 1562 .flags = SNDRV_TIMER_HW_AUTO, 1563 .resolution = 977, /* 1000000/1024000 = 0.9765625us */ 1564 .ticks = 1024000, /* max tick count, defined by the value register; actually it's not 1024000, but 1048576, but we don't care */ 1565 .start = snd_azf3328_timer_start, 1566 .stop = snd_azf3328_timer_stop, 1567 .precise_resolution = snd_azf3328_timer_precise_resolution, 1568 }; 1569 1570 static int __devinit 1571 snd_azf3328_timer(struct snd_azf3328 *chip, int device) 1572 { 1573 struct snd_timer *timer = NULL; 1574 struct snd_timer_id tid; 1575 int err; 1576 1577 snd_azf3328_dbgcallenter(); 1578 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1579 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1580 tid.card = chip->card->number; 1581 tid.device = device; 1582 tid.subdevice = 0; 1583 1584 snd_azf3328_timer_hw.resolution *= seqtimer_scaling; 1585 snd_azf3328_timer_hw.ticks /= seqtimer_scaling; 1586 if ((err = snd_timer_new(chip->card, "AZF3328", &tid, &timer)) < 0) { 1587 goto out; 1588 } 1589 1590 strcpy(timer->name, "AZF3328 timer"); 1591 timer->private_data = chip; 1592 timer->hw = snd_azf3328_timer_hw; 1593 1594 chip->timer = timer; 1595 1596 err = 0; 1597 1598 out: 1599 snd_azf3328_dbgcallleave(); 1600 return err; 1601 } 1602 1603 /******************************************************************/ 1604 1605 #if 0 1606 /* check whether a bit can be modified */ 1607 static void 1608 snd_azf3328_test_bit(unsigned int reg, int bit) 1609 { 1610 unsigned char val, valoff, valon; 1611 1612 val = inb(reg); 1613 1614 outb(val & ~(1 << bit), reg); 1615 valoff = inb(reg); 1616 1617 outb(val|(1 << bit), reg); 1618 valon = inb(reg); 1619 1620 outb(val, reg); 1621 1622 printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon); 1623 } 1624 #endif 1625 1626 static void 1627 snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip) 1628 { 1629 #if DEBUG_MISC 1630 u16 tmp; 1631 1632 snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq); 1633 1634 snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_inb(chip, 0), snd_azf3328_io2_inb(chip, 1), snd_azf3328_io2_inb(chip, 2), snd_azf3328_io2_inb(chip, 3), snd_azf3328_io2_inb(chip, 4), snd_azf3328_io2_inb(chip, 5)); 1635 1636 for (tmp=0; tmp <= 0x01; tmp += 1) 1637 snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp)); 1638 1639 for (tmp = 0; tmp <= 0x6E; tmp += 2) 1640 snd_azf3328_dbgmisc("0x%02x: 0x%04x\n", tmp, snd_azf3328_codec_inb(chip, tmp)); 1641 #endif 1642 } 1643 1644 static int __devinit 1645 snd_azf3328_create(struct snd_card *card, 1646 struct pci_dev *pci, 1647 unsigned long device_type, 1648 struct snd_azf3328 ** rchip) 1649 { 1650 struct snd_azf3328 *chip; 1651 int err; 1652 static struct snd_device_ops ops = { 1653 .dev_free = snd_azf3328_dev_free, 1654 }; 1655 u16 tmp; 1656 1657 *rchip = NULL; 1658 1659 if ((err = pci_enable_device(pci)) < 0) 1660 return err; 1661 1662 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1663 if (chip == NULL) { 1664 err = -ENOMEM; 1665 goto out_err; 1666 } 1667 spin_lock_init(&chip->reg_lock); 1668 chip->card = card; 1669 chip->pci = pci; 1670 chip->irq = -1; 1671 1672 /* check if we can restrict PCI DMA transfers to 24 bits */ 1673 if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 || 1674 pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) { 1675 snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n"); 1676 err = -ENXIO; 1677 goto out_err; 1678 } 1679 1680 if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) { 1681 goto out_err; 1682 } 1683 1684 chip->codec_port = pci_resource_start(pci, 0); 1685 chip->io2_port = pci_resource_start(pci, 1); 1686 chip->mpu_port = pci_resource_start(pci, 2); 1687 chip->synth_port = pci_resource_start(pci, 3); 1688 chip->mixer_port = pci_resource_start(pci, 4); 1689 1690 if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) { 1691 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 1692 err = -EBUSY; 1693 goto out_err; 1694 } 1695 chip->irq = pci->irq; 1696 pci_set_master(pci); 1697 synchronize_irq(chip->irq); 1698 1699 snd_azf3328_debug_show_ports(chip); 1700 1701 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1702 goto out_err; 1703 } 1704 1705 /* create mixer interface & switches */ 1706 if ((err = snd_azf3328_mixer_new(chip)) < 0) 1707 goto out_err; 1708 1709 #if 0 1710 /* set very low bitrate to reduce noise and power consumption? */ 1711 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1); 1712 #endif 1713 1714 /* standard chip init stuff */ 1715 /* default IRQ init value */ 1716 tmp = DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE; 1717 1718 spin_lock_irq(&chip->reg_lock); 1719 snd_azf3328_codec_outb(chip, IDX_IO_PLAY_FLAGS, tmp); 1720 snd_azf3328_codec_outb(chip, IDX_IO_REC_FLAGS, tmp); 1721 snd_azf3328_codec_outb(chip, IDX_IO_SOMETHING_FLAGS, tmp); 1722 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); /* disable timer */ 1723 spin_unlock_irq(&chip->reg_lock); 1724 1725 snd_card_set_dev(card, &pci->dev); 1726 1727 *rchip = chip; 1728 1729 err = 0; 1730 goto out; 1731 1732 out_err: 1733 if (chip) 1734 snd_azf3328_free(chip); 1735 pci_disable_device(pci); 1736 1737 out: 1738 return err; 1739 } 1740 1741 static int __devinit 1742 snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) 1743 { 1744 static int dev; 1745 struct snd_card *card; 1746 struct snd_azf3328 *chip; 1747 struct snd_opl3 *opl3; 1748 int err; 1749 1750 snd_azf3328_dbgcallenter(); 1751 if (dev >= SNDRV_CARDS) 1752 return -ENODEV; 1753 if (!enable[dev]) { 1754 dev++; 1755 return -ENOENT; 1756 } 1757 1758 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 ); 1759 if (card == NULL) 1760 return -ENOMEM; 1761 1762 strcpy(card->driver, "AZF3328"); 1763 strcpy(card->shortname, "Aztech AZF3328 (PCI168)"); 1764 1765 if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) { 1766 goto out_err; 1767 } 1768 1769 if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401, 1770 chip->mpu_port, 1, pci->irq, 0, 1771 &chip->rmidi)) < 0) { 1772 snd_printk(KERN_ERR "azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port); 1773 goto out_err; 1774 } 1775 1776 if ((err = snd_azf3328_timer(chip, 0)) < 0) { 1777 goto out_err; 1778 } 1779 1780 if ((err = snd_azf3328_pcm(chip, 0)) < 0) { 1781 goto out_err; 1782 } 1783 1784 if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2, 1785 OPL3_HW_AUTO, 1, &opl3) < 0) { 1786 snd_printk(KERN_ERR "azf3328: no OPL3 device at 0x%lx-0x%lx?\n", 1787 chip->synth_port, chip->synth_port+2 ); 1788 } else { 1789 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { 1790 goto out_err; 1791 } 1792 } 1793 1794 sprintf(card->longname, "%s at 0x%lx, irq %i", 1795 card->shortname, chip->codec_port, chip->irq); 1796 1797 if ((err = snd_card_register(card)) < 0) { 1798 goto out_err; 1799 } 1800 1801 #ifdef MODULE 1802 printk( 1803 "azt3328: Sound driver for Aztech AZF3328-based soundcards such as PCI168\n" 1804 "azt3328: (hardware was completely undocumented - ZERO support from Aztech).\n" 1805 "azt3328: Feel free to contact andi AT lisas.de for bug reports etc.!\n" 1806 "azt3328: User-scalable sequencer timer set to %dHz (1024000Hz / %d).\n", 1807 1024000 / seqtimer_scaling, seqtimer_scaling); 1808 #endif 1809 1810 if (snd_azf3328_config_joystick(chip, dev) < 0) 1811 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, 1812 snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY); 1813 1814 pci_set_drvdata(pci, card); 1815 dev++; 1816 1817 err = 0; 1818 goto out; 1819 1820 out_err: 1821 snd_card_free(card); 1822 1823 out: 1824 snd_azf3328_dbgcallleave(); 1825 return err; 1826 } 1827 1828 static void __devexit 1829 snd_azf3328_remove(struct pci_dev *pci) 1830 { 1831 snd_azf3328_dbgcallenter(); 1832 snd_card_free(pci_get_drvdata(pci)); 1833 pci_set_drvdata(pci, NULL); 1834 snd_azf3328_dbgcallleave(); 1835 } 1836 1837 static struct pci_driver driver = { 1838 .name = "AZF3328", 1839 .id_table = snd_azf3328_ids, 1840 .probe = snd_azf3328_probe, 1841 .remove = __devexit_p(snd_azf3328_remove), 1842 }; 1843 1844 static int __init 1845 alsa_card_azf3328_init(void) 1846 { 1847 int err; 1848 snd_azf3328_dbgcallenter(); 1849 err = pci_register_driver(&driver); 1850 snd_azf3328_dbgcallleave(); 1851 return err; 1852 } 1853 1854 static void __exit 1855 alsa_card_azf3328_exit(void) 1856 { 1857 snd_azf3328_dbgcallenter(); 1858 pci_unregister_driver(&driver); 1859 snd_azf3328_dbgcallleave(); 1860 } 1861 1862 module_init(alsa_card_azf3328_init) 1863 module_exit(alsa_card_azf3328_exit) 1864