1 /* 2 * azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168). 3 * Copyright (C) 2002, 2005, 2006, 2007 by Andreas Mohr <andi AT lisas.de> 4 * 5 * Framework borrowed from Bart Hartgers's als4000.c. 6 * Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801), 7 * found in a Fujitsu-Siemens PC ("Cordant", aluminum case). 8 * Other versions are: 9 * PCI168 A(W), sub ID 1800 10 * PCI168 A/AP, sub ID 8000 11 * Please give me feedback in case you try my driver with one of these!! 12 * 13 * GPL LICENSE 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or 17 * (at your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 24 * You should have received a copy of the GNU General Public License 25 * along with this program; if not, write to the Free Software 26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 27 * 28 * NOTES 29 * Since Aztech does not provide any chipset documentation, 30 * even on repeated request to various addresses, 31 * and the answer that was finally given was negative 32 * (and I was stupid enough to manage to get hold of a PCI168 soundcard 33 * in the first place >:-P}), 34 * I was forced to base this driver on reverse engineering 35 * (3 weeks' worth of evenings filled with driver work). 36 * (and no, I did NOT go the easy way: to pick up a SB PCI128 for 9 Euros) 37 * 38 * The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name 39 * for compatibility reasons) has the following features: 40 * 41 * - builtin AC97 conformant codec (SNR over 80dB) 42 * Note that "conformant" != "compliant"!! this chip's mixer register layout 43 * *differs* from the standard AC97 layout: 44 * they chose to not implement the headphone register (which is not a 45 * problem since it's merely optional), yet when doing this, they committed 46 * the grave sin of letting other registers follow immediately instead of 47 * keeping a headphone dummy register, thereby shifting the mixer register 48 * addresses illegally. So far unfortunately it looks like the very flexible 49 * ALSA AC97 support is still not enough to easily compensate for such a 50 * grave layout violation despite all tweaks and quirks mechanisms it offers. 51 * - builtin genuine OPL3 52 * - full duplex 16bit playback/record at independent sampling rate 53 * - MPU401 (+ legacy address support) FIXME: how to enable legacy addr?? 54 * - game port (legacy address support) 55 * - builtin 3D enhancement (said to be YAMAHA Ymersion) 56 * - builtin DirectInput support, helps reduce CPU overhead (interrupt-driven 57 * features supported) 58 * - built-in General DirectX timer having a 20 bits counter 59 * with 1us resolution (see below!) 60 * - I2S serial port for external DAC 61 * - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI 62 * - supports hardware volume control 63 * - single chip low cost solution (128 pin QFP) 64 * - supports programmable Sub-vendor and Sub-system ID 65 * required for Microsoft's logo compliance (FIXME: where?) 66 * - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms 67 * 68 * Note that this driver now is actually *better* than the Windows driver, 69 * since it additionally supports the card's 1MHz DirectX timer - just try 70 * the following snd-seq module parameters etc.: 71 * - options snd-seq seq_default_timer_class=2 seq_default_timer_sclass=0 72 * seq_default_timer_card=0 seq_client_load=1 seq_default_timer_device=0 73 * seq_default_timer_subdevice=0 seq_default_timer_resolution=1000000 74 * - "timidity -iAv -B2,8 -Os -EFreverb=0" 75 * - "pmidi -p 128:0 jazz.mid" 76 * 77 * Certain PCI versions of this card are susceptible to DMA traffic underruns 78 * in some systems (resulting in sound crackling/clicking/popping), 79 * probably because they don't have a DMA FIFO buffer or so. 80 * Overview (PCI ID/PCI subID/PCI rev.): 81 * - no DMA crackling on SiS735: 0x50DC/0x1801/16 82 * - unknown performance: 0x50DC/0x1801/10 83 * (well, it's not bad on an Athlon 1800 with now very optimized IRQ handler) 84 * 85 * Crackling happens with VIA chipsets or, in my case, an SiS735, which is 86 * supposed to be very fast and supposed to get rid of crackling much 87 * better than a VIA, yet ironically I still get crackling, like many other 88 * people with the same chipset. 89 * Possible remedies: 90 * - plug card into a different PCI slot, preferrably one that isn't shared 91 * too much (this helps a lot, but not completely!) 92 * - get rid of PCI VGA card, use AGP instead 93 * - upgrade or downgrade BIOS 94 * - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX) 95 * Not too helpful. 96 * - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS 97 * 98 * BUGS 99 * - full-duplex might *still* be problematic, not fully tested recently 100 * - (non-bug) "Bass/Treble or 3D settings don't work" - they do get evaluated 101 * if you set PCM output switch to "pre 3D" instead of "post 3D". 102 * If this can't be set, then get a mixer application that Isn't Stupid (tm) 103 * (e.g. kmix, gamix) - unfortunately several are!! 104 * 105 * TODO 106 * - test MPU401 MIDI playback etc. 107 * - add some power micro-management (disable various units of the card 108 * as long as they're unused). However this requires I/O ports which I 109 * haven't figured out yet and which thus might not even exist... 110 * The standard suspend/resume functionality could probably make use of 111 * some improvement, too... 112 * - figure out what all unknown port bits are responsible for 113 * - figure out some cleverly evil scheme to possibly make ALSA AC97 code 114 * fully accept our quite incompatible ""AC97"" mixer and thus save some 115 * code (but I'm not too optimistic that doing this is possible at all) 116 */ 117 118 #include <asm/io.h> 119 #include <linux/init.h> 120 #include <linux/pci.h> 121 #include <linux/delay.h> 122 #include <linux/slab.h> 123 #include <linux/gameport.h> 124 #include <linux/moduleparam.h> 125 #include <linux/dma-mapping.h> 126 #include <sound/core.h> 127 #include <sound/control.h> 128 #include <sound/pcm.h> 129 #include <sound/rawmidi.h> 130 #include <sound/mpu401.h> 131 #include <sound/opl3.h> 132 #include <sound/initval.h> 133 #include "azt3328.h" 134 135 MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>"); 136 MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)"); 137 MODULE_LICENSE("GPL"); 138 MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}"); 139 140 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) 141 #define SUPPORT_JOYSTICK 1 142 #endif 143 144 #define DEBUG_MISC 0 145 #define DEBUG_CALLS 0 146 #define DEBUG_MIXER 0 147 #define DEBUG_PLAY_REC 0 148 #define DEBUG_IO 0 149 #define DEBUG_TIMER 0 150 #define MIXER_TESTING 0 151 152 #if DEBUG_MISC 153 #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args) 154 #else 155 #define snd_azf3328_dbgmisc(format, args...) 156 #endif 157 158 #if DEBUG_CALLS 159 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args) 160 #define snd_azf3328_dbgcallenter() printk(KERN_ERR "--> %s\n", __func__) 161 #define snd_azf3328_dbgcallleave() printk(KERN_ERR "<-- %s\n", __func__) 162 #else 163 #define snd_azf3328_dbgcalls(format, args...) 164 #define snd_azf3328_dbgcallenter() 165 #define snd_azf3328_dbgcallleave() 166 #endif 167 168 #if DEBUG_MIXER 169 #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args) 170 #else 171 #define snd_azf3328_dbgmixer(format, args...) 172 #endif 173 174 #if DEBUG_PLAY_REC 175 #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args) 176 #else 177 #define snd_azf3328_dbgplay(format, args...) 178 #endif 179 180 #if DEBUG_MISC 181 #define snd_azf3328_dbgtimer(format, args...) printk(KERN_ERR format, ##args) 182 #else 183 #define snd_azf3328_dbgtimer(format, args...) 184 #endif 185 186 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 187 module_param_array(index, int, NULL, 0444); 188 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard."); 189 190 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 191 module_param_array(id, charp, NULL, 0444); 192 MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard."); 193 194 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 195 module_param_array(enable, bool, NULL, 0444); 196 MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard."); 197 198 #ifdef SUPPORT_JOYSTICK 199 static int joystick[SNDRV_CARDS]; 200 module_param_array(joystick, bool, NULL, 0444); 201 MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard."); 202 #endif 203 204 static int seqtimer_scaling = 128; 205 module_param(seqtimer_scaling, int, 0444); 206 MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128."); 207 208 struct snd_azf3328 { 209 /* often-used fields towards beginning, then grouped */ 210 unsigned long codec_port; 211 unsigned long io2_port; 212 unsigned long mpu_port; 213 unsigned long synth_port; 214 unsigned long mixer_port; 215 216 spinlock_t reg_lock; 217 218 struct snd_timer *timer; 219 220 struct snd_pcm *pcm; 221 struct snd_pcm_substream *playback_substream; 222 struct snd_pcm_substream *capture_substream; 223 unsigned int is_playing; 224 unsigned int is_recording; 225 226 struct snd_card *card; 227 struct snd_rawmidi *rmidi; 228 229 #ifdef SUPPORT_JOYSTICK 230 struct gameport *gameport; 231 #endif 232 233 struct pci_dev *pci; 234 int irq; 235 236 #ifdef CONFIG_PM 237 /* register value containers for power management 238 * Note: not always full I/O range preserved (just like Win driver!) */ 239 u16 saved_regs_codec [AZF_IO_SIZE_CODEC_PM / 2]; 240 u16 saved_regs_io2 [AZF_IO_SIZE_IO2_PM / 2]; 241 u16 saved_regs_mpu [AZF_IO_SIZE_MPU_PM / 2]; 242 u16 saved_regs_synth[AZF_IO_SIZE_SYNTH_PM / 2]; 243 u16 saved_regs_mixer[AZF_IO_SIZE_MIXER_PM / 2]; 244 #endif 245 }; 246 247 static const struct pci_device_id snd_azf3328_ids[] = { 248 { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* PCI168/3328 */ 249 { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 3328 */ 250 { 0, } 251 }; 252 253 MODULE_DEVICE_TABLE(pci, snd_azf3328_ids); 254 255 static inline void 256 snd_azf3328_codec_outb(const struct snd_azf3328 *chip, int reg, u8 value) 257 { 258 outb(value, chip->codec_port + reg); 259 } 260 261 static inline u8 262 snd_azf3328_codec_inb(const struct snd_azf3328 *chip, int reg) 263 { 264 return inb(chip->codec_port + reg); 265 } 266 267 static inline void 268 snd_azf3328_codec_outw(const struct snd_azf3328 *chip, int reg, u16 value) 269 { 270 outw(value, chip->codec_port + reg); 271 } 272 273 static inline u16 274 snd_azf3328_codec_inw(const struct snd_azf3328 *chip, int reg) 275 { 276 return inw(chip->codec_port + reg); 277 } 278 279 static inline void 280 snd_azf3328_codec_outl(const struct snd_azf3328 *chip, int reg, u32 value) 281 { 282 outl(value, chip->codec_port + reg); 283 } 284 285 static inline void 286 snd_azf3328_io2_outb(const struct snd_azf3328 *chip, int reg, u8 value) 287 { 288 outb(value, chip->io2_port + reg); 289 } 290 291 static inline u8 292 snd_azf3328_io2_inb(const struct snd_azf3328 *chip, int reg) 293 { 294 return inb(chip->io2_port + reg); 295 } 296 297 static inline void 298 snd_azf3328_mixer_outw(const struct snd_azf3328 *chip, int reg, u16 value) 299 { 300 outw(value, chip->mixer_port + reg); 301 } 302 303 static inline u16 304 snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, int reg) 305 { 306 return inw(chip->mixer_port + reg); 307 } 308 309 static void 310 snd_azf3328_mixer_set_mute(const struct snd_azf3328 *chip, int reg, int do_mute) 311 { 312 unsigned long portbase = chip->mixer_port + reg + 1; 313 unsigned char oldval; 314 315 /* the mute bit is on the *second* (i.e. right) register of a 316 * left/right channel setting */ 317 oldval = inb(portbase); 318 if (do_mute) 319 oldval |= 0x80; 320 else 321 oldval &= ~0x80; 322 outb(oldval, portbase); 323 } 324 325 static void 326 snd_azf3328_mixer_write_volume_gradually(const struct snd_azf3328 *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay) 327 { 328 unsigned long portbase = chip->mixer_port + reg; 329 unsigned char curr_vol_left = 0, curr_vol_right = 0; 330 int left_done = 0, right_done = 0; 331 332 snd_azf3328_dbgcallenter(); 333 if (chan_sel & SET_CHAN_LEFT) 334 curr_vol_left = inb(portbase + 1); 335 else 336 left_done = 1; 337 if (chan_sel & SET_CHAN_RIGHT) 338 curr_vol_right = inb(portbase + 0); 339 else 340 right_done = 1; 341 342 /* take care of muting flag (0x80) contained in left channel */ 343 if (curr_vol_left & 0x80) 344 dst_vol_left |= 0x80; 345 else 346 dst_vol_left &= ~0x80; 347 348 do { 349 if (!left_done) { 350 if (curr_vol_left > dst_vol_left) 351 curr_vol_left--; 352 else 353 if (curr_vol_left < dst_vol_left) 354 curr_vol_left++; 355 else 356 left_done = 1; 357 outb(curr_vol_left, portbase + 1); 358 } 359 if (!right_done) { 360 if (curr_vol_right > dst_vol_right) 361 curr_vol_right--; 362 else 363 if (curr_vol_right < dst_vol_right) 364 curr_vol_right++; 365 else 366 right_done = 1; 367 /* during volume change, the right channel is crackling 368 * somewhat more than the left channel, unfortunately. 369 * This seems to be a hardware issue. */ 370 outb(curr_vol_right, portbase + 0); 371 } 372 if (delay) 373 mdelay(delay); 374 } while ((!left_done) || (!right_done)); 375 snd_azf3328_dbgcallleave(); 376 } 377 378 /* 379 * general mixer element 380 */ 381 struct azf3328_mixer_reg { 382 unsigned int reg; 383 unsigned int lchan_shift, rchan_shift; 384 unsigned int mask; 385 unsigned int invert: 1; 386 unsigned int stereo: 1; 387 unsigned int enum_c: 4; 388 }; 389 390 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \ 391 ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \ 392 (mask << 16) | \ 393 (invert << 24) | \ 394 (stereo << 25) | \ 395 (enum_c << 26)) 396 397 static void snd_azf3328_mixer_reg_decode(struct azf3328_mixer_reg *r, unsigned long val) 398 { 399 r->reg = val & 0xff; 400 r->lchan_shift = (val >> 8) & 0x0f; 401 r->rchan_shift = (val >> 12) & 0x0f; 402 r->mask = (val >> 16) & 0xff; 403 r->invert = (val >> 24) & 1; 404 r->stereo = (val >> 25) & 1; 405 r->enum_c = (val >> 26) & 0x0f; 406 } 407 408 /* 409 * mixer switches/volumes 410 */ 411 412 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \ 413 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 414 .info = snd_azf3328_info_mixer, \ 415 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 416 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \ 417 } 418 419 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \ 420 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 421 .info = snd_azf3328_info_mixer, \ 422 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 423 .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \ 424 } 425 426 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \ 427 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 428 .info = snd_azf3328_info_mixer, \ 429 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 430 .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \ 431 } 432 433 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \ 434 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 435 .info = snd_azf3328_info_mixer, \ 436 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ 437 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \ 438 } 439 440 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \ 441 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 442 .info = snd_azf3328_info_mixer_enum, \ 443 .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \ 444 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \ 445 } 446 447 static int 448 snd_azf3328_info_mixer(struct snd_kcontrol *kcontrol, 449 struct snd_ctl_elem_info *uinfo) 450 { 451 struct azf3328_mixer_reg reg; 452 453 snd_azf3328_dbgcallenter(); 454 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 455 uinfo->type = reg.mask == 1 ? 456 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 457 uinfo->count = reg.stereo + 1; 458 uinfo->value.integer.min = 0; 459 uinfo->value.integer.max = reg.mask; 460 snd_azf3328_dbgcallleave(); 461 return 0; 462 } 463 464 static int 465 snd_azf3328_get_mixer(struct snd_kcontrol *kcontrol, 466 struct snd_ctl_elem_value *ucontrol) 467 { 468 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 469 struct azf3328_mixer_reg reg; 470 unsigned int oreg, val; 471 472 snd_azf3328_dbgcallenter(); 473 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 474 475 oreg = snd_azf3328_mixer_inw(chip, reg.reg); 476 val = (oreg >> reg.lchan_shift) & reg.mask; 477 if (reg.invert) 478 val = reg.mask - val; 479 ucontrol->value.integer.value[0] = val; 480 if (reg.stereo) { 481 val = (oreg >> reg.rchan_shift) & reg.mask; 482 if (reg.invert) 483 val = reg.mask - val; 484 ucontrol->value.integer.value[1] = val; 485 } 486 snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx " 487 "(shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", 488 reg.reg, oreg, 489 ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], 490 reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo); 491 snd_azf3328_dbgcallleave(); 492 return 0; 493 } 494 495 static int 496 snd_azf3328_put_mixer(struct snd_kcontrol *kcontrol, 497 struct snd_ctl_elem_value *ucontrol) 498 { 499 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 500 struct azf3328_mixer_reg reg; 501 unsigned int oreg, nreg, val; 502 503 snd_azf3328_dbgcallenter(); 504 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 505 oreg = snd_azf3328_mixer_inw(chip, reg.reg); 506 val = ucontrol->value.integer.value[0] & reg.mask; 507 if (reg.invert) 508 val = reg.mask - val; 509 nreg = oreg & ~(reg.mask << reg.lchan_shift); 510 nreg |= (val << reg.lchan_shift); 511 if (reg.stereo) { 512 val = ucontrol->value.integer.value[1] & reg.mask; 513 if (reg.invert) 514 val = reg.mask - val; 515 nreg &= ~(reg.mask << reg.rchan_shift); 516 nreg |= (val << reg.rchan_shift); 517 } 518 if (reg.mask >= 0x07) /* it's a volume control, so better take care */ 519 snd_azf3328_mixer_write_volume_gradually( 520 chip, reg.reg, nreg >> 8, nreg & 0xff, 521 /* just set both channels, doesn't matter */ 522 SET_CHAN_LEFT|SET_CHAN_RIGHT, 523 0); 524 else 525 snd_azf3328_mixer_outw(chip, reg.reg, nreg); 526 527 snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, " 528 "oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", 529 reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], 530 oreg, reg.lchan_shift, reg.rchan_shift, 531 nreg, snd_azf3328_mixer_inw(chip, reg.reg)); 532 snd_azf3328_dbgcallleave(); 533 return (nreg != oreg); 534 } 535 536 static int 537 snd_azf3328_info_mixer_enum(struct snd_kcontrol *kcontrol, 538 struct snd_ctl_elem_info *uinfo) 539 { 540 static const char * const texts1[] = { 541 "Mic1", "Mic2" 542 }; 543 static const char * const texts2[] = { 544 "Mix", "Mic" 545 }; 546 static const char * const texts3[] = { 547 "Mic", "CD", "Video", "Aux", 548 "Line", "Mix", "Mix Mono", "Phone" 549 }; 550 static const char * const texts4[] = { 551 "pre 3D", "post 3D" 552 }; 553 struct azf3328_mixer_reg reg; 554 555 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 556 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 557 uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1; 558 uinfo->value.enumerated.items = reg.enum_c; 559 if (uinfo->value.enumerated.item > reg.enum_c - 1U) 560 uinfo->value.enumerated.item = reg.enum_c - 1U; 561 if (reg.reg == IDX_MIXER_ADVCTL2) { 562 switch(reg.lchan_shift) { 563 case 8: /* modem out sel */ 564 strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]); 565 break; 566 case 9: /* mono sel source */ 567 strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]); 568 break; 569 case 15: /* PCM Out Path */ 570 strcpy(uinfo->value.enumerated.name, texts4[uinfo->value.enumerated.item]); 571 break; 572 } 573 } else 574 strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item] 575 ); 576 return 0; 577 } 578 579 static int 580 snd_azf3328_get_mixer_enum(struct snd_kcontrol *kcontrol, 581 struct snd_ctl_elem_value *ucontrol) 582 { 583 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 584 struct azf3328_mixer_reg reg; 585 unsigned short val; 586 587 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 588 val = snd_azf3328_mixer_inw(chip, reg.reg); 589 if (reg.reg == IDX_MIXER_REC_SELECT) { 590 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1); 591 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1); 592 } else 593 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1); 594 595 snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", 596 reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], 597 reg.lchan_shift, reg.enum_c); 598 return 0; 599 } 600 601 static int 602 snd_azf3328_put_mixer_enum(struct snd_kcontrol *kcontrol, 603 struct snd_ctl_elem_value *ucontrol) 604 { 605 struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); 606 struct azf3328_mixer_reg reg; 607 unsigned int oreg, nreg, val; 608 609 snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); 610 oreg = snd_azf3328_mixer_inw(chip, reg.reg); 611 val = oreg; 612 if (reg.reg == IDX_MIXER_REC_SELECT) { 613 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U || 614 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U) 615 return -EINVAL; 616 val = (ucontrol->value.enumerated.item[0] << 8) | 617 (ucontrol->value.enumerated.item[1] << 0); 618 } else { 619 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U) 620 return -EINVAL; 621 val &= ~((reg.enum_c - 1) << reg.lchan_shift); 622 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift); 623 } 624 snd_azf3328_mixer_outw(chip, reg.reg, val); 625 nreg = val; 626 627 snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg); 628 return (nreg != oreg); 629 } 630 631 static struct snd_kcontrol_new snd_azf3328_mixer_controls[] __devinitdata = { 632 AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1), 633 AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1), 634 AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1), 635 AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1), 636 AZF3328_MIXER_SWITCH("Wave 3D Bypass Playback Switch", IDX_MIXER_ADVCTL2, 7, 1), 637 AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1), 638 AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1), 639 AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1), 640 AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1), 641 AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1), 642 AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0), 643 AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0), 644 AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1), 645 AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1), 646 AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0), 647 AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1), 648 AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1), 649 AZF3328_MIXER_SWITCH("PC Speaker Playback Switch", IDX_MIXER_PCBEEP, 15, 1), 650 AZF3328_MIXER_VOL_SPECIAL("PC Speaker Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1), 651 AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1), 652 AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1), 653 AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1), 654 AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1), 655 AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1), 656 AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1), 657 AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1), 658 AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1), 659 AZF3328_MIXER_ENUM("Mic Select", IDX_MIXER_ADVCTL2, 2, 8), 660 AZF3328_MIXER_ENUM("Mono Output Select", IDX_MIXER_ADVCTL2, 2, 9), 661 AZF3328_MIXER_ENUM("PCM Output Route", IDX_MIXER_ADVCTL2, 2, 15), /* PCM Out Path, place in front since it controls *both* 3D and Bass/Treble! */ 662 AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0), 663 AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0), 664 AZF3328_MIXER_SWITCH("3D Control - Switch", IDX_MIXER_ADVCTL2, 13, 0), 665 AZF3328_MIXER_VOL_SPECIAL("3D Control - Width", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */ 666 AZF3328_MIXER_VOL_SPECIAL("3D Control - Depth", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */ 667 #if MIXER_TESTING 668 AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0), 669 AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0), 670 AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0), 671 AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0), 672 AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0), 673 AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0), 674 AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0), 675 AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0), 676 AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0), 677 AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0), 678 AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0), 679 AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0), 680 AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0), 681 AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0), 682 AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0), 683 AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0), 684 #endif 685 }; 686 687 static u16 __devinitdata snd_azf3328_init_values[][2] = { 688 { IDX_MIXER_PLAY_MASTER, MIXER_MUTE_MASK|0x1f1f }, 689 { IDX_MIXER_MODEMOUT, MIXER_MUTE_MASK|0x1f1f }, 690 { IDX_MIXER_BASSTREBLE, 0x0000 }, 691 { IDX_MIXER_PCBEEP, MIXER_MUTE_MASK|0x1f1f }, 692 { IDX_MIXER_MODEMIN, MIXER_MUTE_MASK|0x1f1f }, 693 { IDX_MIXER_MIC, MIXER_MUTE_MASK|0x001f }, 694 { IDX_MIXER_LINEIN, MIXER_MUTE_MASK|0x1f1f }, 695 { IDX_MIXER_CDAUDIO, MIXER_MUTE_MASK|0x1f1f }, 696 { IDX_MIXER_VIDEO, MIXER_MUTE_MASK|0x1f1f }, 697 { IDX_MIXER_AUX, MIXER_MUTE_MASK|0x1f1f }, 698 { IDX_MIXER_WAVEOUT, MIXER_MUTE_MASK|0x1f1f }, 699 { IDX_MIXER_FMSYNTH, MIXER_MUTE_MASK|0x1f1f }, 700 { IDX_MIXER_REC_VOLUME, MIXER_MUTE_MASK|0x0707 }, 701 }; 702 703 static int __devinit 704 snd_azf3328_mixer_new(struct snd_azf3328 *chip) 705 { 706 struct snd_card *card; 707 const struct snd_kcontrol_new *sw; 708 unsigned int idx; 709 int err; 710 711 snd_azf3328_dbgcallenter(); 712 snd_assert(chip != NULL && chip->card != NULL, return -EINVAL); 713 714 card = chip->card; 715 716 /* mixer reset */ 717 snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000); 718 719 /* mute and zero volume channels */ 720 for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_init_values); idx++) { 721 snd_azf3328_mixer_outw(chip, 722 snd_azf3328_init_values[idx][0], 723 snd_azf3328_init_values[idx][1]); 724 } 725 726 /* add mixer controls */ 727 sw = snd_azf3328_mixer_controls; 728 for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) { 729 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0) 730 return err; 731 } 732 snd_component_add(card, "AZF3328 mixer"); 733 strcpy(card->mixername, "AZF3328 mixer"); 734 735 snd_azf3328_dbgcallleave(); 736 return 0; 737 } 738 739 static int 740 snd_azf3328_hw_params(struct snd_pcm_substream *substream, 741 struct snd_pcm_hw_params *hw_params) 742 { 743 int res; 744 snd_azf3328_dbgcallenter(); 745 res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 746 snd_azf3328_dbgcallleave(); 747 return res; 748 } 749 750 static int 751 snd_azf3328_hw_free(struct snd_pcm_substream *substream) 752 { 753 snd_azf3328_dbgcallenter(); 754 snd_pcm_lib_free_pages(substream); 755 snd_azf3328_dbgcallleave(); 756 return 0; 757 } 758 759 static void 760 snd_azf3328_setfmt(struct snd_azf3328 *chip, 761 unsigned int reg, 762 unsigned int bitrate, 763 unsigned int format_width, 764 unsigned int channels 765 ) 766 { 767 u16 val = 0xff00; 768 unsigned long flags; 769 770 snd_azf3328_dbgcallenter(); 771 switch (bitrate) { 772 case 4000: val |= SOUNDFORMAT_FREQ_SUSPECTED_4000; break; 773 case 4800: val |= SOUNDFORMAT_FREQ_SUSPECTED_4800; break; 774 case 5512: val |= SOUNDFORMAT_FREQ_5510; break; /* the AZF3328 names it "5510" for some strange reason */ 775 case 6620: val |= SOUNDFORMAT_FREQ_6620; break; 776 case 8000: val |= SOUNDFORMAT_FREQ_8000; break; 777 case 9600: val |= SOUNDFORMAT_FREQ_9600; break; 778 case 11025: val |= SOUNDFORMAT_FREQ_11025; break; 779 case 13240: val |= SOUNDFORMAT_FREQ_SUSPECTED_13240; break; 780 case 16000: val |= SOUNDFORMAT_FREQ_16000; break; 781 case 22050: val |= SOUNDFORMAT_FREQ_22050; break; 782 case 32000: val |= SOUNDFORMAT_FREQ_32000; break; 783 case 44100: val |= SOUNDFORMAT_FREQ_44100; break; 784 case 48000: val |= SOUNDFORMAT_FREQ_48000; break; 785 case 66200: val |= SOUNDFORMAT_FREQ_SUSPECTED_66200; break; 786 default: 787 snd_printk(KERN_WARNING "unknown bitrate %d, assuming 44.1kHz!\n", bitrate); 788 val |= SOUNDFORMAT_FREQ_44100; 789 break; 790 } 791 /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) hmm, 66120, 65967, 66123 */ 792 /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) hmm, 13237.2Hz? */ 793 /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) yup, 4803Hz */ 794 /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) yup, 4003Hz */ 795 /* val = 0xff05; 5m11.556s (... -> 44100Hz) */ 796 /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */ 797 /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */ 798 /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */ 799 /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */ 800 801 if (channels == 2) 802 val |= SOUNDFORMAT_FLAG_2CHANNELS; 803 804 if (format_width == 16) 805 val |= SOUNDFORMAT_FLAG_16BIT; 806 807 spin_lock_irqsave(&chip->reg_lock, flags); 808 809 /* set bitrate/format */ 810 snd_azf3328_codec_outw(chip, reg, val); 811 812 /* changing the bitrate/format settings switches off the 813 * audio output with an annoying click in case of 8/16bit format change 814 * (maybe shutting down DAC/ADC?), thus immediately 815 * do some tweaking to reenable it and get rid of the clicking 816 * (FIXME: yes, it works, but what exactly am I doing here?? :) 817 * FIXME: does this have some side effects for full-duplex 818 * or other dramatic side effects? */ 819 if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */ 820 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 821 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | 822 DMA_PLAY_SOMETHING1 | 823 DMA_PLAY_SOMETHING2 | 824 SOMETHING_ALMOST_ALWAYS_SET | 825 DMA_EPILOGUE_SOMETHING | 826 DMA_SOMETHING_ELSE 827 ); 828 829 spin_unlock_irqrestore(&chip->reg_lock, flags); 830 snd_azf3328_dbgcallleave(); 831 } 832 833 static void 834 snd_azf3328_setdmaa(struct snd_azf3328 *chip, 835 long unsigned int addr, 836 unsigned int count, 837 unsigned int size, 838 int do_recording) 839 { 840 unsigned long flags, portbase; 841 unsigned int is_running; 842 843 snd_azf3328_dbgcallenter(); 844 if (do_recording) { 845 /* access capture registers, i.e. skip playback reg section */ 846 portbase = chip->codec_port + 0x20; 847 is_running = chip->is_recording; 848 } else { 849 /* access the playback register section */ 850 portbase = chip->codec_port + 0x00; 851 is_running = chip->is_playing; 852 } 853 854 /* AZF3328 uses a two buffer pointer DMA playback approach */ 855 if (!is_running) { 856 unsigned long addr_area2; 857 unsigned long count_areas, count_tmp; /* width 32bit -- overflow!! */ 858 count_areas = size/2; 859 addr_area2 = addr+count_areas; 860 count_areas--; /* max. index */ 861 snd_azf3328_dbgplay("set DMA: buf1 %08lx[%lu], buf2 %08lx[%lu]\n", addr, count_areas, addr_area2, count_areas); 862 863 /* build combined I/O buffer length word */ 864 count_tmp = count_areas; 865 count_areas |= (count_tmp << 16); 866 spin_lock_irqsave(&chip->reg_lock, flags); 867 outl(addr, portbase + IDX_IO_PLAY_DMA_START_1); 868 outl(addr_area2, portbase + IDX_IO_PLAY_DMA_START_2); 869 outl(count_areas, portbase + IDX_IO_PLAY_DMA_LEN_1); 870 spin_unlock_irqrestore(&chip->reg_lock, flags); 871 } 872 snd_azf3328_dbgcallleave(); 873 } 874 875 static int 876 snd_azf3328_playback_prepare(struct snd_pcm_substream *substream) 877 { 878 #if 0 879 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 880 struct snd_pcm_runtime *runtime = substream->runtime; 881 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 882 unsigned int count = snd_pcm_lib_period_bytes(substream); 883 #endif 884 885 snd_azf3328_dbgcallenter(); 886 #if 0 887 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 888 runtime->rate, 889 snd_pcm_format_width(runtime->format), 890 runtime->channels); 891 snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0); 892 #endif 893 snd_azf3328_dbgcallleave(); 894 return 0; 895 } 896 897 static int 898 snd_azf3328_capture_prepare(struct snd_pcm_substream *substream) 899 { 900 #if 0 901 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 902 struct snd_pcm_runtime *runtime = substream->runtime; 903 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 904 unsigned int count = snd_pcm_lib_period_bytes(substream); 905 #endif 906 907 snd_azf3328_dbgcallenter(); 908 #if 0 909 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, 910 runtime->rate, 911 snd_pcm_format_width(runtime->format), 912 runtime->channels); 913 snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1); 914 #endif 915 snd_azf3328_dbgcallleave(); 916 return 0; 917 } 918 919 static int 920 snd_azf3328_playback_trigger(struct snd_pcm_substream *substream, int cmd) 921 { 922 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 923 struct snd_pcm_runtime *runtime = substream->runtime; 924 int result = 0; 925 unsigned int status1; 926 927 snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd); 928 929 switch (cmd) { 930 case SNDRV_PCM_TRIGGER_START: 931 snd_azf3328_dbgplay("START PLAYBACK\n"); 932 933 /* mute WaveOut */ 934 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); 935 936 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 937 runtime->rate, 938 snd_pcm_format_width(runtime->format), 939 runtime->channels); 940 941 spin_lock(&chip->reg_lock); 942 /* stop playback */ 943 status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS); 944 status1 &= ~DMA_RESUME; 945 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 946 947 /* FIXME: clear interrupts or what??? */ 948 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_IRQTYPE, 0xffff); 949 spin_unlock(&chip->reg_lock); 950 951 snd_azf3328_setdmaa(chip, runtime->dma_addr, 952 snd_pcm_lib_period_bytes(substream), 953 snd_pcm_lib_buffer_bytes(substream), 954 0); 955 956 spin_lock(&chip->reg_lock); 957 #ifdef WIN9X 958 /* FIXME: enable playback/recording??? */ 959 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2; 960 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 961 962 /* start playback again */ 963 /* FIXME: what is this value (0x0010)??? */ 964 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING; 965 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 966 #else /* NT4 */ 967 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 968 0x0000); 969 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 970 DMA_PLAY_SOMETHING1); 971 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 972 DMA_PLAY_SOMETHING1 | 973 DMA_PLAY_SOMETHING2); 974 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 975 DMA_RESUME | 976 SOMETHING_ALMOST_ALWAYS_SET | 977 DMA_EPILOGUE_SOMETHING | 978 DMA_SOMETHING_ELSE); 979 #endif 980 spin_unlock(&chip->reg_lock); 981 982 /* now unmute WaveOut */ 983 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0); 984 985 chip->is_playing = 1; 986 snd_azf3328_dbgplay("STARTED PLAYBACK\n"); 987 break; 988 case SNDRV_PCM_TRIGGER_RESUME: 989 snd_azf3328_dbgplay("RESUME PLAYBACK\n"); 990 /* resume playback if we were active */ 991 if (chip->is_playing) 992 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 993 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | DMA_RESUME); 994 break; 995 case SNDRV_PCM_TRIGGER_STOP: 996 snd_azf3328_dbgplay("STOP PLAYBACK\n"); 997 998 /* mute WaveOut */ 999 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); 1000 1001 spin_lock(&chip->reg_lock); 1002 /* stop playback */ 1003 status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS); 1004 1005 status1 &= ~DMA_RESUME; 1006 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 1007 1008 /* hmm, is this really required? we're resetting the same bit 1009 * immediately thereafter... */ 1010 status1 |= DMA_PLAY_SOMETHING1; 1011 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 1012 1013 status1 &= ~DMA_PLAY_SOMETHING1; 1014 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); 1015 spin_unlock(&chip->reg_lock); 1016 1017 /* now unmute WaveOut */ 1018 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0); 1019 chip->is_playing = 0; 1020 snd_azf3328_dbgplay("STOPPED PLAYBACK\n"); 1021 break; 1022 case SNDRV_PCM_TRIGGER_SUSPEND: 1023 snd_azf3328_dbgplay("SUSPEND PLAYBACK\n"); 1024 /* make sure playback is stopped */ 1025 snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, 1026 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) & ~DMA_RESUME); 1027 break; 1028 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 1029 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n"); 1030 break; 1031 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 1032 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n"); 1033 break; 1034 default: 1035 printk(KERN_ERR "FIXME: unknown trigger mode!\n"); 1036 return -EINVAL; 1037 } 1038 1039 snd_azf3328_dbgcallleave(); 1040 return result; 1041 } 1042 1043 /* this is just analogous to playback; I'm not quite sure whether recording 1044 * should actually be triggered like that */ 1045 static int 1046 snd_azf3328_capture_trigger(struct snd_pcm_substream *substream, int cmd) 1047 { 1048 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1049 struct snd_pcm_runtime *runtime = substream->runtime; 1050 int result = 0; 1051 unsigned int status1; 1052 1053 snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd); 1054 1055 switch (cmd) { 1056 case SNDRV_PCM_TRIGGER_START: 1057 1058 snd_azf3328_dbgplay("START CAPTURE\n"); 1059 1060 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, 1061 runtime->rate, 1062 snd_pcm_format_width(runtime->format), 1063 runtime->channels); 1064 1065 spin_lock(&chip->reg_lock); 1066 /* stop recording */ 1067 status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS); 1068 status1 &= ~DMA_RESUME; 1069 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1070 1071 /* FIXME: clear interrupts or what??? */ 1072 snd_azf3328_codec_outw(chip, IDX_IO_REC_IRQTYPE, 0xffff); 1073 spin_unlock(&chip->reg_lock); 1074 1075 snd_azf3328_setdmaa(chip, runtime->dma_addr, 1076 snd_pcm_lib_period_bytes(substream), 1077 snd_pcm_lib_buffer_bytes(substream), 1078 1); 1079 1080 spin_lock(&chip->reg_lock); 1081 #ifdef WIN9X 1082 /* FIXME: enable playback/recording??? */ 1083 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2; 1084 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1085 1086 /* start capture again */ 1087 /* FIXME: what is this value (0x0010)??? */ 1088 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING; 1089 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1090 #else 1091 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1092 0x0000); 1093 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1094 DMA_PLAY_SOMETHING1); 1095 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1096 DMA_PLAY_SOMETHING1 | 1097 DMA_PLAY_SOMETHING2); 1098 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1099 DMA_RESUME | 1100 SOMETHING_ALMOST_ALWAYS_SET | 1101 DMA_EPILOGUE_SOMETHING | 1102 DMA_SOMETHING_ELSE); 1103 #endif 1104 spin_unlock(&chip->reg_lock); 1105 1106 chip->is_recording = 1; 1107 snd_azf3328_dbgplay("STARTED CAPTURE\n"); 1108 break; 1109 case SNDRV_PCM_TRIGGER_RESUME: 1110 snd_azf3328_dbgplay("RESUME CAPTURE\n"); 1111 /* resume recording if we were active */ 1112 if (chip->is_recording) 1113 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1114 snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) | DMA_RESUME); 1115 break; 1116 case SNDRV_PCM_TRIGGER_STOP: 1117 snd_azf3328_dbgplay("STOP CAPTURE\n"); 1118 1119 spin_lock(&chip->reg_lock); 1120 /* stop recording */ 1121 status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS); 1122 1123 status1 &= ~DMA_RESUME; 1124 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1125 1126 status1 |= DMA_PLAY_SOMETHING1; 1127 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1128 1129 status1 &= ~DMA_PLAY_SOMETHING1; 1130 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); 1131 spin_unlock(&chip->reg_lock); 1132 1133 chip->is_recording = 0; 1134 snd_azf3328_dbgplay("STOPPED CAPTURE\n"); 1135 break; 1136 case SNDRV_PCM_TRIGGER_SUSPEND: 1137 snd_azf3328_dbgplay("SUSPEND CAPTURE\n"); 1138 /* make sure recording is stopped */ 1139 snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, 1140 snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) & ~DMA_RESUME); 1141 break; 1142 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 1143 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n"); 1144 break; 1145 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 1146 snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n"); 1147 break; 1148 default: 1149 printk(KERN_ERR "FIXME: unknown trigger mode!\n"); 1150 return -EINVAL; 1151 } 1152 1153 snd_azf3328_dbgcallleave(); 1154 return result; 1155 } 1156 1157 static snd_pcm_uframes_t 1158 snd_azf3328_playback_pointer(struct snd_pcm_substream *substream) 1159 { 1160 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1161 unsigned long bufptr, result; 1162 snd_pcm_uframes_t frmres; 1163 1164 #ifdef QUERY_HARDWARE 1165 bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1); 1166 #else 1167 bufptr = substream->runtime->dma_addr; 1168 #endif 1169 result = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS); 1170 1171 /* calculate offset */ 1172 result -= bufptr; 1173 frmres = bytes_to_frames( substream->runtime, result); 1174 snd_azf3328_dbgplay("PLAY @ 0x%8lx, frames %8ld\n", result, frmres); 1175 return frmres; 1176 } 1177 1178 static snd_pcm_uframes_t 1179 snd_azf3328_capture_pointer(struct snd_pcm_substream *substream) 1180 { 1181 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1182 unsigned long bufptr, result; 1183 snd_pcm_uframes_t frmres; 1184 1185 #ifdef QUERY_HARDWARE 1186 bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1); 1187 #else 1188 bufptr = substream->runtime->dma_addr; 1189 #endif 1190 result = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS); 1191 1192 /* calculate offset */ 1193 result -= bufptr; 1194 frmres = bytes_to_frames( substream->runtime, result); 1195 snd_azf3328_dbgplay("REC @ 0x%8lx, frames %8ld\n", result, frmres); 1196 return frmres; 1197 } 1198 1199 static irqreturn_t 1200 snd_azf3328_interrupt(int irq, void *dev_id) 1201 { 1202 struct snd_azf3328 *chip = dev_id; 1203 u8 status, which; 1204 static unsigned long irq_count; 1205 1206 status = snd_azf3328_codec_inb(chip, IDX_IO_IRQSTATUS); 1207 1208 /* fast path out, to ease interrupt sharing */ 1209 if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_TIMER))) 1210 return IRQ_NONE; /* must be interrupt for another device */ 1211 1212 snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQTYPE %04x, IDX_IO_IRQSTATUS %04x\n", 1213 irq_count, 1214 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS), 1215 snd_azf3328_codec_inw(chip, IDX_IO_PLAY_IRQTYPE), 1216 status); 1217 1218 if (status & IRQ_TIMER) { 1219 /* snd_azf3328_dbgplay("timer %ld\n", inl(chip->codec_port+IDX_IO_TIMER_VALUE) & TIMER_VALUE_MASK); */ 1220 if (chip->timer) 1221 snd_timer_interrupt(chip->timer, chip->timer->sticks); 1222 /* ACK timer */ 1223 spin_lock(&chip->reg_lock); 1224 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07); 1225 spin_unlock(&chip->reg_lock); 1226 snd_azf3328_dbgplay("azt3328: timer IRQ\n"); 1227 } 1228 if (status & IRQ_PLAYBACK) { 1229 spin_lock(&chip->reg_lock); 1230 which = snd_azf3328_codec_inb(chip, IDX_IO_PLAY_IRQTYPE); 1231 /* ack all IRQ types immediately */ 1232 snd_azf3328_codec_outb(chip, IDX_IO_PLAY_IRQTYPE, which); 1233 spin_unlock(&chip->reg_lock); 1234 1235 if (chip->pcm && chip->playback_substream) { 1236 snd_pcm_period_elapsed(chip->playback_substream); 1237 snd_azf3328_dbgplay("PLAY period done (#%x), @ %x\n", 1238 which, 1239 inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS)); 1240 } else 1241 snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n"); 1242 if (which & IRQ_PLAY_SOMETHING) 1243 snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n"); 1244 } 1245 if (status & IRQ_RECORDING) { 1246 spin_lock(&chip->reg_lock); 1247 which = snd_azf3328_codec_inb(chip, IDX_IO_REC_IRQTYPE); 1248 /* ack all IRQ types immediately */ 1249 snd_azf3328_codec_outb(chip, IDX_IO_REC_IRQTYPE, which); 1250 spin_unlock(&chip->reg_lock); 1251 1252 if (chip->pcm && chip->capture_substream) { 1253 snd_pcm_period_elapsed(chip->capture_substream); 1254 snd_azf3328_dbgplay("REC period done (#%x), @ %x\n", 1255 which, 1256 inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS)); 1257 } else 1258 snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n"); 1259 if (which & IRQ_REC_SOMETHING) 1260 snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n"); 1261 } 1262 /* MPU401 has less critical IRQ requirements 1263 * than timer and playback/recording, right? */ 1264 if (status & IRQ_MPU401) { 1265 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); 1266 1267 /* hmm, do we have to ack the IRQ here somehow? 1268 * If so, then I don't know how... */ 1269 snd_azf3328_dbgplay("azt3328: MPU401 IRQ\n"); 1270 } 1271 irq_count++; 1272 return IRQ_HANDLED; 1273 } 1274 1275 /*****************************************************************/ 1276 1277 static const struct snd_pcm_hardware snd_azf3328_playback = 1278 { 1279 /* FIXME!! Correct? */ 1280 .info = SNDRV_PCM_INFO_MMAP | 1281 SNDRV_PCM_INFO_INTERLEAVED | 1282 SNDRV_PCM_INFO_MMAP_VALID, 1283 .formats = SNDRV_PCM_FMTBIT_S8 | 1284 SNDRV_PCM_FMTBIT_U8 | 1285 SNDRV_PCM_FMTBIT_S16_LE | 1286 SNDRV_PCM_FMTBIT_U16_LE, 1287 .rates = SNDRV_PCM_RATE_5512 | 1288 SNDRV_PCM_RATE_8000_48000 | 1289 SNDRV_PCM_RATE_KNOT, 1290 .rate_min = 4000, 1291 .rate_max = 66200, 1292 .channels_min = 1, 1293 .channels_max = 2, 1294 .buffer_bytes_max = 65536, 1295 .period_bytes_min = 64, 1296 .period_bytes_max = 65536, 1297 .periods_min = 1, 1298 .periods_max = 1024, 1299 /* FIXME: maybe that card actually has a FIFO? 1300 * Hmm, it seems newer revisions do have one, but we still don't know 1301 * its size... */ 1302 .fifo_size = 0, 1303 }; 1304 1305 static const struct snd_pcm_hardware snd_azf3328_capture = 1306 { 1307 /* FIXME */ 1308 .info = SNDRV_PCM_INFO_MMAP | 1309 SNDRV_PCM_INFO_INTERLEAVED | 1310 SNDRV_PCM_INFO_MMAP_VALID, 1311 .formats = SNDRV_PCM_FMTBIT_S8 | 1312 SNDRV_PCM_FMTBIT_U8 | 1313 SNDRV_PCM_FMTBIT_S16_LE | 1314 SNDRV_PCM_FMTBIT_U16_LE, 1315 .rates = SNDRV_PCM_RATE_5512 | 1316 SNDRV_PCM_RATE_8000_48000 | 1317 SNDRV_PCM_RATE_KNOT, 1318 .rate_min = 4000, 1319 .rate_max = 66200, 1320 .channels_min = 1, 1321 .channels_max = 2, 1322 .buffer_bytes_max = 65536, 1323 .period_bytes_min = 64, 1324 .period_bytes_max = 65536, 1325 .periods_min = 1, 1326 .periods_max = 1024, 1327 .fifo_size = 0, 1328 }; 1329 1330 1331 static unsigned int snd_azf3328_fixed_rates[] = { 1332 4000, 4800, 5512, 6620, 8000, 9600, 11025, 13240, 16000, 22050, 32000, 1333 44100, 48000, 66200 }; 1334 static struct snd_pcm_hw_constraint_list snd_azf3328_hw_constraints_rates = { 1335 .count = ARRAY_SIZE(snd_azf3328_fixed_rates), 1336 .list = snd_azf3328_fixed_rates, 1337 .mask = 0, 1338 }; 1339 1340 /*****************************************************************/ 1341 1342 static int 1343 snd_azf3328_playback_open(struct snd_pcm_substream *substream) 1344 { 1345 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1346 struct snd_pcm_runtime *runtime = substream->runtime; 1347 1348 snd_azf3328_dbgcallenter(); 1349 chip->playback_substream = substream; 1350 runtime->hw = snd_azf3328_playback; 1351 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1352 &snd_azf3328_hw_constraints_rates); 1353 snd_azf3328_dbgcallleave(); 1354 return 0; 1355 } 1356 1357 static int 1358 snd_azf3328_capture_open(struct snd_pcm_substream *substream) 1359 { 1360 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1361 struct snd_pcm_runtime *runtime = substream->runtime; 1362 1363 snd_azf3328_dbgcallenter(); 1364 chip->capture_substream = substream; 1365 runtime->hw = snd_azf3328_capture; 1366 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1367 &snd_azf3328_hw_constraints_rates); 1368 snd_azf3328_dbgcallleave(); 1369 return 0; 1370 } 1371 1372 static int 1373 snd_azf3328_playback_close(struct snd_pcm_substream *substream) 1374 { 1375 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1376 1377 snd_azf3328_dbgcallenter(); 1378 chip->playback_substream = NULL; 1379 snd_azf3328_dbgcallleave(); 1380 return 0; 1381 } 1382 1383 static int 1384 snd_azf3328_capture_close(struct snd_pcm_substream *substream) 1385 { 1386 struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); 1387 1388 snd_azf3328_dbgcallenter(); 1389 chip->capture_substream = NULL; 1390 snd_azf3328_dbgcallleave(); 1391 return 0; 1392 } 1393 1394 /******************************************************************/ 1395 1396 static struct snd_pcm_ops snd_azf3328_playback_ops = { 1397 .open = snd_azf3328_playback_open, 1398 .close = snd_azf3328_playback_close, 1399 .ioctl = snd_pcm_lib_ioctl, 1400 .hw_params = snd_azf3328_hw_params, 1401 .hw_free = snd_azf3328_hw_free, 1402 .prepare = snd_azf3328_playback_prepare, 1403 .trigger = snd_azf3328_playback_trigger, 1404 .pointer = snd_azf3328_playback_pointer 1405 }; 1406 1407 static struct snd_pcm_ops snd_azf3328_capture_ops = { 1408 .open = snd_azf3328_capture_open, 1409 .close = snd_azf3328_capture_close, 1410 .ioctl = snd_pcm_lib_ioctl, 1411 .hw_params = snd_azf3328_hw_params, 1412 .hw_free = snd_azf3328_hw_free, 1413 .prepare = snd_azf3328_capture_prepare, 1414 .trigger = snd_azf3328_capture_trigger, 1415 .pointer = snd_azf3328_capture_pointer 1416 }; 1417 1418 static int __devinit 1419 snd_azf3328_pcm(struct snd_azf3328 *chip, int device) 1420 { 1421 struct snd_pcm *pcm; 1422 int err; 1423 1424 snd_azf3328_dbgcallenter(); 1425 if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0) 1426 return err; 1427 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops); 1428 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops); 1429 1430 pcm->private_data = chip; 1431 pcm->info_flags = 0; 1432 strcpy(pcm->name, chip->card->shortname); 1433 chip->pcm = pcm; 1434 1435 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1436 snd_dma_pci_data(chip->pci), 64*1024, 64*1024); 1437 1438 snd_azf3328_dbgcallleave(); 1439 return 0; 1440 } 1441 1442 /******************************************************************/ 1443 1444 #ifdef SUPPORT_JOYSTICK 1445 static int __devinit 1446 snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) 1447 { 1448 struct gameport *gp; 1449 struct resource *r; 1450 1451 if (!joystick[dev]) 1452 return -ENODEV; 1453 1454 if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) { 1455 printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n"); 1456 return -EBUSY; 1457 } 1458 1459 chip->gameport = gp = gameport_allocate_port(); 1460 if (!gp) { 1461 printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n"); 1462 release_and_free_resource(r); 1463 return -ENOMEM; 1464 } 1465 1466 gameport_set_name(gp, "AZF3328 Gameport"); 1467 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); 1468 gameport_set_dev_parent(gp, &chip->pci->dev); 1469 gp->io = 0x200; 1470 gameport_set_port_data(gp, r); 1471 1472 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, 1473 snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY); 1474 1475 gameport_register_port(chip->gameport); 1476 1477 return 0; 1478 } 1479 1480 static void 1481 snd_azf3328_free_joystick(struct snd_azf3328 *chip) 1482 { 1483 if (chip->gameport) { 1484 struct resource *r = gameport_get_port_data(chip->gameport); 1485 1486 gameport_unregister_port(chip->gameport); 1487 chip->gameport = NULL; 1488 /* disable gameport */ 1489 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, 1490 snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY); 1491 release_and_free_resource(r); 1492 } 1493 } 1494 #else 1495 static inline int 1496 snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) { return -ENOSYS; } 1497 static inline void 1498 snd_azf3328_free_joystick(struct snd_azf3328 *chip) { } 1499 #endif 1500 1501 /******************************************************************/ 1502 1503 static int 1504 snd_azf3328_free(struct snd_azf3328 *chip) 1505 { 1506 if (chip->irq < 0) 1507 goto __end_hw; 1508 1509 /* reset (close) mixer */ 1510 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */ 1511 snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000); 1512 1513 /* interrupt setup - mask everything (FIXME!) */ 1514 /* well, at least we know how to disable the timer IRQ */ 1515 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); 1516 1517 if (chip->irq >= 0) 1518 synchronize_irq(chip->irq); 1519 __end_hw: 1520 snd_azf3328_free_joystick(chip); 1521 if (chip->irq >= 0) 1522 free_irq(chip->irq, chip); 1523 pci_release_regions(chip->pci); 1524 pci_disable_device(chip->pci); 1525 1526 kfree(chip); 1527 return 0; 1528 } 1529 1530 static int 1531 snd_azf3328_dev_free(struct snd_device *device) 1532 { 1533 struct snd_azf3328 *chip = device->device_data; 1534 return snd_azf3328_free(chip); 1535 } 1536 1537 /******************************************************************/ 1538 1539 /*** NOTE: the physical timer resolution actually is 1024000 ticks per second, 1540 *** but announcing those attributes to user-space would make programs 1541 *** configure the timer to a 1 tick value, resulting in an absolutely fatal 1542 *** timer IRQ storm. 1543 *** Thus I chose to announce a down-scaled virtual timer to the outside and 1544 *** calculate real timer countdown values internally. 1545 *** (the scale factor can be set via module parameter "seqtimer_scaling"). 1546 ***/ 1547 1548 static int 1549 snd_azf3328_timer_start(struct snd_timer *timer) 1550 { 1551 struct snd_azf3328 *chip; 1552 unsigned long flags; 1553 unsigned int delay; 1554 1555 snd_azf3328_dbgcallenter(); 1556 chip = snd_timer_chip(timer); 1557 delay = ((timer->sticks * seqtimer_scaling) - 1) & TIMER_VALUE_MASK; 1558 if (delay < 49) { 1559 /* uhoh, that's not good, since user-space won't know about 1560 * this timing tweak 1561 * (we need to do it to avoid a lockup, though) */ 1562 1563 snd_azf3328_dbgtimer("delay was too low (%d)!\n", delay); 1564 delay = 49; /* minimum time is 49 ticks */ 1565 } 1566 snd_azf3328_dbgtimer("setting timer countdown value %d, add COUNTDOWN|IRQ\n", delay); 1567 delay |= TIMER_ENABLE_COUNTDOWN | TIMER_ENABLE_IRQ; 1568 spin_lock_irqsave(&chip->reg_lock, flags); 1569 snd_azf3328_codec_outl(chip, IDX_IO_TIMER_VALUE, delay); 1570 spin_unlock_irqrestore(&chip->reg_lock, flags); 1571 snd_azf3328_dbgcallleave(); 1572 return 0; 1573 } 1574 1575 static int 1576 snd_azf3328_timer_stop(struct snd_timer *timer) 1577 { 1578 struct snd_azf3328 *chip; 1579 unsigned long flags; 1580 1581 snd_azf3328_dbgcallenter(); 1582 chip = snd_timer_chip(timer); 1583 spin_lock_irqsave(&chip->reg_lock, flags); 1584 /* disable timer countdown and interrupt */ 1585 /* FIXME: should we write TIMER_ACK_IRQ here? */ 1586 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0); 1587 spin_unlock_irqrestore(&chip->reg_lock, flags); 1588 snd_azf3328_dbgcallleave(); 1589 return 0; 1590 } 1591 1592 1593 static int 1594 snd_azf3328_timer_precise_resolution(struct snd_timer *timer, 1595 unsigned long *num, unsigned long *den) 1596 { 1597 snd_azf3328_dbgcallenter(); 1598 *num = 1; 1599 *den = 1024000 / seqtimer_scaling; 1600 snd_azf3328_dbgcallleave(); 1601 return 0; 1602 } 1603 1604 static struct snd_timer_hardware snd_azf3328_timer_hw = { 1605 .flags = SNDRV_TIMER_HW_AUTO, 1606 .resolution = 977, /* 1000000/1024000 = 0.9765625us */ 1607 .ticks = 1024000, /* max tick count, defined by the value register; actually it's not 1024000, but 1048576, but we don't care */ 1608 .start = snd_azf3328_timer_start, 1609 .stop = snd_azf3328_timer_stop, 1610 .precise_resolution = snd_azf3328_timer_precise_resolution, 1611 }; 1612 1613 static int __devinit 1614 snd_azf3328_timer(struct snd_azf3328 *chip, int device) 1615 { 1616 struct snd_timer *timer = NULL; 1617 struct snd_timer_id tid; 1618 int err; 1619 1620 snd_azf3328_dbgcallenter(); 1621 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1622 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1623 tid.card = chip->card->number; 1624 tid.device = device; 1625 tid.subdevice = 0; 1626 1627 snd_azf3328_timer_hw.resolution *= seqtimer_scaling; 1628 snd_azf3328_timer_hw.ticks /= seqtimer_scaling; 1629 if ((err = snd_timer_new(chip->card, "AZF3328", &tid, &timer)) < 0) { 1630 goto out; 1631 } 1632 1633 strcpy(timer->name, "AZF3328 timer"); 1634 timer->private_data = chip; 1635 timer->hw = snd_azf3328_timer_hw; 1636 1637 chip->timer = timer; 1638 1639 err = 0; 1640 1641 out: 1642 snd_azf3328_dbgcallleave(); 1643 return err; 1644 } 1645 1646 /******************************************************************/ 1647 1648 #if 0 1649 /* check whether a bit can be modified */ 1650 static void 1651 snd_azf3328_test_bit(unsigned int reg, int bit) 1652 { 1653 unsigned char val, valoff, valon; 1654 1655 val = inb(reg); 1656 1657 outb(val & ~(1 << bit), reg); 1658 valoff = inb(reg); 1659 1660 outb(val|(1 << bit), reg); 1661 valon = inb(reg); 1662 1663 outb(val, reg); 1664 1665 printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon); 1666 } 1667 #endif 1668 1669 #if DEBUG_MISC 1670 static void 1671 snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip) 1672 { 1673 u16 tmp; 1674 1675 snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq); 1676 1677 snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_inb(chip, 0), snd_azf3328_io2_inb(chip, 1), snd_azf3328_io2_inb(chip, 2), snd_azf3328_io2_inb(chip, 3), snd_azf3328_io2_inb(chip, 4), snd_azf3328_io2_inb(chip, 5)); 1678 1679 for (tmp=0; tmp <= 0x01; tmp += 1) 1680 snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp)); 1681 1682 for (tmp = 0; tmp < AZF_IO_SIZE_CODEC; tmp += 2) 1683 snd_azf3328_dbgmisc("codec 0x%02x: 0x%04x\n", tmp, snd_azf3328_codec_inw(chip, tmp)); 1684 1685 for (tmp = 0; tmp < AZF_IO_SIZE_MIXER; tmp += 2) 1686 snd_azf3328_dbgmisc("mixer 0x%02x: 0x%04x\n", tmp, snd_azf3328_mixer_inw(chip, tmp)); 1687 } 1688 #else 1689 static inline void 1690 snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip) {} 1691 #endif 1692 1693 static int __devinit 1694 snd_azf3328_create(struct snd_card *card, 1695 struct pci_dev *pci, 1696 unsigned long device_type, 1697 struct snd_azf3328 ** rchip) 1698 { 1699 struct snd_azf3328 *chip; 1700 int err; 1701 static struct snd_device_ops ops = { 1702 .dev_free = snd_azf3328_dev_free, 1703 }; 1704 u16 tmp; 1705 1706 *rchip = NULL; 1707 1708 if ((err = pci_enable_device(pci)) < 0) 1709 return err; 1710 1711 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1712 if (chip == NULL) { 1713 err = -ENOMEM; 1714 goto out_err; 1715 } 1716 spin_lock_init(&chip->reg_lock); 1717 chip->card = card; 1718 chip->pci = pci; 1719 chip->irq = -1; 1720 1721 /* check if we can restrict PCI DMA transfers to 24 bits */ 1722 if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 || 1723 pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) { 1724 snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n"); 1725 err = -ENXIO; 1726 goto out_err; 1727 } 1728 1729 if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) { 1730 goto out_err; 1731 } 1732 1733 chip->codec_port = pci_resource_start(pci, 0); 1734 chip->io2_port = pci_resource_start(pci, 1); 1735 chip->mpu_port = pci_resource_start(pci, 2); 1736 chip->synth_port = pci_resource_start(pci, 3); 1737 chip->mixer_port = pci_resource_start(pci, 4); 1738 1739 if (request_irq(pci->irq, snd_azf3328_interrupt, 1740 IRQF_SHARED, card->shortname, chip)) { 1741 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 1742 err = -EBUSY; 1743 goto out_err; 1744 } 1745 chip->irq = pci->irq; 1746 pci_set_master(pci); 1747 synchronize_irq(chip->irq); 1748 1749 snd_azf3328_debug_show_ports(chip); 1750 1751 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1752 goto out_err; 1753 } 1754 1755 /* create mixer interface & switches */ 1756 if ((err = snd_azf3328_mixer_new(chip)) < 0) 1757 goto out_err; 1758 1759 #if 0 1760 /* set very low bitrate to reduce noise and power consumption? */ 1761 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1); 1762 #endif 1763 1764 /* standard chip init stuff */ 1765 /* default IRQ init value */ 1766 tmp = DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE; 1767 1768 spin_lock_irq(&chip->reg_lock); 1769 snd_azf3328_codec_outb(chip, IDX_IO_PLAY_FLAGS, tmp); 1770 snd_azf3328_codec_outb(chip, IDX_IO_REC_FLAGS, tmp); 1771 snd_azf3328_codec_outb(chip, IDX_IO_SOMETHING_FLAGS, tmp); 1772 snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); /* disable timer */ 1773 spin_unlock_irq(&chip->reg_lock); 1774 1775 snd_card_set_dev(card, &pci->dev); 1776 1777 *rchip = chip; 1778 1779 err = 0; 1780 goto out; 1781 1782 out_err: 1783 if (chip) 1784 snd_azf3328_free(chip); 1785 pci_disable_device(pci); 1786 1787 out: 1788 return err; 1789 } 1790 1791 static int __devinit 1792 snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) 1793 { 1794 static int dev; 1795 struct snd_card *card; 1796 struct snd_azf3328 *chip; 1797 struct snd_opl3 *opl3; 1798 int err; 1799 1800 snd_azf3328_dbgcallenter(); 1801 if (dev >= SNDRV_CARDS) 1802 return -ENODEV; 1803 if (!enable[dev]) { 1804 dev++; 1805 return -ENOENT; 1806 } 1807 1808 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 ); 1809 if (card == NULL) 1810 return -ENOMEM; 1811 1812 strcpy(card->driver, "AZF3328"); 1813 strcpy(card->shortname, "Aztech AZF3328 (PCI168)"); 1814 1815 if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) { 1816 goto out_err; 1817 } 1818 1819 card->private_data = chip; 1820 1821 if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401, 1822 chip->mpu_port, MPU401_INFO_INTEGRATED, 1823 pci->irq, 0, &chip->rmidi)) < 0) { 1824 snd_printk(KERN_ERR "azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port); 1825 goto out_err; 1826 } 1827 1828 if ((err = snd_azf3328_timer(chip, 0)) < 0) { 1829 goto out_err; 1830 } 1831 1832 if ((err = snd_azf3328_pcm(chip, 0)) < 0) { 1833 goto out_err; 1834 } 1835 1836 if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2, 1837 OPL3_HW_AUTO, 1, &opl3) < 0) { 1838 snd_printk(KERN_ERR "azf3328: no OPL3 device at 0x%lx-0x%lx?\n", 1839 chip->synth_port, chip->synth_port+2 ); 1840 } else { 1841 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { 1842 goto out_err; 1843 } 1844 } 1845 1846 opl3->private_data = chip; 1847 1848 sprintf(card->longname, "%s at 0x%lx, irq %i", 1849 card->shortname, chip->codec_port, chip->irq); 1850 1851 if ((err = snd_card_register(card)) < 0) { 1852 goto out_err; 1853 } 1854 1855 #ifdef MODULE 1856 printk( 1857 "azt3328: Sound driver for Aztech AZF3328-based soundcards such as PCI168.\n" 1858 "azt3328: Hardware was completely undocumented, unfortunately.\n" 1859 "azt3328: Feel free to contact andi AT lisas.de for bug reports etc.!\n" 1860 "azt3328: User-scalable sequencer timer set to %dHz (1024000Hz / %d).\n", 1861 1024000 / seqtimer_scaling, seqtimer_scaling); 1862 #endif 1863 1864 if (snd_azf3328_config_joystick(chip, dev) < 0) 1865 snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, 1866 snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY); 1867 1868 pci_set_drvdata(pci, card); 1869 dev++; 1870 1871 err = 0; 1872 goto out; 1873 1874 out_err: 1875 snd_card_free(card); 1876 1877 out: 1878 snd_azf3328_dbgcallleave(); 1879 return err; 1880 } 1881 1882 static void __devexit 1883 snd_azf3328_remove(struct pci_dev *pci) 1884 { 1885 snd_azf3328_dbgcallenter(); 1886 snd_card_free(pci_get_drvdata(pci)); 1887 pci_set_drvdata(pci, NULL); 1888 snd_azf3328_dbgcallleave(); 1889 } 1890 1891 #ifdef CONFIG_PM 1892 static int 1893 snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state) 1894 { 1895 struct snd_card *card = pci_get_drvdata(pci); 1896 struct snd_azf3328 *chip = card->private_data; 1897 int reg; 1898 1899 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1900 1901 snd_pcm_suspend_all(chip->pcm); 1902 1903 for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; reg++) 1904 chip->saved_regs_mixer[reg] = inw(chip->mixer_port + reg * 2); 1905 1906 /* make sure to disable master volume etc. to prevent looping sound */ 1907 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); 1908 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); 1909 1910 for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; reg++) 1911 chip->saved_regs_codec[reg] = inw(chip->codec_port + reg * 2); 1912 for (reg = 0; reg < AZF_IO_SIZE_IO2_PM / 2; reg++) 1913 chip->saved_regs_io2[reg] = inw(chip->io2_port + reg * 2); 1914 for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; reg++) 1915 chip->saved_regs_mpu[reg] = inw(chip->mpu_port + reg * 2); 1916 for (reg = 0; reg < AZF_IO_SIZE_SYNTH_PM / 2; reg++) 1917 chip->saved_regs_synth[reg] = inw(chip->synth_port + reg * 2); 1918 1919 pci_disable_device(pci); 1920 pci_save_state(pci); 1921 pci_set_power_state(pci, pci_choose_state(pci, state)); 1922 return 0; 1923 } 1924 1925 static int 1926 snd_azf3328_resume(struct pci_dev *pci) 1927 { 1928 struct snd_card *card = pci_get_drvdata(pci); 1929 struct snd_azf3328 *chip = card->private_data; 1930 int reg; 1931 1932 pci_set_power_state(pci, PCI_D0); 1933 pci_restore_state(pci); 1934 if (pci_enable_device(pci) < 0) { 1935 printk(KERN_ERR "azt3328: pci_enable_device failed, " 1936 "disabling device\n"); 1937 snd_card_disconnect(card); 1938 return -EIO; 1939 } 1940 pci_set_master(pci); 1941 1942 for (reg = 0; reg < AZF_IO_SIZE_IO2_PM / 2; reg++) 1943 outw(chip->saved_regs_io2[reg], chip->io2_port + reg * 2); 1944 for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; reg++) 1945 outw(chip->saved_regs_mpu[reg], chip->mpu_port + reg * 2); 1946 for (reg = 0; reg < AZF_IO_SIZE_SYNTH_PM / 2; reg++) 1947 outw(chip->saved_regs_synth[reg], chip->synth_port + reg * 2); 1948 for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; reg++) 1949 outw(chip->saved_regs_mixer[reg], chip->mixer_port + reg * 2); 1950 for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; reg++) 1951 outw(chip->saved_regs_codec[reg], chip->codec_port + reg * 2); 1952 1953 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1954 return 0; 1955 } 1956 #endif 1957 1958 1959 1960 1961 static struct pci_driver driver = { 1962 .name = "AZF3328", 1963 .id_table = snd_azf3328_ids, 1964 .probe = snd_azf3328_probe, 1965 .remove = __devexit_p(snd_azf3328_remove), 1966 #ifdef CONFIG_PM 1967 .suspend = snd_azf3328_suspend, 1968 .resume = snd_azf3328_resume, 1969 #endif 1970 }; 1971 1972 static int __init 1973 alsa_card_azf3328_init(void) 1974 { 1975 int err; 1976 snd_azf3328_dbgcallenter(); 1977 err = pci_register_driver(&driver); 1978 snd_azf3328_dbgcallleave(); 1979 return err; 1980 } 1981 1982 static void __exit 1983 alsa_card_azf3328_exit(void) 1984 { 1985 snd_azf3328_dbgcallenter(); 1986 pci_unregister_driver(&driver); 1987 snd_azf3328_dbgcallleave(); 1988 } 1989 1990 module_init(alsa_card_azf3328_init) 1991 module_exit(alsa_card_azf3328_exit) 1992