1 /* 2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers 3 * 4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 #include <sound/driver.h> 23 #include <asm/io.h> 24 #include <linux/delay.h> 25 #include <linux/interrupt.h> 26 #include <linux/init.h> 27 #include <linux/pci.h> 28 #include <linux/slab.h> 29 #include <linux/moduleparam.h> 30 #include <linux/mutex.h> 31 #include <sound/core.h> 32 #include <sound/pcm.h> 33 #include <sound/pcm_params.h> 34 #include <sound/info.h> 35 #include <sound/ac97_codec.h> 36 #include <sound/initval.h> 37 38 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); 39 MODULE_DESCRIPTION("ATI IXP AC97 controller"); 40 MODULE_LICENSE("GPL"); 41 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}"); 42 43 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */ 44 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ 45 static int ac97_clock = 48000; 46 static char *ac97_quirk; 47 static int spdif_aclink = 1; 48 49 module_param(index, int, 0444); 50 MODULE_PARM_DESC(index, "Index value for ATI IXP controller."); 51 module_param(id, charp, 0444); 52 MODULE_PARM_DESC(id, "ID string for ATI IXP controller."); 53 module_param(ac97_clock, int, 0444); 54 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); 55 module_param(ac97_quirk, charp, 0444); 56 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 57 module_param(spdif_aclink, bool, 0444); 58 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link."); 59 60 /* just for backward compatibility */ 61 static int enable; 62 module_param(enable, bool, 0444); 63 64 65 /* 66 */ 67 68 #define ATI_REG_ISR 0x00 /* interrupt source */ 69 #define ATI_REG_ISR_IN_XRUN (1U<<0) 70 #define ATI_REG_ISR_IN_STATUS (1U<<1) 71 #define ATI_REG_ISR_OUT_XRUN (1U<<2) 72 #define ATI_REG_ISR_OUT_STATUS (1U<<3) 73 #define ATI_REG_ISR_SPDF_XRUN (1U<<4) 74 #define ATI_REG_ISR_SPDF_STATUS (1U<<5) 75 #define ATI_REG_ISR_PHYS_INTR (1U<<8) 76 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9) 77 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10) 78 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11) 79 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12) 80 #define ATI_REG_ISR_NEW_FRAME (1U<<13) 81 82 #define ATI_REG_IER 0x04 /* interrupt enable */ 83 #define ATI_REG_IER_IN_XRUN_EN (1U<<0) 84 #define ATI_REG_IER_IO_STATUS_EN (1U<<1) 85 #define ATI_REG_IER_OUT_XRUN_EN (1U<<2) 86 #define ATI_REG_IER_OUT_XRUN_COND (1U<<3) 87 #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4) 88 #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5) 89 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8) 90 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9) 91 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10) 92 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11) 93 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12) 94 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */ 95 #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */ 96 97 #define ATI_REG_CMD 0x08 /* command */ 98 #define ATI_REG_CMD_POWERDOWN (1U<<0) 99 #define ATI_REG_CMD_RECEIVE_EN (1U<<1) 100 #define ATI_REG_CMD_SEND_EN (1U<<2) 101 #define ATI_REG_CMD_STATUS_MEM (1U<<3) 102 #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4) 103 #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5) 104 #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6) 105 #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6 106 #define ATI_REG_CMD_IN_DMA_EN (1U<<8) 107 #define ATI_REG_CMD_OUT_DMA_EN (1U<<9) 108 #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10) 109 #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11) 110 #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12) 111 #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12) 112 #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12) 113 #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12) 114 #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12) 115 #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16) 116 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20) 117 #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21) 118 #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22) 119 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23) 120 #define ATI_REG_CMD_PACKED_DIS (1U<<24) 121 #define ATI_REG_CMD_BURST_EN (1U<<25) 122 #define ATI_REG_CMD_PANIC_EN (1U<<26) 123 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27) 124 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28) 125 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29) 126 #define ATI_REG_CMD_AC_SYNC (1U<<30) 127 #define ATI_REG_CMD_AC_RESET (1U<<31) 128 129 #define ATI_REG_PHYS_OUT_ADDR 0x0c 130 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0) 131 #define ATI_REG_PHYS_OUT_RW (1U<<2) 132 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8) 133 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9 134 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16 135 136 #define ATI_REG_PHYS_IN_ADDR 0x10 137 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8) 138 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9 139 #define ATI_REG_PHYS_IN_DATA_SHIFT 16 140 141 #define ATI_REG_SLOTREQ 0x14 142 143 #define ATI_REG_COUNTER 0x18 144 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */ 145 #define ATI_REG_COUNTER_BITCLOCK (31U<<8) 146 147 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c 148 149 #define ATI_REG_IN_DMA_LINKPTR 0x20 150 #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */ 151 #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */ 152 #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */ 153 #define ATI_REG_IN_DMA_DT_SIZE 0x30 154 155 #define ATI_REG_OUT_DMA_SLOT 0x34 156 #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3)) 157 #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff 158 #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800 159 #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11 160 161 #define ATI_REG_OUT_DMA_LINKPTR 0x38 162 #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */ 163 #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */ 164 #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */ 165 #define ATI_REG_OUT_DMA_DT_SIZE 0x48 166 167 #define ATI_REG_SPDF_CMD 0x4c 168 #define ATI_REG_SPDF_CMD_LFSR (1U<<4) 169 #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5) 170 #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */ 171 172 #define ATI_REG_SPDF_DMA_LINKPTR 0x50 173 #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */ 174 #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */ 175 #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */ 176 #define ATI_REG_SPDF_DMA_DT_SIZE 0x60 177 178 #define ATI_REG_MODEM_MIRROR 0x7c 179 #define ATI_REG_AUDIO_MIRROR 0x80 180 181 #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */ 182 #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */ 183 184 #define ATI_REG_FIFO_FLUSH 0x88 185 #define ATI_REG_FIFO_OUT_FLUSH (1U<<0) 186 #define ATI_REG_FIFO_IN_FLUSH (1U<<1) 187 188 /* LINKPTR */ 189 #define ATI_REG_LINKPTR_EN (1U<<0) 190 191 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */ 192 #define ATI_REG_DMA_DT_SIZE (0xffffU<<0) 193 #define ATI_REG_DMA_FIFO_USED (0x1fU<<16) 194 #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21) 195 #define ATI_REG_DMA_STATE (7U<<26) 196 197 198 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */ 199 200 201 struct atiixp; 202 203 /* 204 * DMA packate descriptor 205 */ 206 207 struct atiixp_dma_desc { 208 u32 addr; /* DMA buffer address */ 209 u16 status; /* status bits */ 210 u16 size; /* size of the packet in dwords */ 211 u32 next; /* address of the next packet descriptor */ 212 }; 213 214 /* 215 * stream enum 216 */ 217 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */ 218 enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */ 219 enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */ 220 221 #define NUM_ATI_CODECS 3 222 223 224 /* 225 * constants and callbacks for each DMA type 226 */ 227 struct atiixp_dma_ops { 228 int type; /* ATI_DMA_XXX */ 229 unsigned int llp_offset; /* LINKPTR offset */ 230 unsigned int dt_cur; /* DT_CUR offset */ 231 /* called from open callback */ 232 void (*enable_dma)(struct atiixp *chip, int on); 233 /* called from trigger (START/STOP) */ 234 void (*enable_transfer)(struct atiixp *chip, int on); 235 /* called from trigger (STOP only) */ 236 void (*flush_dma)(struct atiixp *chip); 237 }; 238 239 /* 240 * DMA stream 241 */ 242 struct atiixp_dma { 243 const struct atiixp_dma_ops *ops; 244 struct snd_dma_buffer desc_buf; 245 struct snd_pcm_substream *substream; /* assigned PCM substream */ 246 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */ 247 unsigned int period_bytes, periods; 248 int opened; 249 int running; 250 int suspended; 251 int pcm_open_flag; 252 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */ 253 unsigned int saved_curptr; 254 }; 255 256 /* 257 * ATI IXP chip 258 */ 259 struct atiixp { 260 struct snd_card *card; 261 struct pci_dev *pci; 262 263 unsigned long addr; 264 void __iomem *remap_addr; 265 int irq; 266 267 struct snd_ac97_bus *ac97_bus; 268 struct snd_ac97 *ac97[NUM_ATI_CODECS]; 269 270 spinlock_t reg_lock; 271 272 struct atiixp_dma dmas[NUM_ATI_DMAS]; 273 struct ac97_pcm *pcms[NUM_ATI_PCMS]; 274 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS]; 275 276 int max_channels; /* max. channels for PCM out */ 277 278 unsigned int codec_not_ready_bits; /* for codec detection */ 279 280 int spdif_over_aclink; /* passed from the module option */ 281 struct mutex open_mutex; /* playback open mutex */ 282 }; 283 284 285 /* 286 */ 287 static struct pci_device_id snd_atiixp_ids[] = { 288 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */ 289 { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */ 290 { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */ 291 { 0, } 292 }; 293 294 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids); 295 296 297 /* 298 * lowlevel functions 299 */ 300 301 /* 302 * update the bits of the given register. 303 * return 1 if the bits changed. 304 */ 305 static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg, 306 unsigned int mask, unsigned int value) 307 { 308 void __iomem *addr = chip->remap_addr + reg; 309 unsigned int data, old_data; 310 old_data = data = readl(addr); 311 data &= ~mask; 312 data |= value; 313 if (old_data == data) 314 return 0; 315 writel(data, addr); 316 return 1; 317 } 318 319 /* 320 * macros for easy use 321 */ 322 #define atiixp_write(chip,reg,value) \ 323 writel(value, chip->remap_addr + ATI_REG_##reg) 324 #define atiixp_read(chip,reg) \ 325 readl(chip->remap_addr + ATI_REG_##reg) 326 #define atiixp_update(chip,reg,mask,val) \ 327 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val) 328 329 /* 330 * handling DMA packets 331 * 332 * we allocate a linear buffer for the DMA, and split it to each packet. 333 * in a future version, a scatter-gather buffer should be implemented. 334 */ 335 336 #define ATI_DESC_LIST_SIZE \ 337 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc)) 338 339 /* 340 * build packets ring for the given buffer size. 341 * 342 * IXP handles the buffer descriptors, which are connected as a linked 343 * list. although we can change the list dynamically, in this version, 344 * a static RING of buffer descriptors is used. 345 * 346 * the ring is built in this function, and is set up to the hardware. 347 */ 348 static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, 349 struct snd_pcm_substream *substream, 350 unsigned int periods, 351 unsigned int period_bytes) 352 { 353 unsigned int i; 354 u32 addr, desc_addr; 355 unsigned long flags; 356 357 if (periods > ATI_MAX_DESCRIPTORS) 358 return -ENOMEM; 359 360 if (dma->desc_buf.area == NULL) { 361 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, 362 snd_dma_pci_data(chip->pci), 363 ATI_DESC_LIST_SIZE, 364 &dma->desc_buf) < 0) 365 return -ENOMEM; 366 dma->period_bytes = dma->periods = 0; /* clear */ 367 } 368 369 if (dma->periods == periods && dma->period_bytes == period_bytes) 370 return 0; 371 372 /* reset DMA before changing the descriptor table */ 373 spin_lock_irqsave(&chip->reg_lock, flags); 374 writel(0, chip->remap_addr + dma->ops->llp_offset); 375 dma->ops->enable_dma(chip, 0); 376 dma->ops->enable_dma(chip, 1); 377 spin_unlock_irqrestore(&chip->reg_lock, flags); 378 379 /* fill the entries */ 380 addr = (u32)substream->runtime->dma_addr; 381 desc_addr = (u32)dma->desc_buf.addr; 382 for (i = 0; i < periods; i++) { 383 struct atiixp_dma_desc *desc; 384 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i]; 385 desc->addr = cpu_to_le32(addr); 386 desc->status = 0; 387 desc->size = period_bytes >> 2; /* in dwords */ 388 desc_addr += sizeof(struct atiixp_dma_desc); 389 if (i == periods - 1) 390 desc->next = cpu_to_le32((u32)dma->desc_buf.addr); 391 else 392 desc->next = cpu_to_le32(desc_addr); 393 addr += period_bytes; 394 } 395 396 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 397 chip->remap_addr + dma->ops->llp_offset); 398 399 dma->period_bytes = period_bytes; 400 dma->periods = periods; 401 402 return 0; 403 } 404 405 /* 406 * remove the ring buffer and release it if assigned 407 */ 408 static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, 409 struct snd_pcm_substream *substream) 410 { 411 if (dma->desc_buf.area) { 412 writel(0, chip->remap_addr + dma->ops->llp_offset); 413 snd_dma_free_pages(&dma->desc_buf); 414 dma->desc_buf.area = NULL; 415 } 416 } 417 418 /* 419 * AC97 interface 420 */ 421 static int snd_atiixp_acquire_codec(struct atiixp *chip) 422 { 423 int timeout = 1000; 424 425 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) { 426 if (! timeout--) { 427 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n"); 428 return -EBUSY; 429 } 430 udelay(1); 431 } 432 return 0; 433 } 434 435 static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg) 436 { 437 unsigned int data; 438 int timeout; 439 440 if (snd_atiixp_acquire_codec(chip) < 0) 441 return 0xffff; 442 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 443 ATI_REG_PHYS_OUT_ADDR_EN | 444 ATI_REG_PHYS_OUT_RW | 445 codec; 446 atiixp_write(chip, PHYS_OUT_ADDR, data); 447 if (snd_atiixp_acquire_codec(chip) < 0) 448 return 0xffff; 449 timeout = 1000; 450 do { 451 data = atiixp_read(chip, PHYS_IN_ADDR); 452 if (data & ATI_REG_PHYS_IN_READ_FLAG) 453 return data >> ATI_REG_PHYS_IN_DATA_SHIFT; 454 udelay(1); 455 } while (--timeout); 456 /* time out may happen during reset */ 457 if (reg < 0x7c) 458 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg); 459 return 0xffff; 460 } 461 462 463 static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec, 464 unsigned short reg, unsigned short val) 465 { 466 unsigned int data; 467 468 if (snd_atiixp_acquire_codec(chip) < 0) 469 return; 470 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) | 471 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 472 ATI_REG_PHYS_OUT_ADDR_EN | codec; 473 atiixp_write(chip, PHYS_OUT_ADDR, data); 474 } 475 476 477 static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97, 478 unsigned short reg) 479 { 480 struct atiixp *chip = ac97->private_data; 481 return snd_atiixp_codec_read(chip, ac97->num, reg); 482 483 } 484 485 static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg, 486 unsigned short val) 487 { 488 struct atiixp *chip = ac97->private_data; 489 snd_atiixp_codec_write(chip, ac97->num, reg, val); 490 } 491 492 /* 493 * reset AC link 494 */ 495 static int snd_atiixp_aclink_reset(struct atiixp *chip) 496 { 497 int timeout; 498 499 /* reset powerdoewn */ 500 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) 501 udelay(10); 502 503 /* perform a software reset */ 504 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); 505 atiixp_read(chip, CMD); 506 udelay(10); 507 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); 508 509 timeout = 10; 510 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { 511 /* do a hard reset */ 512 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, 513 ATI_REG_CMD_AC_SYNC); 514 atiixp_read(chip, CMD); 515 mdelay(1); 516 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); 517 if (--timeout) { 518 snd_printk(KERN_ERR "atiixp: codec reset timeout\n"); 519 break; 520 } 521 } 522 523 /* deassert RESET and assert SYNC to make sure */ 524 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, 525 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET); 526 527 return 0; 528 } 529 530 #ifdef CONFIG_PM 531 static int snd_atiixp_aclink_down(struct atiixp *chip) 532 { 533 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */ 534 // return -EBUSY; 535 atiixp_update(chip, CMD, 536 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET, 537 ATI_REG_CMD_POWERDOWN); 538 return 0; 539 } 540 #endif 541 542 /* 543 * auto-detection of codecs 544 * 545 * the IXP chip can generate interrupts for the non-existing codecs. 546 * NEW_FRAME interrupt is used to make sure that the interrupt is generated 547 * even if all three codecs are connected. 548 */ 549 550 #define ALL_CODEC_NOT_READY \ 551 (ATI_REG_ISR_CODEC0_NOT_READY |\ 552 ATI_REG_ISR_CODEC1_NOT_READY |\ 553 ATI_REG_ISR_CODEC2_NOT_READY) 554 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME) 555 556 static int snd_atiixp_codec_detect(struct atiixp *chip) 557 { 558 int timeout; 559 560 chip->codec_not_ready_bits = 0; 561 atiixp_write(chip, IER, CODEC_CHECK_BITS); 562 /* wait for the interrupts */ 563 timeout = 50; 564 while (timeout-- > 0) { 565 mdelay(1); 566 if (chip->codec_not_ready_bits) 567 break; 568 } 569 atiixp_write(chip, IER, 0); /* disable irqs */ 570 571 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) { 572 snd_printk(KERN_ERR "atiixp: no codec detected!\n"); 573 return -ENXIO; 574 } 575 return 0; 576 } 577 578 579 /* 580 * enable DMA and irqs 581 */ 582 static int snd_atiixp_chip_start(struct atiixp *chip) 583 { 584 unsigned int reg; 585 586 /* set up spdif, enable burst mode */ 587 reg = atiixp_read(chip, CMD); 588 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT; 589 reg |= ATI_REG_CMD_BURST_EN; 590 atiixp_write(chip, CMD, reg); 591 592 reg = atiixp_read(chip, SPDF_CMD); 593 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH); 594 atiixp_write(chip, SPDF_CMD, reg); 595 596 /* clear all interrupt source */ 597 atiixp_write(chip, ISR, 0xffffffff); 598 /* enable irqs */ 599 atiixp_write(chip, IER, 600 ATI_REG_IER_IO_STATUS_EN | 601 ATI_REG_IER_IN_XRUN_EN | 602 ATI_REG_IER_OUT_XRUN_EN | 603 ATI_REG_IER_SPDF_XRUN_EN | 604 ATI_REG_IER_SPDF_STATUS_EN); 605 return 0; 606 } 607 608 609 /* 610 * disable DMA and IRQs 611 */ 612 static int snd_atiixp_chip_stop(struct atiixp *chip) 613 { 614 /* clear interrupt source */ 615 atiixp_write(chip, ISR, atiixp_read(chip, ISR)); 616 /* disable irqs */ 617 atiixp_write(chip, IER, 0); 618 return 0; 619 } 620 621 622 /* 623 * PCM section 624 */ 625 626 /* 627 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current 628 * position. when SG-buffer is implemented, the offset must be calculated 629 * correctly... 630 */ 631 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream) 632 { 633 struct atiixp *chip = snd_pcm_substream_chip(substream); 634 struct snd_pcm_runtime *runtime = substream->runtime; 635 struct atiixp_dma *dma = runtime->private_data; 636 unsigned int curptr; 637 int timeout = 1000; 638 639 while (timeout--) { 640 curptr = readl(chip->remap_addr + dma->ops->dt_cur); 641 if (curptr < dma->buf_addr) 642 continue; 643 curptr -= dma->buf_addr; 644 if (curptr >= dma->buf_bytes) 645 continue; 646 return bytes_to_frames(runtime, curptr); 647 } 648 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n", 649 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr); 650 return 0; 651 } 652 653 /* 654 * XRUN detected, and stop the PCM substream 655 */ 656 static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma) 657 { 658 if (! dma->substream || ! dma->running) 659 return; 660 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type); 661 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN); 662 } 663 664 /* 665 * the period ack. update the substream. 666 */ 667 static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma) 668 { 669 if (! dma->substream || ! dma->running) 670 return; 671 snd_pcm_period_elapsed(dma->substream); 672 } 673 674 /* set BUS_BUSY interrupt bit if any DMA is running */ 675 /* call with spinlock held */ 676 static void snd_atiixp_check_bus_busy(struct atiixp *chip) 677 { 678 unsigned int bus_busy; 679 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN | 680 ATI_REG_CMD_RECEIVE_EN | 681 ATI_REG_CMD_SPDF_OUT_EN)) 682 bus_busy = ATI_REG_IER_SET_BUS_BUSY; 683 else 684 bus_busy = 0; 685 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy); 686 } 687 688 /* common trigger callback 689 * calling the lowlevel callbacks in it 690 */ 691 static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 692 { 693 struct atiixp *chip = snd_pcm_substream_chip(substream); 694 struct atiixp_dma *dma = substream->runtime->private_data; 695 int err = 0; 696 697 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL); 698 699 spin_lock(&chip->reg_lock); 700 switch (cmd) { 701 case SNDRV_PCM_TRIGGER_START: 702 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 703 case SNDRV_PCM_TRIGGER_RESUME: 704 dma->ops->enable_transfer(chip, 1); 705 dma->running = 1; 706 dma->suspended = 0; 707 break; 708 case SNDRV_PCM_TRIGGER_STOP: 709 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 710 case SNDRV_PCM_TRIGGER_SUSPEND: 711 dma->ops->enable_transfer(chip, 0); 712 dma->running = 0; 713 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND; 714 break; 715 default: 716 err = -EINVAL; 717 break; 718 } 719 if (! err) { 720 snd_atiixp_check_bus_busy(chip); 721 if (cmd == SNDRV_PCM_TRIGGER_STOP) { 722 dma->ops->flush_dma(chip); 723 snd_atiixp_check_bus_busy(chip); 724 } 725 } 726 spin_unlock(&chip->reg_lock); 727 return err; 728 } 729 730 731 /* 732 * lowlevel callbacks for each DMA type 733 * 734 * every callback is supposed to be called in chip->reg_lock spinlock 735 */ 736 737 /* flush FIFO of analog OUT DMA */ 738 static void atiixp_out_flush_dma(struct atiixp *chip) 739 { 740 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH); 741 } 742 743 /* enable/disable analog OUT DMA */ 744 static void atiixp_out_enable_dma(struct atiixp *chip, int on) 745 { 746 unsigned int data; 747 data = atiixp_read(chip, CMD); 748 if (on) { 749 if (data & ATI_REG_CMD_OUT_DMA_EN) 750 return; 751 atiixp_out_flush_dma(chip); 752 data |= ATI_REG_CMD_OUT_DMA_EN; 753 } else 754 data &= ~ATI_REG_CMD_OUT_DMA_EN; 755 atiixp_write(chip, CMD, data); 756 } 757 758 /* start/stop transfer over OUT DMA */ 759 static void atiixp_out_enable_transfer(struct atiixp *chip, int on) 760 { 761 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN, 762 on ? ATI_REG_CMD_SEND_EN : 0); 763 } 764 765 /* enable/disable analog IN DMA */ 766 static void atiixp_in_enable_dma(struct atiixp *chip, int on) 767 { 768 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN, 769 on ? ATI_REG_CMD_IN_DMA_EN : 0); 770 } 771 772 /* start/stop analog IN DMA */ 773 static void atiixp_in_enable_transfer(struct atiixp *chip, int on) 774 { 775 if (on) { 776 unsigned int data = atiixp_read(chip, CMD); 777 if (! (data & ATI_REG_CMD_RECEIVE_EN)) { 778 data |= ATI_REG_CMD_RECEIVE_EN; 779 #if 0 /* FIXME: this causes the endless loop */ 780 /* wait until slot 3/4 are finished */ 781 while ((atiixp_read(chip, COUNTER) & 782 ATI_REG_COUNTER_SLOT) != 5) 783 ; 784 #endif 785 atiixp_write(chip, CMD, data); 786 } 787 } else 788 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0); 789 } 790 791 /* flush FIFO of analog IN DMA */ 792 static void atiixp_in_flush_dma(struct atiixp *chip) 793 { 794 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH); 795 } 796 797 /* enable/disable SPDIF OUT DMA */ 798 static void atiixp_spdif_enable_dma(struct atiixp *chip, int on) 799 { 800 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN, 801 on ? ATI_REG_CMD_SPDF_DMA_EN : 0); 802 } 803 804 /* start/stop SPDIF OUT DMA */ 805 static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on) 806 { 807 unsigned int data; 808 data = atiixp_read(chip, CMD); 809 if (on) 810 data |= ATI_REG_CMD_SPDF_OUT_EN; 811 else 812 data &= ~ATI_REG_CMD_SPDF_OUT_EN; 813 atiixp_write(chip, CMD, data); 814 } 815 816 /* flush FIFO of SPDIF OUT DMA */ 817 static void atiixp_spdif_flush_dma(struct atiixp *chip) 818 { 819 int timeout; 820 821 /* DMA off, transfer on */ 822 atiixp_spdif_enable_dma(chip, 0); 823 atiixp_spdif_enable_transfer(chip, 1); 824 825 timeout = 100; 826 do { 827 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED)) 828 break; 829 udelay(1); 830 } while (timeout-- > 0); 831 832 atiixp_spdif_enable_transfer(chip, 0); 833 } 834 835 /* set up slots and formats for SPDIF OUT */ 836 static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream) 837 { 838 struct atiixp *chip = snd_pcm_substream_chip(substream); 839 840 spin_lock_irq(&chip->reg_lock); 841 if (chip->spdif_over_aclink) { 842 unsigned int data; 843 /* enable slots 10/11 */ 844 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 845 ATI_REG_CMD_SPDF_CONFIG_01); 846 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK; 847 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) | 848 ATI_REG_OUT_DMA_SLOT_BIT(11); 849 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; 850 atiixp_write(chip, OUT_DMA_SLOT, data); 851 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT, 852 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 853 ATI_REG_CMD_INTERLEAVE_OUT : 0); 854 } else { 855 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0); 856 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0); 857 } 858 spin_unlock_irq(&chip->reg_lock); 859 return 0; 860 } 861 862 /* set up slots and formats for analog OUT */ 863 static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream) 864 { 865 struct atiixp *chip = snd_pcm_substream_chip(substream); 866 unsigned int data; 867 868 spin_lock_irq(&chip->reg_lock); 869 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK; 870 switch (substream->runtime->channels) { 871 case 8: 872 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) | 873 ATI_REG_OUT_DMA_SLOT_BIT(11); 874 /* fallthru */ 875 case 6: 876 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) | 877 ATI_REG_OUT_DMA_SLOT_BIT(8); 878 /* fallthru */ 879 case 4: 880 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) | 881 ATI_REG_OUT_DMA_SLOT_BIT(9); 882 /* fallthru */ 883 default: 884 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) | 885 ATI_REG_OUT_DMA_SLOT_BIT(4); 886 break; 887 } 888 889 /* set output threshold */ 890 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; 891 atiixp_write(chip, OUT_DMA_SLOT, data); 892 893 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT, 894 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 895 ATI_REG_CMD_INTERLEAVE_OUT : 0); 896 897 /* 898 * enable 6 channel re-ordering bit if needed 899 */ 900 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN, 901 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0); 902 903 spin_unlock_irq(&chip->reg_lock); 904 return 0; 905 } 906 907 /* set up slots and formats for analog IN */ 908 static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream) 909 { 910 struct atiixp *chip = snd_pcm_substream_chip(substream); 911 912 spin_lock_irq(&chip->reg_lock); 913 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN, 914 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 915 ATI_REG_CMD_INTERLEAVE_IN : 0); 916 spin_unlock_irq(&chip->reg_lock); 917 return 0; 918 } 919 920 /* 921 * hw_params - allocate the buffer and set up buffer descriptors 922 */ 923 static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream, 924 struct snd_pcm_hw_params *hw_params) 925 { 926 struct atiixp *chip = snd_pcm_substream_chip(substream); 927 struct atiixp_dma *dma = substream->runtime->private_data; 928 int err; 929 930 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 931 if (err < 0) 932 return err; 933 dma->buf_addr = substream->runtime->dma_addr; 934 dma->buf_bytes = params_buffer_bytes(hw_params); 935 936 err = atiixp_build_dma_packets(chip, dma, substream, 937 params_periods(hw_params), 938 params_period_bytes(hw_params)); 939 if (err < 0) 940 return err; 941 942 if (dma->ac97_pcm_type >= 0) { 943 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type]; 944 /* PCM is bound to AC97 codec(s) 945 * set up the AC97 codecs 946 */ 947 if (dma->pcm_open_flag) { 948 snd_ac97_pcm_close(pcm); 949 dma->pcm_open_flag = 0; 950 } 951 err = snd_ac97_pcm_open(pcm, params_rate(hw_params), 952 params_channels(hw_params), 953 pcm->r[0].slots); 954 if (err >= 0) 955 dma->pcm_open_flag = 1; 956 } 957 958 return err; 959 } 960 961 static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream) 962 { 963 struct atiixp *chip = snd_pcm_substream_chip(substream); 964 struct atiixp_dma *dma = substream->runtime->private_data; 965 966 if (dma->pcm_open_flag) { 967 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type]; 968 snd_ac97_pcm_close(pcm); 969 dma->pcm_open_flag = 0; 970 } 971 atiixp_clear_dma_packets(chip, dma, substream); 972 snd_pcm_lib_free_pages(substream); 973 return 0; 974 } 975 976 977 /* 978 * pcm hardware definition, identical for all DMA types 979 */ 980 static struct snd_pcm_hardware snd_atiixp_pcm_hw = 981 { 982 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 983 SNDRV_PCM_INFO_BLOCK_TRANSFER | 984 SNDRV_PCM_INFO_PAUSE | 985 SNDRV_PCM_INFO_RESUME | 986 SNDRV_PCM_INFO_MMAP_VALID), 987 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 988 .rates = SNDRV_PCM_RATE_48000, 989 .rate_min = 48000, 990 .rate_max = 48000, 991 .channels_min = 2, 992 .channels_max = 2, 993 .buffer_bytes_max = 256 * 1024, 994 .period_bytes_min = 32, 995 .period_bytes_max = 128 * 1024, 996 .periods_min = 2, 997 .periods_max = ATI_MAX_DESCRIPTORS, 998 }; 999 1000 static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream, 1001 struct atiixp_dma *dma, int pcm_type) 1002 { 1003 struct atiixp *chip = snd_pcm_substream_chip(substream); 1004 struct snd_pcm_runtime *runtime = substream->runtime; 1005 int err; 1006 1007 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL); 1008 1009 if (dma->opened) 1010 return -EBUSY; 1011 dma->substream = substream; 1012 runtime->hw = snd_atiixp_pcm_hw; 1013 dma->ac97_pcm_type = pcm_type; 1014 if (pcm_type >= 0) { 1015 runtime->hw.rates = chip->pcms[pcm_type]->rates; 1016 snd_pcm_limit_hw_rates(runtime); 1017 } else { 1018 /* direct SPDIF */ 1019 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE; 1020 } 1021 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 1022 return err; 1023 runtime->private_data = dma; 1024 1025 /* enable DMA bits */ 1026 spin_lock_irq(&chip->reg_lock); 1027 dma->ops->enable_dma(chip, 1); 1028 spin_unlock_irq(&chip->reg_lock); 1029 dma->opened = 1; 1030 1031 return 0; 1032 } 1033 1034 static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream, 1035 struct atiixp_dma *dma) 1036 { 1037 struct atiixp *chip = snd_pcm_substream_chip(substream); 1038 /* disable DMA bits */ 1039 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL); 1040 spin_lock_irq(&chip->reg_lock); 1041 dma->ops->enable_dma(chip, 0); 1042 spin_unlock_irq(&chip->reg_lock); 1043 dma->substream = NULL; 1044 dma->opened = 0; 1045 return 0; 1046 } 1047 1048 /* 1049 */ 1050 static int snd_atiixp_playback_open(struct snd_pcm_substream *substream) 1051 { 1052 struct atiixp *chip = snd_pcm_substream_chip(substream); 1053 int err; 1054 1055 mutex_lock(&chip->open_mutex); 1056 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0); 1057 mutex_unlock(&chip->open_mutex); 1058 if (err < 0) 1059 return err; 1060 substream->runtime->hw.channels_max = chip->max_channels; 1061 if (chip->max_channels > 2) 1062 /* channels must be even */ 1063 snd_pcm_hw_constraint_step(substream->runtime, 0, 1064 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1065 return 0; 1066 } 1067 1068 static int snd_atiixp_playback_close(struct snd_pcm_substream *substream) 1069 { 1070 struct atiixp *chip = snd_pcm_substream_chip(substream); 1071 int err; 1072 mutex_lock(&chip->open_mutex); 1073 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); 1074 mutex_unlock(&chip->open_mutex); 1075 return err; 1076 } 1077 1078 static int snd_atiixp_capture_open(struct snd_pcm_substream *substream) 1079 { 1080 struct atiixp *chip = snd_pcm_substream_chip(substream); 1081 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1); 1082 } 1083 1084 static int snd_atiixp_capture_close(struct snd_pcm_substream *substream) 1085 { 1086 struct atiixp *chip = snd_pcm_substream_chip(substream); 1087 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]); 1088 } 1089 1090 static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream) 1091 { 1092 struct atiixp *chip = snd_pcm_substream_chip(substream); 1093 int err; 1094 mutex_lock(&chip->open_mutex); 1095 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */ 1096 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2); 1097 else 1098 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1); 1099 mutex_unlock(&chip->open_mutex); 1100 return err; 1101 } 1102 1103 static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream) 1104 { 1105 struct atiixp *chip = snd_pcm_substream_chip(substream); 1106 int err; 1107 mutex_lock(&chip->open_mutex); 1108 if (chip->spdif_over_aclink) 1109 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); 1110 else 1111 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]); 1112 mutex_unlock(&chip->open_mutex); 1113 return err; 1114 } 1115 1116 /* AC97 playback */ 1117 static struct snd_pcm_ops snd_atiixp_playback_ops = { 1118 .open = snd_atiixp_playback_open, 1119 .close = snd_atiixp_playback_close, 1120 .ioctl = snd_pcm_lib_ioctl, 1121 .hw_params = snd_atiixp_pcm_hw_params, 1122 .hw_free = snd_atiixp_pcm_hw_free, 1123 .prepare = snd_atiixp_playback_prepare, 1124 .trigger = snd_atiixp_pcm_trigger, 1125 .pointer = snd_atiixp_pcm_pointer, 1126 }; 1127 1128 /* AC97 capture */ 1129 static struct snd_pcm_ops snd_atiixp_capture_ops = { 1130 .open = snd_atiixp_capture_open, 1131 .close = snd_atiixp_capture_close, 1132 .ioctl = snd_pcm_lib_ioctl, 1133 .hw_params = snd_atiixp_pcm_hw_params, 1134 .hw_free = snd_atiixp_pcm_hw_free, 1135 .prepare = snd_atiixp_capture_prepare, 1136 .trigger = snd_atiixp_pcm_trigger, 1137 .pointer = snd_atiixp_pcm_pointer, 1138 }; 1139 1140 /* SPDIF playback */ 1141 static struct snd_pcm_ops snd_atiixp_spdif_ops = { 1142 .open = snd_atiixp_spdif_open, 1143 .close = snd_atiixp_spdif_close, 1144 .ioctl = snd_pcm_lib_ioctl, 1145 .hw_params = snd_atiixp_pcm_hw_params, 1146 .hw_free = snd_atiixp_pcm_hw_free, 1147 .prepare = snd_atiixp_spdif_prepare, 1148 .trigger = snd_atiixp_pcm_trigger, 1149 .pointer = snd_atiixp_pcm_pointer, 1150 }; 1151 1152 static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = { 1153 /* front PCM */ 1154 { 1155 .exclusive = 1, 1156 .r = { { 1157 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1158 (1 << AC97_SLOT_PCM_RIGHT) | 1159 (1 << AC97_SLOT_PCM_CENTER) | 1160 (1 << AC97_SLOT_PCM_SLEFT) | 1161 (1 << AC97_SLOT_PCM_SRIGHT) | 1162 (1 << AC97_SLOT_LFE) 1163 } 1164 } 1165 }, 1166 /* PCM IN #1 */ 1167 { 1168 .stream = 1, 1169 .exclusive = 1, 1170 .r = { { 1171 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1172 (1 << AC97_SLOT_PCM_RIGHT) 1173 } 1174 } 1175 }, 1176 /* S/PDIF OUT (optional) */ 1177 { 1178 .exclusive = 1, 1179 .spdif = 1, 1180 .r = { { 1181 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) | 1182 (1 << AC97_SLOT_SPDIF_RIGHT2) 1183 } 1184 } 1185 }, 1186 }; 1187 1188 static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { 1189 .type = ATI_DMA_PLAYBACK, 1190 .llp_offset = ATI_REG_OUT_DMA_LINKPTR, 1191 .dt_cur = ATI_REG_OUT_DMA_DT_CUR, 1192 .enable_dma = atiixp_out_enable_dma, 1193 .enable_transfer = atiixp_out_enable_transfer, 1194 .flush_dma = atiixp_out_flush_dma, 1195 }; 1196 1197 static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { 1198 .type = ATI_DMA_CAPTURE, 1199 .llp_offset = ATI_REG_IN_DMA_LINKPTR, 1200 .dt_cur = ATI_REG_IN_DMA_DT_CUR, 1201 .enable_dma = atiixp_in_enable_dma, 1202 .enable_transfer = atiixp_in_enable_transfer, 1203 .flush_dma = atiixp_in_flush_dma, 1204 }; 1205 1206 static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = { 1207 .type = ATI_DMA_SPDIF, 1208 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR, 1209 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR, 1210 .enable_dma = atiixp_spdif_enable_dma, 1211 .enable_transfer = atiixp_spdif_enable_transfer, 1212 .flush_dma = atiixp_spdif_flush_dma, 1213 }; 1214 1215 1216 static int __devinit snd_atiixp_pcm_new(struct atiixp *chip) 1217 { 1218 struct snd_pcm *pcm; 1219 struct snd_ac97_bus *pbus = chip->ac97_bus; 1220 int err, i, num_pcms; 1221 1222 /* initialize constants */ 1223 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops; 1224 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops; 1225 if (! chip->spdif_over_aclink) 1226 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops; 1227 1228 /* assign AC97 pcm */ 1229 if (chip->spdif_over_aclink) 1230 num_pcms = 3; 1231 else 1232 num_pcms = 2; 1233 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs); 1234 if (err < 0) 1235 return err; 1236 for (i = 0; i < num_pcms; i++) 1237 chip->pcms[i] = &pbus->pcms[i]; 1238 1239 chip->max_channels = 2; 1240 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) { 1241 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE)) 1242 chip->max_channels = 6; 1243 else 1244 chip->max_channels = 4; 1245 } 1246 1247 /* PCM #0: analog I/O */ 1248 err = snd_pcm_new(chip->card, "ATI IXP AC97", 1249 ATI_PCMDEV_ANALOG, 1, 1, &pcm); 1250 if (err < 0) 1251 return err; 1252 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops); 1253 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops); 1254 pcm->private_data = chip; 1255 strcpy(pcm->name, "ATI IXP AC97"); 1256 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm; 1257 1258 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1259 snd_dma_pci_data(chip->pci), 1260 64*1024, 128*1024); 1261 1262 /* no SPDIF support on codec? */ 1263 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates) 1264 return 0; 1265 1266 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */ 1267 if (chip->pcms[ATI_PCM_SPDIF]) 1268 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000; 1269 1270 /* PCM #1: spdif playback */ 1271 err = snd_pcm_new(chip->card, "ATI IXP IEC958", 1272 ATI_PCMDEV_DIGITAL, 1, 0, &pcm); 1273 if (err < 0) 1274 return err; 1275 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops); 1276 pcm->private_data = chip; 1277 if (chip->spdif_over_aclink) 1278 strcpy(pcm->name, "ATI IXP IEC958 (AC97)"); 1279 else 1280 strcpy(pcm->name, "ATI IXP IEC958 (Direct)"); 1281 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm; 1282 1283 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1284 snd_dma_pci_data(chip->pci), 1285 64*1024, 128*1024); 1286 1287 /* pre-select AC97 SPDIF slots 10/11 */ 1288 for (i = 0; i < NUM_ATI_CODECS; i++) { 1289 if (chip->ac97[i]) 1290 snd_ac97_update_bits(chip->ac97[i], 1291 AC97_EXTENDED_STATUS, 1292 0x03 << 4, 0x03 << 4); 1293 } 1294 1295 return 0; 1296 } 1297 1298 1299 1300 /* 1301 * interrupt handler 1302 */ 1303 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id) 1304 { 1305 struct atiixp *chip = dev_id; 1306 unsigned int status; 1307 1308 status = atiixp_read(chip, ISR); 1309 1310 if (! status) 1311 return IRQ_NONE; 1312 1313 /* process audio DMA */ 1314 if (status & ATI_REG_ISR_OUT_XRUN) 1315 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); 1316 else if (status & ATI_REG_ISR_OUT_STATUS) 1317 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); 1318 if (status & ATI_REG_ISR_IN_XRUN) 1319 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); 1320 else if (status & ATI_REG_ISR_IN_STATUS) 1321 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); 1322 if (! chip->spdif_over_aclink) { 1323 if (status & ATI_REG_ISR_SPDF_XRUN) 1324 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]); 1325 else if (status & ATI_REG_ISR_SPDF_STATUS) 1326 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]); 1327 } 1328 1329 /* for codec detection */ 1330 if (status & CODEC_CHECK_BITS) { 1331 unsigned int detected; 1332 detected = status & CODEC_CHECK_BITS; 1333 spin_lock(&chip->reg_lock); 1334 chip->codec_not_ready_bits |= detected; 1335 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */ 1336 spin_unlock(&chip->reg_lock); 1337 } 1338 1339 /* ack */ 1340 atiixp_write(chip, ISR, status); 1341 1342 return IRQ_HANDLED; 1343 } 1344 1345 1346 /* 1347 * ac97 mixer section 1348 */ 1349 1350 static struct ac97_quirk ac97_quirks[] __devinitdata = { 1351 { 1352 .subvendor = 0x103c, 1353 .subdevice = 0x006b, 1354 .name = "HP Pavilion ZV5030US", 1355 .type = AC97_TUNE_MUTE_LED 1356 }, 1357 { 1358 .subvendor = 0x103c, 1359 .subdevice = 0x308b, 1360 .name = "HP nx6125", 1361 .type = AC97_TUNE_MUTE_LED 1362 }, 1363 { } /* terminator */ 1364 }; 1365 1366 static int __devinit snd_atiixp_mixer_new(struct atiixp *chip, int clock, 1367 const char *quirk_override) 1368 { 1369 struct snd_ac97_bus *pbus; 1370 struct snd_ac97_template ac97; 1371 int i, err; 1372 int codec_count; 1373 static struct snd_ac97_bus_ops ops = { 1374 .write = snd_atiixp_ac97_write, 1375 .read = snd_atiixp_ac97_read, 1376 }; 1377 static unsigned int codec_skip[NUM_ATI_CODECS] = { 1378 ATI_REG_ISR_CODEC0_NOT_READY, 1379 ATI_REG_ISR_CODEC1_NOT_READY, 1380 ATI_REG_ISR_CODEC2_NOT_READY, 1381 }; 1382 1383 if (snd_atiixp_codec_detect(chip) < 0) 1384 return -ENXIO; 1385 1386 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) 1387 return err; 1388 pbus->clock = clock; 1389 chip->ac97_bus = pbus; 1390 1391 codec_count = 0; 1392 for (i = 0; i < NUM_ATI_CODECS; i++) { 1393 if (chip->codec_not_ready_bits & codec_skip[i]) 1394 continue; 1395 memset(&ac97, 0, sizeof(ac97)); 1396 ac97.private_data = chip; 1397 ac97.pci = chip->pci; 1398 ac97.num = i; 1399 ac97.scaps = AC97_SCAP_SKIP_MODEM; 1400 if (! chip->spdif_over_aclink) 1401 ac97.scaps |= AC97_SCAP_NO_SPDIF; 1402 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { 1403 chip->ac97[i] = NULL; /* to be sure */ 1404 snd_printdd("atiixp: codec %d not available for audio\n", i); 1405 continue; 1406 } 1407 codec_count++; 1408 } 1409 1410 if (! codec_count) { 1411 snd_printk(KERN_ERR "atiixp: no codec available\n"); 1412 return -ENODEV; 1413 } 1414 1415 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override); 1416 1417 return 0; 1418 } 1419 1420 1421 #ifdef CONFIG_PM 1422 /* 1423 * power management 1424 */ 1425 static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state) 1426 { 1427 struct snd_card *card = pci_get_drvdata(pci); 1428 struct atiixp *chip = card->private_data; 1429 int i; 1430 1431 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1432 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1433 if (chip->pcmdevs[i]) { 1434 struct atiixp_dma *dma = &chip->dmas[i]; 1435 if (dma->substream && dma->running) 1436 dma->saved_curptr = readl(chip->remap_addr + 1437 dma->ops->dt_cur); 1438 snd_pcm_suspend_all(chip->pcmdevs[i]); 1439 } 1440 for (i = 0; i < NUM_ATI_CODECS; i++) 1441 snd_ac97_suspend(chip->ac97[i]); 1442 snd_atiixp_aclink_down(chip); 1443 snd_atiixp_chip_stop(chip); 1444 1445 pci_disable_device(pci); 1446 pci_save_state(pci); 1447 pci_set_power_state(pci, pci_choose_state(pci, state)); 1448 return 0; 1449 } 1450 1451 static int snd_atiixp_resume(struct pci_dev *pci) 1452 { 1453 struct snd_card *card = pci_get_drvdata(pci); 1454 struct atiixp *chip = card->private_data; 1455 int i; 1456 1457 pci_set_power_state(pci, PCI_D0); 1458 pci_restore_state(pci); 1459 if (pci_enable_device(pci) < 0) { 1460 printk(KERN_ERR "atiixp: pci_enable_device failed, " 1461 "disabling device\n"); 1462 snd_card_disconnect(card); 1463 return -EIO; 1464 } 1465 pci_set_master(pci); 1466 1467 snd_atiixp_aclink_reset(chip); 1468 snd_atiixp_chip_start(chip); 1469 1470 for (i = 0; i < NUM_ATI_CODECS; i++) 1471 snd_ac97_resume(chip->ac97[i]); 1472 1473 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1474 if (chip->pcmdevs[i]) { 1475 struct atiixp_dma *dma = &chip->dmas[i]; 1476 if (dma->substream && dma->suspended) { 1477 dma->ops->enable_dma(chip, 1); 1478 dma->substream->ops->prepare(dma->substream); 1479 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 1480 chip->remap_addr + dma->ops->llp_offset); 1481 writel(dma->saved_curptr, chip->remap_addr + 1482 dma->ops->dt_cur); 1483 } 1484 } 1485 1486 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1487 return 0; 1488 } 1489 #endif /* CONFIG_PM */ 1490 1491 1492 #ifdef CONFIG_PROC_FS 1493 /* 1494 * proc interface for register dump 1495 */ 1496 1497 static void snd_atiixp_proc_read(struct snd_info_entry *entry, 1498 struct snd_info_buffer *buffer) 1499 { 1500 struct atiixp *chip = entry->private_data; 1501 int i; 1502 1503 for (i = 0; i < 256; i += 4) 1504 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i)); 1505 } 1506 1507 static void __devinit snd_atiixp_proc_init(struct atiixp *chip) 1508 { 1509 struct snd_info_entry *entry; 1510 1511 if (! snd_card_proc_new(chip->card, "atiixp", &entry)) 1512 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read); 1513 } 1514 #else /* !CONFIG_PROC_FS */ 1515 #define snd_atiixp_proc_init(chip) 1516 #endif 1517 1518 1519 /* 1520 * destructor 1521 */ 1522 1523 static int snd_atiixp_free(struct atiixp *chip) 1524 { 1525 if (chip->irq < 0) 1526 goto __hw_end; 1527 snd_atiixp_chip_stop(chip); 1528 synchronize_irq(chip->irq); 1529 __hw_end: 1530 if (chip->irq >= 0) 1531 free_irq(chip->irq, chip); 1532 if (chip->remap_addr) 1533 iounmap(chip->remap_addr); 1534 pci_release_regions(chip->pci); 1535 pci_disable_device(chip->pci); 1536 kfree(chip); 1537 return 0; 1538 } 1539 1540 static int snd_atiixp_dev_free(struct snd_device *device) 1541 { 1542 struct atiixp *chip = device->device_data; 1543 return snd_atiixp_free(chip); 1544 } 1545 1546 /* 1547 * constructor for chip instance 1548 */ 1549 static int __devinit snd_atiixp_create(struct snd_card *card, 1550 struct pci_dev *pci, 1551 struct atiixp **r_chip) 1552 { 1553 static struct snd_device_ops ops = { 1554 .dev_free = snd_atiixp_dev_free, 1555 }; 1556 struct atiixp *chip; 1557 int err; 1558 1559 if ((err = pci_enable_device(pci)) < 0) 1560 return err; 1561 1562 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1563 if (chip == NULL) { 1564 pci_disable_device(pci); 1565 return -ENOMEM; 1566 } 1567 1568 spin_lock_init(&chip->reg_lock); 1569 mutex_init(&chip->open_mutex); 1570 chip->card = card; 1571 chip->pci = pci; 1572 chip->irq = -1; 1573 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) { 1574 pci_disable_device(pci); 1575 kfree(chip); 1576 return err; 1577 } 1578 chip->addr = pci_resource_start(pci, 0); 1579 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0)); 1580 if (chip->remap_addr == NULL) { 1581 snd_printk(KERN_ERR "AC'97 space ioremap problem\n"); 1582 snd_atiixp_free(chip); 1583 return -EIO; 1584 } 1585 1586 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED, 1587 card->shortname, chip)) { 1588 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 1589 snd_atiixp_free(chip); 1590 return -EBUSY; 1591 } 1592 chip->irq = pci->irq; 1593 pci_set_master(pci); 1594 synchronize_irq(chip->irq); 1595 1596 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1597 snd_atiixp_free(chip); 1598 return err; 1599 } 1600 1601 snd_card_set_dev(card, &pci->dev); 1602 1603 *r_chip = chip; 1604 return 0; 1605 } 1606 1607 1608 static int __devinit snd_atiixp_probe(struct pci_dev *pci, 1609 const struct pci_device_id *pci_id) 1610 { 1611 struct snd_card *card; 1612 struct atiixp *chip; 1613 unsigned char revision; 1614 int err; 1615 1616 card = snd_card_new(index, id, THIS_MODULE, 0); 1617 if (card == NULL) 1618 return -ENOMEM; 1619 1620 pci_read_config_byte(pci, PCI_REVISION_ID, &revision); 1621 1622 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA"); 1623 strcpy(card->shortname, "ATI IXP"); 1624 if ((err = snd_atiixp_create(card, pci, &chip)) < 0) 1625 goto __error; 1626 card->private_data = chip; 1627 1628 if ((err = snd_atiixp_aclink_reset(chip)) < 0) 1629 goto __error; 1630 1631 chip->spdif_over_aclink = spdif_aclink; 1632 1633 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0) 1634 goto __error; 1635 1636 if ((err = snd_atiixp_pcm_new(chip)) < 0) 1637 goto __error; 1638 1639 snd_atiixp_proc_init(chip); 1640 1641 snd_atiixp_chip_start(chip); 1642 1643 snprintf(card->longname, sizeof(card->longname), 1644 "%s rev %x with %s at %#lx, irq %i", card->shortname, revision, 1645 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?", 1646 chip->addr, chip->irq); 1647 1648 if ((err = snd_card_register(card)) < 0) 1649 goto __error; 1650 1651 pci_set_drvdata(pci, card); 1652 return 0; 1653 1654 __error: 1655 snd_card_free(card); 1656 return err; 1657 } 1658 1659 static void __devexit snd_atiixp_remove(struct pci_dev *pci) 1660 { 1661 snd_card_free(pci_get_drvdata(pci)); 1662 pci_set_drvdata(pci, NULL); 1663 } 1664 1665 static struct pci_driver driver = { 1666 .name = "ATI IXP AC97 controller", 1667 .id_table = snd_atiixp_ids, 1668 .probe = snd_atiixp_probe, 1669 .remove = __devexit_p(snd_atiixp_remove), 1670 #ifdef CONFIG_PM 1671 .suspend = snd_atiixp_suspend, 1672 .resume = snd_atiixp_resume, 1673 #endif 1674 }; 1675 1676 1677 static int __init alsa_card_atiixp_init(void) 1678 { 1679 return pci_register_driver(&driver); 1680 } 1681 1682 static void __exit alsa_card_atiixp_exit(void) 1683 { 1684 pci_unregister_driver(&driver); 1685 } 1686 1687 module_init(alsa_card_atiixp_init) 1688 module_exit(alsa_card_atiixp_exit) 1689