1 /* 2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers 3 * 4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 #include <linux/io.h> 23 #include <linux/delay.h> 24 #include <linux/interrupt.h> 25 #include <linux/init.h> 26 #include <linux/pci.h> 27 #include <linux/slab.h> 28 #include <linux/module.h> 29 #include <linux/mutex.h> 30 #include <sound/core.h> 31 #include <sound/pcm.h> 32 #include <sound/pcm_params.h> 33 #include <sound/info.h> 34 #include <sound/ac97_codec.h> 35 #include <sound/initval.h> 36 37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); 38 MODULE_DESCRIPTION("ATI IXP AC97 controller"); 39 MODULE_LICENSE("GPL"); 40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400/600}}"); 41 42 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */ 43 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ 44 static int ac97_clock = 48000; 45 static char *ac97_quirk; 46 static bool spdif_aclink = 1; 47 static int ac97_codec = -1; 48 49 module_param(index, int, 0444); 50 MODULE_PARM_DESC(index, "Index value for ATI IXP controller."); 51 module_param(id, charp, 0444); 52 MODULE_PARM_DESC(id, "ID string for ATI IXP controller."); 53 module_param(ac97_clock, int, 0444); 54 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); 55 module_param(ac97_quirk, charp, 0444); 56 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 57 module_param(ac97_codec, int, 0444); 58 MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing."); 59 module_param(spdif_aclink, bool, 0444); 60 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link."); 61 62 /* just for backward compatibility */ 63 static bool enable; 64 module_param(enable, bool, 0444); 65 66 67 /* 68 */ 69 70 #define ATI_REG_ISR 0x00 /* interrupt source */ 71 #define ATI_REG_ISR_IN_XRUN (1U<<0) 72 #define ATI_REG_ISR_IN_STATUS (1U<<1) 73 #define ATI_REG_ISR_OUT_XRUN (1U<<2) 74 #define ATI_REG_ISR_OUT_STATUS (1U<<3) 75 #define ATI_REG_ISR_SPDF_XRUN (1U<<4) 76 #define ATI_REG_ISR_SPDF_STATUS (1U<<5) 77 #define ATI_REG_ISR_PHYS_INTR (1U<<8) 78 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9) 79 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10) 80 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11) 81 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12) 82 #define ATI_REG_ISR_NEW_FRAME (1U<<13) 83 84 #define ATI_REG_IER 0x04 /* interrupt enable */ 85 #define ATI_REG_IER_IN_XRUN_EN (1U<<0) 86 #define ATI_REG_IER_IO_STATUS_EN (1U<<1) 87 #define ATI_REG_IER_OUT_XRUN_EN (1U<<2) 88 #define ATI_REG_IER_OUT_XRUN_COND (1U<<3) 89 #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4) 90 #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5) 91 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8) 92 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9) 93 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10) 94 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11) 95 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12) 96 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */ 97 #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */ 98 99 #define ATI_REG_CMD 0x08 /* command */ 100 #define ATI_REG_CMD_POWERDOWN (1U<<0) 101 #define ATI_REG_CMD_RECEIVE_EN (1U<<1) 102 #define ATI_REG_CMD_SEND_EN (1U<<2) 103 #define ATI_REG_CMD_STATUS_MEM (1U<<3) 104 #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4) 105 #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5) 106 #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6) 107 #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6 108 #define ATI_REG_CMD_IN_DMA_EN (1U<<8) 109 #define ATI_REG_CMD_OUT_DMA_EN (1U<<9) 110 #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10) 111 #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11) 112 #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12) 113 #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12) 114 #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12) 115 #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12) 116 #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12) 117 #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16) 118 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20) 119 #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21) 120 #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22) 121 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23) 122 #define ATI_REG_CMD_PACKED_DIS (1U<<24) 123 #define ATI_REG_CMD_BURST_EN (1U<<25) 124 #define ATI_REG_CMD_PANIC_EN (1U<<26) 125 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27) 126 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28) 127 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29) 128 #define ATI_REG_CMD_AC_SYNC (1U<<30) 129 #define ATI_REG_CMD_AC_RESET (1U<<31) 130 131 #define ATI_REG_PHYS_OUT_ADDR 0x0c 132 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0) 133 #define ATI_REG_PHYS_OUT_RW (1U<<2) 134 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8) 135 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9 136 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16 137 138 #define ATI_REG_PHYS_IN_ADDR 0x10 139 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8) 140 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9 141 #define ATI_REG_PHYS_IN_DATA_SHIFT 16 142 143 #define ATI_REG_SLOTREQ 0x14 144 145 #define ATI_REG_COUNTER 0x18 146 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */ 147 #define ATI_REG_COUNTER_BITCLOCK (31U<<8) 148 149 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c 150 151 #define ATI_REG_IN_DMA_LINKPTR 0x20 152 #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */ 153 #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */ 154 #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */ 155 #define ATI_REG_IN_DMA_DT_SIZE 0x30 156 157 #define ATI_REG_OUT_DMA_SLOT 0x34 158 #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3)) 159 #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff 160 #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800 161 #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11 162 163 #define ATI_REG_OUT_DMA_LINKPTR 0x38 164 #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */ 165 #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */ 166 #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */ 167 #define ATI_REG_OUT_DMA_DT_SIZE 0x48 168 169 #define ATI_REG_SPDF_CMD 0x4c 170 #define ATI_REG_SPDF_CMD_LFSR (1U<<4) 171 #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5) 172 #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */ 173 174 #define ATI_REG_SPDF_DMA_LINKPTR 0x50 175 #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */ 176 #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */ 177 #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */ 178 #define ATI_REG_SPDF_DMA_DT_SIZE 0x60 179 180 #define ATI_REG_MODEM_MIRROR 0x7c 181 #define ATI_REG_AUDIO_MIRROR 0x80 182 183 #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */ 184 #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */ 185 186 #define ATI_REG_FIFO_FLUSH 0x88 187 #define ATI_REG_FIFO_OUT_FLUSH (1U<<0) 188 #define ATI_REG_FIFO_IN_FLUSH (1U<<1) 189 190 /* LINKPTR */ 191 #define ATI_REG_LINKPTR_EN (1U<<0) 192 193 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */ 194 #define ATI_REG_DMA_DT_SIZE (0xffffU<<0) 195 #define ATI_REG_DMA_FIFO_USED (0x1fU<<16) 196 #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21) 197 #define ATI_REG_DMA_STATE (7U<<26) 198 199 200 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */ 201 202 203 struct atiixp; 204 205 /* 206 * DMA packate descriptor 207 */ 208 209 struct atiixp_dma_desc { 210 __le32 addr; /* DMA buffer address */ 211 u16 status; /* status bits */ 212 u16 size; /* size of the packet in dwords */ 213 __le32 next; /* address of the next packet descriptor */ 214 }; 215 216 /* 217 * stream enum 218 */ 219 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */ 220 enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */ 221 enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */ 222 223 #define NUM_ATI_CODECS 3 224 225 226 /* 227 * constants and callbacks for each DMA type 228 */ 229 struct atiixp_dma_ops { 230 int type; /* ATI_DMA_XXX */ 231 unsigned int llp_offset; /* LINKPTR offset */ 232 unsigned int dt_cur; /* DT_CUR offset */ 233 /* called from open callback */ 234 void (*enable_dma)(struct atiixp *chip, int on); 235 /* called from trigger (START/STOP) */ 236 void (*enable_transfer)(struct atiixp *chip, int on); 237 /* called from trigger (STOP only) */ 238 void (*flush_dma)(struct atiixp *chip); 239 }; 240 241 /* 242 * DMA stream 243 */ 244 struct atiixp_dma { 245 const struct atiixp_dma_ops *ops; 246 struct snd_dma_buffer desc_buf; 247 struct snd_pcm_substream *substream; /* assigned PCM substream */ 248 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */ 249 unsigned int period_bytes, periods; 250 int opened; 251 int running; 252 int suspended; 253 int pcm_open_flag; 254 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */ 255 unsigned int saved_curptr; 256 }; 257 258 /* 259 * ATI IXP chip 260 */ 261 struct atiixp { 262 struct snd_card *card; 263 struct pci_dev *pci; 264 265 unsigned long addr; 266 void __iomem *remap_addr; 267 int irq; 268 269 struct snd_ac97_bus *ac97_bus; 270 struct snd_ac97 *ac97[NUM_ATI_CODECS]; 271 272 spinlock_t reg_lock; 273 274 struct atiixp_dma dmas[NUM_ATI_DMAS]; 275 struct ac97_pcm *pcms[NUM_ATI_PCMS]; 276 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS]; 277 278 int max_channels; /* max. channels for PCM out */ 279 280 unsigned int codec_not_ready_bits; /* for codec detection */ 281 282 int spdif_over_aclink; /* passed from the module option */ 283 struct mutex open_mutex; /* playback open mutex */ 284 }; 285 286 287 /* 288 */ 289 static const struct pci_device_id snd_atiixp_ids[] = { 290 { PCI_VDEVICE(ATI, 0x4341), 0 }, /* SB200 */ 291 { PCI_VDEVICE(ATI, 0x4361), 0 }, /* SB300 */ 292 { PCI_VDEVICE(ATI, 0x4370), 0 }, /* SB400 */ 293 { PCI_VDEVICE(ATI, 0x4382), 0 }, /* SB600 */ 294 { 0, } 295 }; 296 297 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids); 298 299 static struct snd_pci_quirk atiixp_quirks[] = { 300 SND_PCI_QUIRK(0x105b, 0x0c81, "Foxconn RC4107MA-RS2", 0), 301 SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0), 302 { } /* terminator */ 303 }; 304 305 /* 306 * lowlevel functions 307 */ 308 309 /* 310 * update the bits of the given register. 311 * return 1 if the bits changed. 312 */ 313 static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg, 314 unsigned int mask, unsigned int value) 315 { 316 void __iomem *addr = chip->remap_addr + reg; 317 unsigned int data, old_data; 318 old_data = data = readl(addr); 319 data &= ~mask; 320 data |= value; 321 if (old_data == data) 322 return 0; 323 writel(data, addr); 324 return 1; 325 } 326 327 /* 328 * macros for easy use 329 */ 330 #define atiixp_write(chip,reg,value) \ 331 writel(value, chip->remap_addr + ATI_REG_##reg) 332 #define atiixp_read(chip,reg) \ 333 readl(chip->remap_addr + ATI_REG_##reg) 334 #define atiixp_update(chip,reg,mask,val) \ 335 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val) 336 337 /* 338 * handling DMA packets 339 * 340 * we allocate a linear buffer for the DMA, and split it to each packet. 341 * in a future version, a scatter-gather buffer should be implemented. 342 */ 343 344 #define ATI_DESC_LIST_SIZE \ 345 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc)) 346 347 /* 348 * build packets ring for the given buffer size. 349 * 350 * IXP handles the buffer descriptors, which are connected as a linked 351 * list. although we can change the list dynamically, in this version, 352 * a static RING of buffer descriptors is used. 353 * 354 * the ring is built in this function, and is set up to the hardware. 355 */ 356 static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, 357 struct snd_pcm_substream *substream, 358 unsigned int periods, 359 unsigned int period_bytes) 360 { 361 unsigned int i; 362 u32 addr, desc_addr; 363 unsigned long flags; 364 365 if (periods > ATI_MAX_DESCRIPTORS) 366 return -ENOMEM; 367 368 if (dma->desc_buf.area == NULL) { 369 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, 370 snd_dma_pci_data(chip->pci), 371 ATI_DESC_LIST_SIZE, 372 &dma->desc_buf) < 0) 373 return -ENOMEM; 374 dma->period_bytes = dma->periods = 0; /* clear */ 375 } 376 377 if (dma->periods == periods && dma->period_bytes == period_bytes) 378 return 0; 379 380 /* reset DMA before changing the descriptor table */ 381 spin_lock_irqsave(&chip->reg_lock, flags); 382 writel(0, chip->remap_addr + dma->ops->llp_offset); 383 dma->ops->enable_dma(chip, 0); 384 dma->ops->enable_dma(chip, 1); 385 spin_unlock_irqrestore(&chip->reg_lock, flags); 386 387 /* fill the entries */ 388 addr = (u32)substream->runtime->dma_addr; 389 desc_addr = (u32)dma->desc_buf.addr; 390 for (i = 0; i < periods; i++) { 391 struct atiixp_dma_desc *desc; 392 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i]; 393 desc->addr = cpu_to_le32(addr); 394 desc->status = 0; 395 desc->size = period_bytes >> 2; /* in dwords */ 396 desc_addr += sizeof(struct atiixp_dma_desc); 397 if (i == periods - 1) 398 desc->next = cpu_to_le32((u32)dma->desc_buf.addr); 399 else 400 desc->next = cpu_to_le32(desc_addr); 401 addr += period_bytes; 402 } 403 404 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 405 chip->remap_addr + dma->ops->llp_offset); 406 407 dma->period_bytes = period_bytes; 408 dma->periods = periods; 409 410 return 0; 411 } 412 413 /* 414 * remove the ring buffer and release it if assigned 415 */ 416 static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, 417 struct snd_pcm_substream *substream) 418 { 419 if (dma->desc_buf.area) { 420 writel(0, chip->remap_addr + dma->ops->llp_offset); 421 snd_dma_free_pages(&dma->desc_buf); 422 dma->desc_buf.area = NULL; 423 } 424 } 425 426 /* 427 * AC97 interface 428 */ 429 static int snd_atiixp_acquire_codec(struct atiixp *chip) 430 { 431 int timeout = 1000; 432 433 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) { 434 if (! timeout--) { 435 dev_warn(chip->card->dev, "codec acquire timeout\n"); 436 return -EBUSY; 437 } 438 udelay(1); 439 } 440 return 0; 441 } 442 443 static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg) 444 { 445 unsigned int data; 446 int timeout; 447 448 if (snd_atiixp_acquire_codec(chip) < 0) 449 return 0xffff; 450 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 451 ATI_REG_PHYS_OUT_ADDR_EN | 452 ATI_REG_PHYS_OUT_RW | 453 codec; 454 atiixp_write(chip, PHYS_OUT_ADDR, data); 455 if (snd_atiixp_acquire_codec(chip) < 0) 456 return 0xffff; 457 timeout = 1000; 458 do { 459 data = atiixp_read(chip, PHYS_IN_ADDR); 460 if (data & ATI_REG_PHYS_IN_READ_FLAG) 461 return data >> ATI_REG_PHYS_IN_DATA_SHIFT; 462 udelay(1); 463 } while (--timeout); 464 /* time out may happen during reset */ 465 if (reg < 0x7c) 466 dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg); 467 return 0xffff; 468 } 469 470 471 static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec, 472 unsigned short reg, unsigned short val) 473 { 474 unsigned int data; 475 476 if (snd_atiixp_acquire_codec(chip) < 0) 477 return; 478 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) | 479 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 480 ATI_REG_PHYS_OUT_ADDR_EN | codec; 481 atiixp_write(chip, PHYS_OUT_ADDR, data); 482 } 483 484 485 static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97, 486 unsigned short reg) 487 { 488 struct atiixp *chip = ac97->private_data; 489 return snd_atiixp_codec_read(chip, ac97->num, reg); 490 491 } 492 493 static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg, 494 unsigned short val) 495 { 496 struct atiixp *chip = ac97->private_data; 497 snd_atiixp_codec_write(chip, ac97->num, reg, val); 498 } 499 500 /* 501 * reset AC link 502 */ 503 static int snd_atiixp_aclink_reset(struct atiixp *chip) 504 { 505 int timeout; 506 507 /* reset powerdoewn */ 508 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) 509 udelay(10); 510 511 /* perform a software reset */ 512 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); 513 atiixp_read(chip, CMD); 514 udelay(10); 515 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); 516 517 timeout = 10; 518 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { 519 /* do a hard reset */ 520 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, 521 ATI_REG_CMD_AC_SYNC); 522 atiixp_read(chip, CMD); 523 mdelay(1); 524 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); 525 if (!--timeout) { 526 dev_err(chip->card->dev, "codec reset timeout\n"); 527 break; 528 } 529 } 530 531 /* deassert RESET and assert SYNC to make sure */ 532 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, 533 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET); 534 535 return 0; 536 } 537 538 #ifdef CONFIG_PM_SLEEP 539 static int snd_atiixp_aclink_down(struct atiixp *chip) 540 { 541 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */ 542 // return -EBUSY; 543 atiixp_update(chip, CMD, 544 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET, 545 ATI_REG_CMD_POWERDOWN); 546 return 0; 547 } 548 #endif 549 550 /* 551 * auto-detection of codecs 552 * 553 * the IXP chip can generate interrupts for the non-existing codecs. 554 * NEW_FRAME interrupt is used to make sure that the interrupt is generated 555 * even if all three codecs are connected. 556 */ 557 558 #define ALL_CODEC_NOT_READY \ 559 (ATI_REG_ISR_CODEC0_NOT_READY |\ 560 ATI_REG_ISR_CODEC1_NOT_READY |\ 561 ATI_REG_ISR_CODEC2_NOT_READY) 562 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME) 563 564 static int ac97_probing_bugs(struct pci_dev *pci) 565 { 566 const struct snd_pci_quirk *q; 567 568 q = snd_pci_quirk_lookup(pci, atiixp_quirks); 569 if (q) { 570 dev_dbg(&pci->dev, "atiixp quirk for %s. Forcing codec %d\n", 571 snd_pci_quirk_name(q), q->value); 572 return q->value; 573 } 574 /* this hardware doesn't need workarounds. Probe for codec */ 575 return -1; 576 } 577 578 static int snd_atiixp_codec_detect(struct atiixp *chip) 579 { 580 int timeout; 581 582 chip->codec_not_ready_bits = 0; 583 if (ac97_codec == -1) 584 ac97_codec = ac97_probing_bugs(chip->pci); 585 if (ac97_codec >= 0) { 586 chip->codec_not_ready_bits |= 587 CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10)); 588 return 0; 589 } 590 591 atiixp_write(chip, IER, CODEC_CHECK_BITS); 592 /* wait for the interrupts */ 593 timeout = 50; 594 while (timeout-- > 0) { 595 mdelay(1); 596 if (chip->codec_not_ready_bits) 597 break; 598 } 599 atiixp_write(chip, IER, 0); /* disable irqs */ 600 601 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) { 602 dev_err(chip->card->dev, "no codec detected!\n"); 603 return -ENXIO; 604 } 605 return 0; 606 } 607 608 609 /* 610 * enable DMA and irqs 611 */ 612 static int snd_atiixp_chip_start(struct atiixp *chip) 613 { 614 unsigned int reg; 615 616 /* set up spdif, enable burst mode */ 617 reg = atiixp_read(chip, CMD); 618 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT; 619 reg |= ATI_REG_CMD_BURST_EN; 620 atiixp_write(chip, CMD, reg); 621 622 reg = atiixp_read(chip, SPDF_CMD); 623 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH); 624 atiixp_write(chip, SPDF_CMD, reg); 625 626 /* clear all interrupt source */ 627 atiixp_write(chip, ISR, 0xffffffff); 628 /* enable irqs */ 629 atiixp_write(chip, IER, 630 ATI_REG_IER_IO_STATUS_EN | 631 ATI_REG_IER_IN_XRUN_EN | 632 ATI_REG_IER_OUT_XRUN_EN | 633 ATI_REG_IER_SPDF_XRUN_EN | 634 ATI_REG_IER_SPDF_STATUS_EN); 635 return 0; 636 } 637 638 639 /* 640 * disable DMA and IRQs 641 */ 642 static int snd_atiixp_chip_stop(struct atiixp *chip) 643 { 644 /* clear interrupt source */ 645 atiixp_write(chip, ISR, atiixp_read(chip, ISR)); 646 /* disable irqs */ 647 atiixp_write(chip, IER, 0); 648 return 0; 649 } 650 651 652 /* 653 * PCM section 654 */ 655 656 /* 657 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current 658 * position. when SG-buffer is implemented, the offset must be calculated 659 * correctly... 660 */ 661 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream) 662 { 663 struct atiixp *chip = snd_pcm_substream_chip(substream); 664 struct snd_pcm_runtime *runtime = substream->runtime; 665 struct atiixp_dma *dma = runtime->private_data; 666 unsigned int curptr; 667 int timeout = 1000; 668 669 while (timeout--) { 670 curptr = readl(chip->remap_addr + dma->ops->dt_cur); 671 if (curptr < dma->buf_addr) 672 continue; 673 curptr -= dma->buf_addr; 674 if (curptr >= dma->buf_bytes) 675 continue; 676 return bytes_to_frames(runtime, curptr); 677 } 678 dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n", 679 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr); 680 return 0; 681 } 682 683 /* 684 * XRUN detected, and stop the PCM substream 685 */ 686 static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma) 687 { 688 if (! dma->substream || ! dma->running) 689 return; 690 dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type); 691 snd_pcm_stop_xrun(dma->substream); 692 } 693 694 /* 695 * the period ack. update the substream. 696 */ 697 static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma) 698 { 699 if (! dma->substream || ! dma->running) 700 return; 701 snd_pcm_period_elapsed(dma->substream); 702 } 703 704 /* set BUS_BUSY interrupt bit if any DMA is running */ 705 /* call with spinlock held */ 706 static void snd_atiixp_check_bus_busy(struct atiixp *chip) 707 { 708 unsigned int bus_busy; 709 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN | 710 ATI_REG_CMD_RECEIVE_EN | 711 ATI_REG_CMD_SPDF_OUT_EN)) 712 bus_busy = ATI_REG_IER_SET_BUS_BUSY; 713 else 714 bus_busy = 0; 715 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy); 716 } 717 718 /* common trigger callback 719 * calling the lowlevel callbacks in it 720 */ 721 static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 722 { 723 struct atiixp *chip = snd_pcm_substream_chip(substream); 724 struct atiixp_dma *dma = substream->runtime->private_data; 725 int err = 0; 726 727 if (snd_BUG_ON(!dma->ops->enable_transfer || 728 !dma->ops->flush_dma)) 729 return -EINVAL; 730 731 spin_lock(&chip->reg_lock); 732 switch (cmd) { 733 case SNDRV_PCM_TRIGGER_START: 734 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 735 case SNDRV_PCM_TRIGGER_RESUME: 736 if (dma->running && dma->suspended && 737 cmd == SNDRV_PCM_TRIGGER_RESUME) 738 writel(dma->saved_curptr, chip->remap_addr + 739 dma->ops->dt_cur); 740 dma->ops->enable_transfer(chip, 1); 741 dma->running = 1; 742 dma->suspended = 0; 743 break; 744 case SNDRV_PCM_TRIGGER_STOP: 745 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 746 case SNDRV_PCM_TRIGGER_SUSPEND: 747 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND; 748 if (dma->running && dma->suspended) 749 dma->saved_curptr = readl(chip->remap_addr + 750 dma->ops->dt_cur); 751 dma->ops->enable_transfer(chip, 0); 752 dma->running = 0; 753 break; 754 default: 755 err = -EINVAL; 756 break; 757 } 758 if (! err) { 759 snd_atiixp_check_bus_busy(chip); 760 if (cmd == SNDRV_PCM_TRIGGER_STOP) { 761 dma->ops->flush_dma(chip); 762 snd_atiixp_check_bus_busy(chip); 763 } 764 } 765 spin_unlock(&chip->reg_lock); 766 return err; 767 } 768 769 770 /* 771 * lowlevel callbacks for each DMA type 772 * 773 * every callback is supposed to be called in chip->reg_lock spinlock 774 */ 775 776 /* flush FIFO of analog OUT DMA */ 777 static void atiixp_out_flush_dma(struct atiixp *chip) 778 { 779 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH); 780 } 781 782 /* enable/disable analog OUT DMA */ 783 static void atiixp_out_enable_dma(struct atiixp *chip, int on) 784 { 785 unsigned int data; 786 data = atiixp_read(chip, CMD); 787 if (on) { 788 if (data & ATI_REG_CMD_OUT_DMA_EN) 789 return; 790 atiixp_out_flush_dma(chip); 791 data |= ATI_REG_CMD_OUT_DMA_EN; 792 } else 793 data &= ~ATI_REG_CMD_OUT_DMA_EN; 794 atiixp_write(chip, CMD, data); 795 } 796 797 /* start/stop transfer over OUT DMA */ 798 static void atiixp_out_enable_transfer(struct atiixp *chip, int on) 799 { 800 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN, 801 on ? ATI_REG_CMD_SEND_EN : 0); 802 } 803 804 /* enable/disable analog IN DMA */ 805 static void atiixp_in_enable_dma(struct atiixp *chip, int on) 806 { 807 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN, 808 on ? ATI_REG_CMD_IN_DMA_EN : 0); 809 } 810 811 /* start/stop analog IN DMA */ 812 static void atiixp_in_enable_transfer(struct atiixp *chip, int on) 813 { 814 if (on) { 815 unsigned int data = atiixp_read(chip, CMD); 816 if (! (data & ATI_REG_CMD_RECEIVE_EN)) { 817 data |= ATI_REG_CMD_RECEIVE_EN; 818 #if 0 /* FIXME: this causes the endless loop */ 819 /* wait until slot 3/4 are finished */ 820 while ((atiixp_read(chip, COUNTER) & 821 ATI_REG_COUNTER_SLOT) != 5) 822 ; 823 #endif 824 atiixp_write(chip, CMD, data); 825 } 826 } else 827 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0); 828 } 829 830 /* flush FIFO of analog IN DMA */ 831 static void atiixp_in_flush_dma(struct atiixp *chip) 832 { 833 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH); 834 } 835 836 /* enable/disable SPDIF OUT DMA */ 837 static void atiixp_spdif_enable_dma(struct atiixp *chip, int on) 838 { 839 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN, 840 on ? ATI_REG_CMD_SPDF_DMA_EN : 0); 841 } 842 843 /* start/stop SPDIF OUT DMA */ 844 static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on) 845 { 846 unsigned int data; 847 data = atiixp_read(chip, CMD); 848 if (on) 849 data |= ATI_REG_CMD_SPDF_OUT_EN; 850 else 851 data &= ~ATI_REG_CMD_SPDF_OUT_EN; 852 atiixp_write(chip, CMD, data); 853 } 854 855 /* flush FIFO of SPDIF OUT DMA */ 856 static void atiixp_spdif_flush_dma(struct atiixp *chip) 857 { 858 int timeout; 859 860 /* DMA off, transfer on */ 861 atiixp_spdif_enable_dma(chip, 0); 862 atiixp_spdif_enable_transfer(chip, 1); 863 864 timeout = 100; 865 do { 866 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED)) 867 break; 868 udelay(1); 869 } while (timeout-- > 0); 870 871 atiixp_spdif_enable_transfer(chip, 0); 872 } 873 874 /* set up slots and formats for SPDIF OUT */ 875 static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream) 876 { 877 struct atiixp *chip = snd_pcm_substream_chip(substream); 878 879 spin_lock_irq(&chip->reg_lock); 880 if (chip->spdif_over_aclink) { 881 unsigned int data; 882 /* enable slots 10/11 */ 883 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 884 ATI_REG_CMD_SPDF_CONFIG_01); 885 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK; 886 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) | 887 ATI_REG_OUT_DMA_SLOT_BIT(11); 888 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; 889 atiixp_write(chip, OUT_DMA_SLOT, data); 890 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT, 891 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 892 ATI_REG_CMD_INTERLEAVE_OUT : 0); 893 } else { 894 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0); 895 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0); 896 } 897 spin_unlock_irq(&chip->reg_lock); 898 return 0; 899 } 900 901 /* set up slots and formats for analog OUT */ 902 static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream) 903 { 904 struct atiixp *chip = snd_pcm_substream_chip(substream); 905 unsigned int data; 906 907 spin_lock_irq(&chip->reg_lock); 908 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK; 909 switch (substream->runtime->channels) { 910 case 8: 911 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) | 912 ATI_REG_OUT_DMA_SLOT_BIT(11); 913 /* fall through */ 914 case 6: 915 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) | 916 ATI_REG_OUT_DMA_SLOT_BIT(8); 917 /* fall through */ 918 case 4: 919 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) | 920 ATI_REG_OUT_DMA_SLOT_BIT(9); 921 /* fall through */ 922 default: 923 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) | 924 ATI_REG_OUT_DMA_SLOT_BIT(4); 925 break; 926 } 927 928 /* set output threshold */ 929 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; 930 atiixp_write(chip, OUT_DMA_SLOT, data); 931 932 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT, 933 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 934 ATI_REG_CMD_INTERLEAVE_OUT : 0); 935 936 /* 937 * enable 6 channel re-ordering bit if needed 938 */ 939 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN, 940 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0); 941 942 spin_unlock_irq(&chip->reg_lock); 943 return 0; 944 } 945 946 /* set up slots and formats for analog IN */ 947 static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream) 948 { 949 struct atiixp *chip = snd_pcm_substream_chip(substream); 950 951 spin_lock_irq(&chip->reg_lock); 952 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN, 953 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 954 ATI_REG_CMD_INTERLEAVE_IN : 0); 955 spin_unlock_irq(&chip->reg_lock); 956 return 0; 957 } 958 959 /* 960 * hw_params - allocate the buffer and set up buffer descriptors 961 */ 962 static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream, 963 struct snd_pcm_hw_params *hw_params) 964 { 965 struct atiixp *chip = snd_pcm_substream_chip(substream); 966 struct atiixp_dma *dma = substream->runtime->private_data; 967 int err; 968 969 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 970 if (err < 0) 971 return err; 972 dma->buf_addr = substream->runtime->dma_addr; 973 dma->buf_bytes = params_buffer_bytes(hw_params); 974 975 err = atiixp_build_dma_packets(chip, dma, substream, 976 params_periods(hw_params), 977 params_period_bytes(hw_params)); 978 if (err < 0) 979 return err; 980 981 if (dma->ac97_pcm_type >= 0) { 982 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type]; 983 /* PCM is bound to AC97 codec(s) 984 * set up the AC97 codecs 985 */ 986 if (dma->pcm_open_flag) { 987 snd_ac97_pcm_close(pcm); 988 dma->pcm_open_flag = 0; 989 } 990 err = snd_ac97_pcm_open(pcm, params_rate(hw_params), 991 params_channels(hw_params), 992 pcm->r[0].slots); 993 if (err >= 0) 994 dma->pcm_open_flag = 1; 995 } 996 997 return err; 998 } 999 1000 static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream) 1001 { 1002 struct atiixp *chip = snd_pcm_substream_chip(substream); 1003 struct atiixp_dma *dma = substream->runtime->private_data; 1004 1005 if (dma->pcm_open_flag) { 1006 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type]; 1007 snd_ac97_pcm_close(pcm); 1008 dma->pcm_open_flag = 0; 1009 } 1010 atiixp_clear_dma_packets(chip, dma, substream); 1011 snd_pcm_lib_free_pages(substream); 1012 return 0; 1013 } 1014 1015 1016 /* 1017 * pcm hardware definition, identical for all DMA types 1018 */ 1019 static const struct snd_pcm_hardware snd_atiixp_pcm_hw = 1020 { 1021 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1022 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1023 SNDRV_PCM_INFO_PAUSE | 1024 SNDRV_PCM_INFO_RESUME | 1025 SNDRV_PCM_INFO_MMAP_VALID), 1026 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 1027 .rates = SNDRV_PCM_RATE_48000, 1028 .rate_min = 48000, 1029 .rate_max = 48000, 1030 .channels_min = 2, 1031 .channels_max = 2, 1032 .buffer_bytes_max = 256 * 1024, 1033 .period_bytes_min = 32, 1034 .period_bytes_max = 128 * 1024, 1035 .periods_min = 2, 1036 .periods_max = ATI_MAX_DESCRIPTORS, 1037 }; 1038 1039 static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream, 1040 struct atiixp_dma *dma, int pcm_type) 1041 { 1042 struct atiixp *chip = snd_pcm_substream_chip(substream); 1043 struct snd_pcm_runtime *runtime = substream->runtime; 1044 int err; 1045 1046 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma)) 1047 return -EINVAL; 1048 1049 if (dma->opened) 1050 return -EBUSY; 1051 dma->substream = substream; 1052 runtime->hw = snd_atiixp_pcm_hw; 1053 dma->ac97_pcm_type = pcm_type; 1054 if (pcm_type >= 0) { 1055 runtime->hw.rates = chip->pcms[pcm_type]->rates; 1056 snd_pcm_limit_hw_rates(runtime); 1057 } else { 1058 /* direct SPDIF */ 1059 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE; 1060 } 1061 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 1062 return err; 1063 runtime->private_data = dma; 1064 1065 /* enable DMA bits */ 1066 spin_lock_irq(&chip->reg_lock); 1067 dma->ops->enable_dma(chip, 1); 1068 spin_unlock_irq(&chip->reg_lock); 1069 dma->opened = 1; 1070 1071 return 0; 1072 } 1073 1074 static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream, 1075 struct atiixp_dma *dma) 1076 { 1077 struct atiixp *chip = snd_pcm_substream_chip(substream); 1078 /* disable DMA bits */ 1079 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma)) 1080 return -EINVAL; 1081 spin_lock_irq(&chip->reg_lock); 1082 dma->ops->enable_dma(chip, 0); 1083 spin_unlock_irq(&chip->reg_lock); 1084 dma->substream = NULL; 1085 dma->opened = 0; 1086 return 0; 1087 } 1088 1089 /* 1090 */ 1091 static int snd_atiixp_playback_open(struct snd_pcm_substream *substream) 1092 { 1093 struct atiixp *chip = snd_pcm_substream_chip(substream); 1094 int err; 1095 1096 mutex_lock(&chip->open_mutex); 1097 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0); 1098 mutex_unlock(&chip->open_mutex); 1099 if (err < 0) 1100 return err; 1101 substream->runtime->hw.channels_max = chip->max_channels; 1102 if (chip->max_channels > 2) 1103 /* channels must be even */ 1104 snd_pcm_hw_constraint_step(substream->runtime, 0, 1105 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1106 return 0; 1107 } 1108 1109 static int snd_atiixp_playback_close(struct snd_pcm_substream *substream) 1110 { 1111 struct atiixp *chip = snd_pcm_substream_chip(substream); 1112 int err; 1113 mutex_lock(&chip->open_mutex); 1114 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); 1115 mutex_unlock(&chip->open_mutex); 1116 return err; 1117 } 1118 1119 static int snd_atiixp_capture_open(struct snd_pcm_substream *substream) 1120 { 1121 struct atiixp *chip = snd_pcm_substream_chip(substream); 1122 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1); 1123 } 1124 1125 static int snd_atiixp_capture_close(struct snd_pcm_substream *substream) 1126 { 1127 struct atiixp *chip = snd_pcm_substream_chip(substream); 1128 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]); 1129 } 1130 1131 static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream) 1132 { 1133 struct atiixp *chip = snd_pcm_substream_chip(substream); 1134 int err; 1135 mutex_lock(&chip->open_mutex); 1136 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */ 1137 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2); 1138 else 1139 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1); 1140 mutex_unlock(&chip->open_mutex); 1141 return err; 1142 } 1143 1144 static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream) 1145 { 1146 struct atiixp *chip = snd_pcm_substream_chip(substream); 1147 int err; 1148 mutex_lock(&chip->open_mutex); 1149 if (chip->spdif_over_aclink) 1150 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); 1151 else 1152 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]); 1153 mutex_unlock(&chip->open_mutex); 1154 return err; 1155 } 1156 1157 /* AC97 playback */ 1158 static const struct snd_pcm_ops snd_atiixp_playback_ops = { 1159 .open = snd_atiixp_playback_open, 1160 .close = snd_atiixp_playback_close, 1161 .ioctl = snd_pcm_lib_ioctl, 1162 .hw_params = snd_atiixp_pcm_hw_params, 1163 .hw_free = snd_atiixp_pcm_hw_free, 1164 .prepare = snd_atiixp_playback_prepare, 1165 .trigger = snd_atiixp_pcm_trigger, 1166 .pointer = snd_atiixp_pcm_pointer, 1167 }; 1168 1169 /* AC97 capture */ 1170 static const struct snd_pcm_ops snd_atiixp_capture_ops = { 1171 .open = snd_atiixp_capture_open, 1172 .close = snd_atiixp_capture_close, 1173 .ioctl = snd_pcm_lib_ioctl, 1174 .hw_params = snd_atiixp_pcm_hw_params, 1175 .hw_free = snd_atiixp_pcm_hw_free, 1176 .prepare = snd_atiixp_capture_prepare, 1177 .trigger = snd_atiixp_pcm_trigger, 1178 .pointer = snd_atiixp_pcm_pointer, 1179 }; 1180 1181 /* SPDIF playback */ 1182 static const struct snd_pcm_ops snd_atiixp_spdif_ops = { 1183 .open = snd_atiixp_spdif_open, 1184 .close = snd_atiixp_spdif_close, 1185 .ioctl = snd_pcm_lib_ioctl, 1186 .hw_params = snd_atiixp_pcm_hw_params, 1187 .hw_free = snd_atiixp_pcm_hw_free, 1188 .prepare = snd_atiixp_spdif_prepare, 1189 .trigger = snd_atiixp_pcm_trigger, 1190 .pointer = snd_atiixp_pcm_pointer, 1191 }; 1192 1193 static const struct ac97_pcm atiixp_pcm_defs[] = { 1194 /* front PCM */ 1195 { 1196 .exclusive = 1, 1197 .r = { { 1198 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1199 (1 << AC97_SLOT_PCM_RIGHT) | 1200 (1 << AC97_SLOT_PCM_CENTER) | 1201 (1 << AC97_SLOT_PCM_SLEFT) | 1202 (1 << AC97_SLOT_PCM_SRIGHT) | 1203 (1 << AC97_SLOT_LFE) 1204 } 1205 } 1206 }, 1207 /* PCM IN #1 */ 1208 { 1209 .stream = 1, 1210 .exclusive = 1, 1211 .r = { { 1212 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1213 (1 << AC97_SLOT_PCM_RIGHT) 1214 } 1215 } 1216 }, 1217 /* S/PDIF OUT (optional) */ 1218 { 1219 .exclusive = 1, 1220 .spdif = 1, 1221 .r = { { 1222 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) | 1223 (1 << AC97_SLOT_SPDIF_RIGHT2) 1224 } 1225 } 1226 }, 1227 }; 1228 1229 static const struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { 1230 .type = ATI_DMA_PLAYBACK, 1231 .llp_offset = ATI_REG_OUT_DMA_LINKPTR, 1232 .dt_cur = ATI_REG_OUT_DMA_DT_CUR, 1233 .enable_dma = atiixp_out_enable_dma, 1234 .enable_transfer = atiixp_out_enable_transfer, 1235 .flush_dma = atiixp_out_flush_dma, 1236 }; 1237 1238 static const struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { 1239 .type = ATI_DMA_CAPTURE, 1240 .llp_offset = ATI_REG_IN_DMA_LINKPTR, 1241 .dt_cur = ATI_REG_IN_DMA_DT_CUR, 1242 .enable_dma = atiixp_in_enable_dma, 1243 .enable_transfer = atiixp_in_enable_transfer, 1244 .flush_dma = atiixp_in_flush_dma, 1245 }; 1246 1247 static const struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = { 1248 .type = ATI_DMA_SPDIF, 1249 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR, 1250 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR, 1251 .enable_dma = atiixp_spdif_enable_dma, 1252 .enable_transfer = atiixp_spdif_enable_transfer, 1253 .flush_dma = atiixp_spdif_flush_dma, 1254 }; 1255 1256 1257 static int snd_atiixp_pcm_new(struct atiixp *chip) 1258 { 1259 struct snd_pcm *pcm; 1260 struct snd_pcm_chmap *chmap; 1261 struct snd_ac97_bus *pbus = chip->ac97_bus; 1262 int err, i, num_pcms; 1263 1264 /* initialize constants */ 1265 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops; 1266 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops; 1267 if (! chip->spdif_over_aclink) 1268 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops; 1269 1270 /* assign AC97 pcm */ 1271 if (chip->spdif_over_aclink) 1272 num_pcms = 3; 1273 else 1274 num_pcms = 2; 1275 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs); 1276 if (err < 0) 1277 return err; 1278 for (i = 0; i < num_pcms; i++) 1279 chip->pcms[i] = &pbus->pcms[i]; 1280 1281 chip->max_channels = 2; 1282 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) { 1283 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE)) 1284 chip->max_channels = 6; 1285 else 1286 chip->max_channels = 4; 1287 } 1288 1289 /* PCM #0: analog I/O */ 1290 err = snd_pcm_new(chip->card, "ATI IXP AC97", 1291 ATI_PCMDEV_ANALOG, 1, 1, &pcm); 1292 if (err < 0) 1293 return err; 1294 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops); 1295 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops); 1296 pcm->private_data = chip; 1297 strcpy(pcm->name, "ATI IXP AC97"); 1298 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm; 1299 1300 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1301 snd_dma_pci_data(chip->pci), 1302 64*1024, 128*1024); 1303 1304 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1305 snd_pcm_alt_chmaps, chip->max_channels, 0, 1306 &chmap); 1307 if (err < 0) 1308 return err; 1309 chmap->channel_mask = SND_PCM_CHMAP_MASK_2468; 1310 chip->ac97[0]->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap; 1311 1312 /* no SPDIF support on codec? */ 1313 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates) 1314 return 0; 1315 1316 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */ 1317 if (chip->pcms[ATI_PCM_SPDIF]) 1318 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000; 1319 1320 /* PCM #1: spdif playback */ 1321 err = snd_pcm_new(chip->card, "ATI IXP IEC958", 1322 ATI_PCMDEV_DIGITAL, 1, 0, &pcm); 1323 if (err < 0) 1324 return err; 1325 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops); 1326 pcm->private_data = chip; 1327 if (chip->spdif_over_aclink) 1328 strcpy(pcm->name, "ATI IXP IEC958 (AC97)"); 1329 else 1330 strcpy(pcm->name, "ATI IXP IEC958 (Direct)"); 1331 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm; 1332 1333 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1334 snd_dma_pci_data(chip->pci), 1335 64*1024, 128*1024); 1336 1337 /* pre-select AC97 SPDIF slots 10/11 */ 1338 for (i = 0; i < NUM_ATI_CODECS; i++) { 1339 if (chip->ac97[i]) 1340 snd_ac97_update_bits(chip->ac97[i], 1341 AC97_EXTENDED_STATUS, 1342 0x03 << 4, 0x03 << 4); 1343 } 1344 1345 return 0; 1346 } 1347 1348 1349 1350 /* 1351 * interrupt handler 1352 */ 1353 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id) 1354 { 1355 struct atiixp *chip = dev_id; 1356 unsigned int status; 1357 1358 status = atiixp_read(chip, ISR); 1359 1360 if (! status) 1361 return IRQ_NONE; 1362 1363 /* process audio DMA */ 1364 if (status & ATI_REG_ISR_OUT_XRUN) 1365 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); 1366 else if (status & ATI_REG_ISR_OUT_STATUS) 1367 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); 1368 if (status & ATI_REG_ISR_IN_XRUN) 1369 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); 1370 else if (status & ATI_REG_ISR_IN_STATUS) 1371 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); 1372 if (! chip->spdif_over_aclink) { 1373 if (status & ATI_REG_ISR_SPDF_XRUN) 1374 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]); 1375 else if (status & ATI_REG_ISR_SPDF_STATUS) 1376 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]); 1377 } 1378 1379 /* for codec detection */ 1380 if (status & CODEC_CHECK_BITS) { 1381 unsigned int detected; 1382 detected = status & CODEC_CHECK_BITS; 1383 spin_lock(&chip->reg_lock); 1384 chip->codec_not_ready_bits |= detected; 1385 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */ 1386 spin_unlock(&chip->reg_lock); 1387 } 1388 1389 /* ack */ 1390 atiixp_write(chip, ISR, status); 1391 1392 return IRQ_HANDLED; 1393 } 1394 1395 1396 /* 1397 * ac97 mixer section 1398 */ 1399 1400 static const struct ac97_quirk ac97_quirks[] = { 1401 { 1402 .subvendor = 0x103c, 1403 .subdevice = 0x006b, 1404 .name = "HP Pavilion ZV5030US", 1405 .type = AC97_TUNE_MUTE_LED 1406 }, 1407 { 1408 .subvendor = 0x103c, 1409 .subdevice = 0x308b, 1410 .name = "HP nx6125", 1411 .type = AC97_TUNE_MUTE_LED 1412 }, 1413 { 1414 .subvendor = 0x103c, 1415 .subdevice = 0x3091, 1416 .name = "unknown HP", 1417 .type = AC97_TUNE_MUTE_LED 1418 }, 1419 { } /* terminator */ 1420 }; 1421 1422 static int snd_atiixp_mixer_new(struct atiixp *chip, int clock, 1423 const char *quirk_override) 1424 { 1425 struct snd_ac97_bus *pbus; 1426 struct snd_ac97_template ac97; 1427 int i, err; 1428 int codec_count; 1429 static struct snd_ac97_bus_ops ops = { 1430 .write = snd_atiixp_ac97_write, 1431 .read = snd_atiixp_ac97_read, 1432 }; 1433 static unsigned int codec_skip[NUM_ATI_CODECS] = { 1434 ATI_REG_ISR_CODEC0_NOT_READY, 1435 ATI_REG_ISR_CODEC1_NOT_READY, 1436 ATI_REG_ISR_CODEC2_NOT_READY, 1437 }; 1438 1439 if (snd_atiixp_codec_detect(chip) < 0) 1440 return -ENXIO; 1441 1442 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) 1443 return err; 1444 pbus->clock = clock; 1445 chip->ac97_bus = pbus; 1446 1447 codec_count = 0; 1448 for (i = 0; i < NUM_ATI_CODECS; i++) { 1449 if (chip->codec_not_ready_bits & codec_skip[i]) 1450 continue; 1451 memset(&ac97, 0, sizeof(ac97)); 1452 ac97.private_data = chip; 1453 ac97.pci = chip->pci; 1454 ac97.num = i; 1455 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE; 1456 if (! chip->spdif_over_aclink) 1457 ac97.scaps |= AC97_SCAP_NO_SPDIF; 1458 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { 1459 chip->ac97[i] = NULL; /* to be sure */ 1460 dev_dbg(chip->card->dev, 1461 "codec %d not available for audio\n", i); 1462 continue; 1463 } 1464 codec_count++; 1465 } 1466 1467 if (! codec_count) { 1468 dev_err(chip->card->dev, "no codec available\n"); 1469 return -ENODEV; 1470 } 1471 1472 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override); 1473 1474 return 0; 1475 } 1476 1477 1478 #ifdef CONFIG_PM_SLEEP 1479 /* 1480 * power management 1481 */ 1482 static int snd_atiixp_suspend(struct device *dev) 1483 { 1484 struct snd_card *card = dev_get_drvdata(dev); 1485 struct atiixp *chip = card->private_data; 1486 int i; 1487 1488 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1489 for (i = 0; i < NUM_ATI_CODECS; i++) 1490 snd_ac97_suspend(chip->ac97[i]); 1491 snd_atiixp_aclink_down(chip); 1492 snd_atiixp_chip_stop(chip); 1493 return 0; 1494 } 1495 1496 static int snd_atiixp_resume(struct device *dev) 1497 { 1498 struct snd_card *card = dev_get_drvdata(dev); 1499 struct atiixp *chip = card->private_data; 1500 int i; 1501 1502 snd_atiixp_aclink_reset(chip); 1503 snd_atiixp_chip_start(chip); 1504 1505 for (i = 0; i < NUM_ATI_CODECS; i++) 1506 snd_ac97_resume(chip->ac97[i]); 1507 1508 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1509 if (chip->pcmdevs[i]) { 1510 struct atiixp_dma *dma = &chip->dmas[i]; 1511 if (dma->substream && dma->suspended) { 1512 dma->ops->enable_dma(chip, 1); 1513 dma->substream->ops->prepare(dma->substream); 1514 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 1515 chip->remap_addr + dma->ops->llp_offset); 1516 } 1517 } 1518 1519 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1520 return 0; 1521 } 1522 1523 static SIMPLE_DEV_PM_OPS(snd_atiixp_pm, snd_atiixp_suspend, snd_atiixp_resume); 1524 #define SND_ATIIXP_PM_OPS &snd_atiixp_pm 1525 #else 1526 #define SND_ATIIXP_PM_OPS NULL 1527 #endif /* CONFIG_PM_SLEEP */ 1528 1529 1530 /* 1531 * proc interface for register dump 1532 */ 1533 1534 static void snd_atiixp_proc_read(struct snd_info_entry *entry, 1535 struct snd_info_buffer *buffer) 1536 { 1537 struct atiixp *chip = entry->private_data; 1538 int i; 1539 1540 for (i = 0; i < 256; i += 4) 1541 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i)); 1542 } 1543 1544 static void snd_atiixp_proc_init(struct atiixp *chip) 1545 { 1546 snd_card_ro_proc_new(chip->card, "atiixp", chip, snd_atiixp_proc_read); 1547 } 1548 1549 1550 /* 1551 * destructor 1552 */ 1553 1554 static int snd_atiixp_free(struct atiixp *chip) 1555 { 1556 if (chip->irq < 0) 1557 goto __hw_end; 1558 snd_atiixp_chip_stop(chip); 1559 1560 __hw_end: 1561 if (chip->irq >= 0) 1562 free_irq(chip->irq, chip); 1563 iounmap(chip->remap_addr); 1564 pci_release_regions(chip->pci); 1565 pci_disable_device(chip->pci); 1566 kfree(chip); 1567 return 0; 1568 } 1569 1570 static int snd_atiixp_dev_free(struct snd_device *device) 1571 { 1572 struct atiixp *chip = device->device_data; 1573 return snd_atiixp_free(chip); 1574 } 1575 1576 /* 1577 * constructor for chip instance 1578 */ 1579 static int snd_atiixp_create(struct snd_card *card, 1580 struct pci_dev *pci, 1581 struct atiixp **r_chip) 1582 { 1583 static struct snd_device_ops ops = { 1584 .dev_free = snd_atiixp_dev_free, 1585 }; 1586 struct atiixp *chip; 1587 int err; 1588 1589 if ((err = pci_enable_device(pci)) < 0) 1590 return err; 1591 1592 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1593 if (chip == NULL) { 1594 pci_disable_device(pci); 1595 return -ENOMEM; 1596 } 1597 1598 spin_lock_init(&chip->reg_lock); 1599 mutex_init(&chip->open_mutex); 1600 chip->card = card; 1601 chip->pci = pci; 1602 chip->irq = -1; 1603 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) { 1604 pci_disable_device(pci); 1605 kfree(chip); 1606 return err; 1607 } 1608 chip->addr = pci_resource_start(pci, 0); 1609 chip->remap_addr = pci_ioremap_bar(pci, 0); 1610 if (chip->remap_addr == NULL) { 1611 dev_err(card->dev, "AC'97 space ioremap problem\n"); 1612 snd_atiixp_free(chip); 1613 return -EIO; 1614 } 1615 1616 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED, 1617 KBUILD_MODNAME, chip)) { 1618 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 1619 snd_atiixp_free(chip); 1620 return -EBUSY; 1621 } 1622 chip->irq = pci->irq; 1623 pci_set_master(pci); 1624 synchronize_irq(chip->irq); 1625 1626 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1627 snd_atiixp_free(chip); 1628 return err; 1629 } 1630 1631 *r_chip = chip; 1632 return 0; 1633 } 1634 1635 1636 static int snd_atiixp_probe(struct pci_dev *pci, 1637 const struct pci_device_id *pci_id) 1638 { 1639 struct snd_card *card; 1640 struct atiixp *chip; 1641 int err; 1642 1643 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card); 1644 if (err < 0) 1645 return err; 1646 1647 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA"); 1648 strcpy(card->shortname, "ATI IXP"); 1649 if ((err = snd_atiixp_create(card, pci, &chip)) < 0) 1650 goto __error; 1651 card->private_data = chip; 1652 1653 if ((err = snd_atiixp_aclink_reset(chip)) < 0) 1654 goto __error; 1655 1656 chip->spdif_over_aclink = spdif_aclink; 1657 1658 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0) 1659 goto __error; 1660 1661 if ((err = snd_atiixp_pcm_new(chip)) < 0) 1662 goto __error; 1663 1664 snd_atiixp_proc_init(chip); 1665 1666 snd_atiixp_chip_start(chip); 1667 1668 snprintf(card->longname, sizeof(card->longname), 1669 "%s rev %x with %s at %#lx, irq %i", card->shortname, 1670 pci->revision, 1671 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?", 1672 chip->addr, chip->irq); 1673 1674 if ((err = snd_card_register(card)) < 0) 1675 goto __error; 1676 1677 pci_set_drvdata(pci, card); 1678 return 0; 1679 1680 __error: 1681 snd_card_free(card); 1682 return err; 1683 } 1684 1685 static void snd_atiixp_remove(struct pci_dev *pci) 1686 { 1687 snd_card_free(pci_get_drvdata(pci)); 1688 } 1689 1690 static struct pci_driver atiixp_driver = { 1691 .name = KBUILD_MODNAME, 1692 .id_table = snd_atiixp_ids, 1693 .probe = snd_atiixp_probe, 1694 .remove = snd_atiixp_remove, 1695 .driver = { 1696 .pm = SND_ATIIXP_PM_OPS, 1697 }, 1698 }; 1699 1700 module_pci_driver(atiixp_driver); 1701