1 /* 2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers 3 * 4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 #include <asm/io.h> 23 #include <linux/delay.h> 24 #include <linux/interrupt.h> 25 #include <linux/init.h> 26 #include <linux/pci.h> 27 #include <linux/slab.h> 28 #include <linux/moduleparam.h> 29 #include <linux/mutex.h> 30 #include <sound/core.h> 31 #include <sound/pcm.h> 32 #include <sound/pcm_params.h> 33 #include <sound/info.h> 34 #include <sound/ac97_codec.h> 35 #include <sound/initval.h> 36 37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); 38 MODULE_DESCRIPTION("ATI IXP AC97 controller"); 39 MODULE_LICENSE("GPL"); 40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}"); 41 42 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */ 43 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ 44 static int ac97_clock = 48000; 45 static char *ac97_quirk; 46 static int spdif_aclink = 1; 47 static int ac97_codec = -1; 48 49 module_param(index, int, 0444); 50 MODULE_PARM_DESC(index, "Index value for ATI IXP controller."); 51 module_param(id, charp, 0444); 52 MODULE_PARM_DESC(id, "ID string for ATI IXP controller."); 53 module_param(ac97_clock, int, 0444); 54 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); 55 module_param(ac97_quirk, charp, 0444); 56 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 57 module_param(ac97_codec, int, 0444); 58 MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing."); 59 module_param(spdif_aclink, bool, 0444); 60 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link."); 61 62 /* just for backward compatibility */ 63 static int enable; 64 module_param(enable, bool, 0444); 65 66 67 /* 68 */ 69 70 #define ATI_REG_ISR 0x00 /* interrupt source */ 71 #define ATI_REG_ISR_IN_XRUN (1U<<0) 72 #define ATI_REG_ISR_IN_STATUS (1U<<1) 73 #define ATI_REG_ISR_OUT_XRUN (1U<<2) 74 #define ATI_REG_ISR_OUT_STATUS (1U<<3) 75 #define ATI_REG_ISR_SPDF_XRUN (1U<<4) 76 #define ATI_REG_ISR_SPDF_STATUS (1U<<5) 77 #define ATI_REG_ISR_PHYS_INTR (1U<<8) 78 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9) 79 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10) 80 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11) 81 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12) 82 #define ATI_REG_ISR_NEW_FRAME (1U<<13) 83 84 #define ATI_REG_IER 0x04 /* interrupt enable */ 85 #define ATI_REG_IER_IN_XRUN_EN (1U<<0) 86 #define ATI_REG_IER_IO_STATUS_EN (1U<<1) 87 #define ATI_REG_IER_OUT_XRUN_EN (1U<<2) 88 #define ATI_REG_IER_OUT_XRUN_COND (1U<<3) 89 #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4) 90 #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5) 91 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8) 92 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9) 93 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10) 94 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11) 95 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12) 96 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */ 97 #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */ 98 99 #define ATI_REG_CMD 0x08 /* command */ 100 #define ATI_REG_CMD_POWERDOWN (1U<<0) 101 #define ATI_REG_CMD_RECEIVE_EN (1U<<1) 102 #define ATI_REG_CMD_SEND_EN (1U<<2) 103 #define ATI_REG_CMD_STATUS_MEM (1U<<3) 104 #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4) 105 #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5) 106 #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6) 107 #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6 108 #define ATI_REG_CMD_IN_DMA_EN (1U<<8) 109 #define ATI_REG_CMD_OUT_DMA_EN (1U<<9) 110 #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10) 111 #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11) 112 #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12) 113 #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12) 114 #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12) 115 #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12) 116 #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12) 117 #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16) 118 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20) 119 #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21) 120 #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22) 121 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23) 122 #define ATI_REG_CMD_PACKED_DIS (1U<<24) 123 #define ATI_REG_CMD_BURST_EN (1U<<25) 124 #define ATI_REG_CMD_PANIC_EN (1U<<26) 125 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27) 126 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28) 127 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29) 128 #define ATI_REG_CMD_AC_SYNC (1U<<30) 129 #define ATI_REG_CMD_AC_RESET (1U<<31) 130 131 #define ATI_REG_PHYS_OUT_ADDR 0x0c 132 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0) 133 #define ATI_REG_PHYS_OUT_RW (1U<<2) 134 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8) 135 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9 136 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16 137 138 #define ATI_REG_PHYS_IN_ADDR 0x10 139 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8) 140 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9 141 #define ATI_REG_PHYS_IN_DATA_SHIFT 16 142 143 #define ATI_REG_SLOTREQ 0x14 144 145 #define ATI_REG_COUNTER 0x18 146 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */ 147 #define ATI_REG_COUNTER_BITCLOCK (31U<<8) 148 149 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c 150 151 #define ATI_REG_IN_DMA_LINKPTR 0x20 152 #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */ 153 #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */ 154 #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */ 155 #define ATI_REG_IN_DMA_DT_SIZE 0x30 156 157 #define ATI_REG_OUT_DMA_SLOT 0x34 158 #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3)) 159 #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff 160 #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800 161 #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11 162 163 #define ATI_REG_OUT_DMA_LINKPTR 0x38 164 #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */ 165 #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */ 166 #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */ 167 #define ATI_REG_OUT_DMA_DT_SIZE 0x48 168 169 #define ATI_REG_SPDF_CMD 0x4c 170 #define ATI_REG_SPDF_CMD_LFSR (1U<<4) 171 #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5) 172 #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */ 173 174 #define ATI_REG_SPDF_DMA_LINKPTR 0x50 175 #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */ 176 #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */ 177 #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */ 178 #define ATI_REG_SPDF_DMA_DT_SIZE 0x60 179 180 #define ATI_REG_MODEM_MIRROR 0x7c 181 #define ATI_REG_AUDIO_MIRROR 0x80 182 183 #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */ 184 #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */ 185 186 #define ATI_REG_FIFO_FLUSH 0x88 187 #define ATI_REG_FIFO_OUT_FLUSH (1U<<0) 188 #define ATI_REG_FIFO_IN_FLUSH (1U<<1) 189 190 /* LINKPTR */ 191 #define ATI_REG_LINKPTR_EN (1U<<0) 192 193 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */ 194 #define ATI_REG_DMA_DT_SIZE (0xffffU<<0) 195 #define ATI_REG_DMA_FIFO_USED (0x1fU<<16) 196 #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21) 197 #define ATI_REG_DMA_STATE (7U<<26) 198 199 200 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */ 201 202 203 struct atiixp; 204 205 /* 206 * DMA packate descriptor 207 */ 208 209 struct atiixp_dma_desc { 210 u32 addr; /* DMA buffer address */ 211 u16 status; /* status bits */ 212 u16 size; /* size of the packet in dwords */ 213 u32 next; /* address of the next packet descriptor */ 214 }; 215 216 /* 217 * stream enum 218 */ 219 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */ 220 enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */ 221 enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */ 222 223 #define NUM_ATI_CODECS 3 224 225 226 /* 227 * constants and callbacks for each DMA type 228 */ 229 struct atiixp_dma_ops { 230 int type; /* ATI_DMA_XXX */ 231 unsigned int llp_offset; /* LINKPTR offset */ 232 unsigned int dt_cur; /* DT_CUR offset */ 233 /* called from open callback */ 234 void (*enable_dma)(struct atiixp *chip, int on); 235 /* called from trigger (START/STOP) */ 236 void (*enable_transfer)(struct atiixp *chip, int on); 237 /* called from trigger (STOP only) */ 238 void (*flush_dma)(struct atiixp *chip); 239 }; 240 241 /* 242 * DMA stream 243 */ 244 struct atiixp_dma { 245 const struct atiixp_dma_ops *ops; 246 struct snd_dma_buffer desc_buf; 247 struct snd_pcm_substream *substream; /* assigned PCM substream */ 248 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */ 249 unsigned int period_bytes, periods; 250 int opened; 251 int running; 252 int suspended; 253 int pcm_open_flag; 254 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */ 255 unsigned int saved_curptr; 256 }; 257 258 /* 259 * ATI IXP chip 260 */ 261 struct atiixp { 262 struct snd_card *card; 263 struct pci_dev *pci; 264 265 unsigned long addr; 266 void __iomem *remap_addr; 267 int irq; 268 269 struct snd_ac97_bus *ac97_bus; 270 struct snd_ac97 *ac97[NUM_ATI_CODECS]; 271 272 spinlock_t reg_lock; 273 274 struct atiixp_dma dmas[NUM_ATI_DMAS]; 275 struct ac97_pcm *pcms[NUM_ATI_PCMS]; 276 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS]; 277 278 int max_channels; /* max. channels for PCM out */ 279 280 unsigned int codec_not_ready_bits; /* for codec detection */ 281 282 int spdif_over_aclink; /* passed from the module option */ 283 struct mutex open_mutex; /* playback open mutex */ 284 }; 285 286 287 /* 288 */ 289 static struct pci_device_id snd_atiixp_ids[] = { 290 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */ 291 { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */ 292 { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */ 293 { 0, } 294 }; 295 296 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids); 297 298 static struct snd_pci_quirk atiixp_quirks[] __devinitdata = { 299 SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0), 300 { } /* terminator */ 301 }; 302 303 /* 304 * lowlevel functions 305 */ 306 307 /* 308 * update the bits of the given register. 309 * return 1 if the bits changed. 310 */ 311 static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg, 312 unsigned int mask, unsigned int value) 313 { 314 void __iomem *addr = chip->remap_addr + reg; 315 unsigned int data, old_data; 316 old_data = data = readl(addr); 317 data &= ~mask; 318 data |= value; 319 if (old_data == data) 320 return 0; 321 writel(data, addr); 322 return 1; 323 } 324 325 /* 326 * macros for easy use 327 */ 328 #define atiixp_write(chip,reg,value) \ 329 writel(value, chip->remap_addr + ATI_REG_##reg) 330 #define atiixp_read(chip,reg) \ 331 readl(chip->remap_addr + ATI_REG_##reg) 332 #define atiixp_update(chip,reg,mask,val) \ 333 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val) 334 335 /* 336 * handling DMA packets 337 * 338 * we allocate a linear buffer for the DMA, and split it to each packet. 339 * in a future version, a scatter-gather buffer should be implemented. 340 */ 341 342 #define ATI_DESC_LIST_SIZE \ 343 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc)) 344 345 /* 346 * build packets ring for the given buffer size. 347 * 348 * IXP handles the buffer descriptors, which are connected as a linked 349 * list. although we can change the list dynamically, in this version, 350 * a static RING of buffer descriptors is used. 351 * 352 * the ring is built in this function, and is set up to the hardware. 353 */ 354 static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, 355 struct snd_pcm_substream *substream, 356 unsigned int periods, 357 unsigned int period_bytes) 358 { 359 unsigned int i; 360 u32 addr, desc_addr; 361 unsigned long flags; 362 363 if (periods > ATI_MAX_DESCRIPTORS) 364 return -ENOMEM; 365 366 if (dma->desc_buf.area == NULL) { 367 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, 368 snd_dma_pci_data(chip->pci), 369 ATI_DESC_LIST_SIZE, 370 &dma->desc_buf) < 0) 371 return -ENOMEM; 372 dma->period_bytes = dma->periods = 0; /* clear */ 373 } 374 375 if (dma->periods == periods && dma->period_bytes == period_bytes) 376 return 0; 377 378 /* reset DMA before changing the descriptor table */ 379 spin_lock_irqsave(&chip->reg_lock, flags); 380 writel(0, chip->remap_addr + dma->ops->llp_offset); 381 dma->ops->enable_dma(chip, 0); 382 dma->ops->enable_dma(chip, 1); 383 spin_unlock_irqrestore(&chip->reg_lock, flags); 384 385 /* fill the entries */ 386 addr = (u32)substream->runtime->dma_addr; 387 desc_addr = (u32)dma->desc_buf.addr; 388 for (i = 0; i < periods; i++) { 389 struct atiixp_dma_desc *desc; 390 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i]; 391 desc->addr = cpu_to_le32(addr); 392 desc->status = 0; 393 desc->size = period_bytes >> 2; /* in dwords */ 394 desc_addr += sizeof(struct atiixp_dma_desc); 395 if (i == periods - 1) 396 desc->next = cpu_to_le32((u32)dma->desc_buf.addr); 397 else 398 desc->next = cpu_to_le32(desc_addr); 399 addr += period_bytes; 400 } 401 402 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 403 chip->remap_addr + dma->ops->llp_offset); 404 405 dma->period_bytes = period_bytes; 406 dma->periods = periods; 407 408 return 0; 409 } 410 411 /* 412 * remove the ring buffer and release it if assigned 413 */ 414 static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma, 415 struct snd_pcm_substream *substream) 416 { 417 if (dma->desc_buf.area) { 418 writel(0, chip->remap_addr + dma->ops->llp_offset); 419 snd_dma_free_pages(&dma->desc_buf); 420 dma->desc_buf.area = NULL; 421 } 422 } 423 424 /* 425 * AC97 interface 426 */ 427 static int snd_atiixp_acquire_codec(struct atiixp *chip) 428 { 429 int timeout = 1000; 430 431 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) { 432 if (! timeout--) { 433 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n"); 434 return -EBUSY; 435 } 436 udelay(1); 437 } 438 return 0; 439 } 440 441 static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg) 442 { 443 unsigned int data; 444 int timeout; 445 446 if (snd_atiixp_acquire_codec(chip) < 0) 447 return 0xffff; 448 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 449 ATI_REG_PHYS_OUT_ADDR_EN | 450 ATI_REG_PHYS_OUT_RW | 451 codec; 452 atiixp_write(chip, PHYS_OUT_ADDR, data); 453 if (snd_atiixp_acquire_codec(chip) < 0) 454 return 0xffff; 455 timeout = 1000; 456 do { 457 data = atiixp_read(chip, PHYS_IN_ADDR); 458 if (data & ATI_REG_PHYS_IN_READ_FLAG) 459 return data >> ATI_REG_PHYS_IN_DATA_SHIFT; 460 udelay(1); 461 } while (--timeout); 462 /* time out may happen during reset */ 463 if (reg < 0x7c) 464 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg); 465 return 0xffff; 466 } 467 468 469 static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec, 470 unsigned short reg, unsigned short val) 471 { 472 unsigned int data; 473 474 if (snd_atiixp_acquire_codec(chip) < 0) 475 return; 476 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) | 477 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | 478 ATI_REG_PHYS_OUT_ADDR_EN | codec; 479 atiixp_write(chip, PHYS_OUT_ADDR, data); 480 } 481 482 483 static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97, 484 unsigned short reg) 485 { 486 struct atiixp *chip = ac97->private_data; 487 return snd_atiixp_codec_read(chip, ac97->num, reg); 488 489 } 490 491 static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg, 492 unsigned short val) 493 { 494 struct atiixp *chip = ac97->private_data; 495 snd_atiixp_codec_write(chip, ac97->num, reg, val); 496 } 497 498 /* 499 * reset AC link 500 */ 501 static int snd_atiixp_aclink_reset(struct atiixp *chip) 502 { 503 int timeout; 504 505 /* reset powerdoewn */ 506 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) 507 udelay(10); 508 509 /* perform a software reset */ 510 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); 511 atiixp_read(chip, CMD); 512 udelay(10); 513 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); 514 515 timeout = 10; 516 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { 517 /* do a hard reset */ 518 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, 519 ATI_REG_CMD_AC_SYNC); 520 atiixp_read(chip, CMD); 521 mdelay(1); 522 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); 523 if (--timeout) { 524 snd_printk(KERN_ERR "atiixp: codec reset timeout\n"); 525 break; 526 } 527 } 528 529 /* deassert RESET and assert SYNC to make sure */ 530 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, 531 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET); 532 533 return 0; 534 } 535 536 #ifdef CONFIG_PM 537 static int snd_atiixp_aclink_down(struct atiixp *chip) 538 { 539 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */ 540 // return -EBUSY; 541 atiixp_update(chip, CMD, 542 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET, 543 ATI_REG_CMD_POWERDOWN); 544 return 0; 545 } 546 #endif 547 548 /* 549 * auto-detection of codecs 550 * 551 * the IXP chip can generate interrupts for the non-existing codecs. 552 * NEW_FRAME interrupt is used to make sure that the interrupt is generated 553 * even if all three codecs are connected. 554 */ 555 556 #define ALL_CODEC_NOT_READY \ 557 (ATI_REG_ISR_CODEC0_NOT_READY |\ 558 ATI_REG_ISR_CODEC1_NOT_READY |\ 559 ATI_REG_ISR_CODEC2_NOT_READY) 560 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME) 561 562 static int __devinit ac97_probing_bugs(struct pci_dev *pci) 563 { 564 const struct snd_pci_quirk *q; 565 566 q = snd_pci_quirk_lookup(pci, atiixp_quirks); 567 if (q) { 568 snd_printdd(KERN_INFO "Atiixp quirk for %s. " 569 "Forcing codec %d\n", q->name, q->value); 570 return q->value; 571 } 572 /* this hardware doesn't need workarounds. Probe for codec */ 573 return -1; 574 } 575 576 static int __devinit snd_atiixp_codec_detect(struct atiixp *chip) 577 { 578 int timeout; 579 580 chip->codec_not_ready_bits = 0; 581 if (ac97_codec == -1) 582 ac97_codec = ac97_probing_bugs(chip->pci); 583 if (ac97_codec >= 0) { 584 chip->codec_not_ready_bits |= 585 CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10)); 586 return 0; 587 } 588 589 atiixp_write(chip, IER, CODEC_CHECK_BITS); 590 /* wait for the interrupts */ 591 timeout = 50; 592 while (timeout-- > 0) { 593 mdelay(1); 594 if (chip->codec_not_ready_bits) 595 break; 596 } 597 atiixp_write(chip, IER, 0); /* disable irqs */ 598 599 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) { 600 snd_printk(KERN_ERR "atiixp: no codec detected!\n"); 601 return -ENXIO; 602 } 603 return 0; 604 } 605 606 607 /* 608 * enable DMA and irqs 609 */ 610 static int snd_atiixp_chip_start(struct atiixp *chip) 611 { 612 unsigned int reg; 613 614 /* set up spdif, enable burst mode */ 615 reg = atiixp_read(chip, CMD); 616 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT; 617 reg |= ATI_REG_CMD_BURST_EN; 618 atiixp_write(chip, CMD, reg); 619 620 reg = atiixp_read(chip, SPDF_CMD); 621 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH); 622 atiixp_write(chip, SPDF_CMD, reg); 623 624 /* clear all interrupt source */ 625 atiixp_write(chip, ISR, 0xffffffff); 626 /* enable irqs */ 627 atiixp_write(chip, IER, 628 ATI_REG_IER_IO_STATUS_EN | 629 ATI_REG_IER_IN_XRUN_EN | 630 ATI_REG_IER_OUT_XRUN_EN | 631 ATI_REG_IER_SPDF_XRUN_EN | 632 ATI_REG_IER_SPDF_STATUS_EN); 633 return 0; 634 } 635 636 637 /* 638 * disable DMA and IRQs 639 */ 640 static int snd_atiixp_chip_stop(struct atiixp *chip) 641 { 642 /* clear interrupt source */ 643 atiixp_write(chip, ISR, atiixp_read(chip, ISR)); 644 /* disable irqs */ 645 atiixp_write(chip, IER, 0); 646 return 0; 647 } 648 649 650 /* 651 * PCM section 652 */ 653 654 /* 655 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current 656 * position. when SG-buffer is implemented, the offset must be calculated 657 * correctly... 658 */ 659 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream) 660 { 661 struct atiixp *chip = snd_pcm_substream_chip(substream); 662 struct snd_pcm_runtime *runtime = substream->runtime; 663 struct atiixp_dma *dma = runtime->private_data; 664 unsigned int curptr; 665 int timeout = 1000; 666 667 while (timeout--) { 668 curptr = readl(chip->remap_addr + dma->ops->dt_cur); 669 if (curptr < dma->buf_addr) 670 continue; 671 curptr -= dma->buf_addr; 672 if (curptr >= dma->buf_bytes) 673 continue; 674 return bytes_to_frames(runtime, curptr); 675 } 676 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n", 677 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr); 678 return 0; 679 } 680 681 /* 682 * XRUN detected, and stop the PCM substream 683 */ 684 static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma) 685 { 686 if (! dma->substream || ! dma->running) 687 return; 688 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type); 689 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN); 690 } 691 692 /* 693 * the period ack. update the substream. 694 */ 695 static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma) 696 { 697 if (! dma->substream || ! dma->running) 698 return; 699 snd_pcm_period_elapsed(dma->substream); 700 } 701 702 /* set BUS_BUSY interrupt bit if any DMA is running */ 703 /* call with spinlock held */ 704 static void snd_atiixp_check_bus_busy(struct atiixp *chip) 705 { 706 unsigned int bus_busy; 707 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN | 708 ATI_REG_CMD_RECEIVE_EN | 709 ATI_REG_CMD_SPDF_OUT_EN)) 710 bus_busy = ATI_REG_IER_SET_BUS_BUSY; 711 else 712 bus_busy = 0; 713 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy); 714 } 715 716 /* common trigger callback 717 * calling the lowlevel callbacks in it 718 */ 719 static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 720 { 721 struct atiixp *chip = snd_pcm_substream_chip(substream); 722 struct atiixp_dma *dma = substream->runtime->private_data; 723 int err = 0; 724 725 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL); 726 727 spin_lock(&chip->reg_lock); 728 switch (cmd) { 729 case SNDRV_PCM_TRIGGER_START: 730 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 731 case SNDRV_PCM_TRIGGER_RESUME: 732 dma->ops->enable_transfer(chip, 1); 733 dma->running = 1; 734 dma->suspended = 0; 735 break; 736 case SNDRV_PCM_TRIGGER_STOP: 737 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 738 case SNDRV_PCM_TRIGGER_SUSPEND: 739 dma->ops->enable_transfer(chip, 0); 740 dma->running = 0; 741 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND; 742 break; 743 default: 744 err = -EINVAL; 745 break; 746 } 747 if (! err) { 748 snd_atiixp_check_bus_busy(chip); 749 if (cmd == SNDRV_PCM_TRIGGER_STOP) { 750 dma->ops->flush_dma(chip); 751 snd_atiixp_check_bus_busy(chip); 752 } 753 } 754 spin_unlock(&chip->reg_lock); 755 return err; 756 } 757 758 759 /* 760 * lowlevel callbacks for each DMA type 761 * 762 * every callback is supposed to be called in chip->reg_lock spinlock 763 */ 764 765 /* flush FIFO of analog OUT DMA */ 766 static void atiixp_out_flush_dma(struct atiixp *chip) 767 { 768 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH); 769 } 770 771 /* enable/disable analog OUT DMA */ 772 static void atiixp_out_enable_dma(struct atiixp *chip, int on) 773 { 774 unsigned int data; 775 data = atiixp_read(chip, CMD); 776 if (on) { 777 if (data & ATI_REG_CMD_OUT_DMA_EN) 778 return; 779 atiixp_out_flush_dma(chip); 780 data |= ATI_REG_CMD_OUT_DMA_EN; 781 } else 782 data &= ~ATI_REG_CMD_OUT_DMA_EN; 783 atiixp_write(chip, CMD, data); 784 } 785 786 /* start/stop transfer over OUT DMA */ 787 static void atiixp_out_enable_transfer(struct atiixp *chip, int on) 788 { 789 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN, 790 on ? ATI_REG_CMD_SEND_EN : 0); 791 } 792 793 /* enable/disable analog IN DMA */ 794 static void atiixp_in_enable_dma(struct atiixp *chip, int on) 795 { 796 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN, 797 on ? ATI_REG_CMD_IN_DMA_EN : 0); 798 } 799 800 /* start/stop analog IN DMA */ 801 static void atiixp_in_enable_transfer(struct atiixp *chip, int on) 802 { 803 if (on) { 804 unsigned int data = atiixp_read(chip, CMD); 805 if (! (data & ATI_REG_CMD_RECEIVE_EN)) { 806 data |= ATI_REG_CMD_RECEIVE_EN; 807 #if 0 /* FIXME: this causes the endless loop */ 808 /* wait until slot 3/4 are finished */ 809 while ((atiixp_read(chip, COUNTER) & 810 ATI_REG_COUNTER_SLOT) != 5) 811 ; 812 #endif 813 atiixp_write(chip, CMD, data); 814 } 815 } else 816 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0); 817 } 818 819 /* flush FIFO of analog IN DMA */ 820 static void atiixp_in_flush_dma(struct atiixp *chip) 821 { 822 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH); 823 } 824 825 /* enable/disable SPDIF OUT DMA */ 826 static void atiixp_spdif_enable_dma(struct atiixp *chip, int on) 827 { 828 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN, 829 on ? ATI_REG_CMD_SPDF_DMA_EN : 0); 830 } 831 832 /* start/stop SPDIF OUT DMA */ 833 static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on) 834 { 835 unsigned int data; 836 data = atiixp_read(chip, CMD); 837 if (on) 838 data |= ATI_REG_CMD_SPDF_OUT_EN; 839 else 840 data &= ~ATI_REG_CMD_SPDF_OUT_EN; 841 atiixp_write(chip, CMD, data); 842 } 843 844 /* flush FIFO of SPDIF OUT DMA */ 845 static void atiixp_spdif_flush_dma(struct atiixp *chip) 846 { 847 int timeout; 848 849 /* DMA off, transfer on */ 850 atiixp_spdif_enable_dma(chip, 0); 851 atiixp_spdif_enable_transfer(chip, 1); 852 853 timeout = 100; 854 do { 855 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED)) 856 break; 857 udelay(1); 858 } while (timeout-- > 0); 859 860 atiixp_spdif_enable_transfer(chip, 0); 861 } 862 863 /* set up slots and formats for SPDIF OUT */ 864 static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream) 865 { 866 struct atiixp *chip = snd_pcm_substream_chip(substream); 867 868 spin_lock_irq(&chip->reg_lock); 869 if (chip->spdif_over_aclink) { 870 unsigned int data; 871 /* enable slots 10/11 */ 872 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 873 ATI_REG_CMD_SPDF_CONFIG_01); 874 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK; 875 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) | 876 ATI_REG_OUT_DMA_SLOT_BIT(11); 877 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; 878 atiixp_write(chip, OUT_DMA_SLOT, data); 879 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT, 880 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 881 ATI_REG_CMD_INTERLEAVE_OUT : 0); 882 } else { 883 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0); 884 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0); 885 } 886 spin_unlock_irq(&chip->reg_lock); 887 return 0; 888 } 889 890 /* set up slots and formats for analog OUT */ 891 static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream) 892 { 893 struct atiixp *chip = snd_pcm_substream_chip(substream); 894 unsigned int data; 895 896 spin_lock_irq(&chip->reg_lock); 897 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK; 898 switch (substream->runtime->channels) { 899 case 8: 900 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) | 901 ATI_REG_OUT_DMA_SLOT_BIT(11); 902 /* fallthru */ 903 case 6: 904 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) | 905 ATI_REG_OUT_DMA_SLOT_BIT(8); 906 /* fallthru */ 907 case 4: 908 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) | 909 ATI_REG_OUT_DMA_SLOT_BIT(9); 910 /* fallthru */ 911 default: 912 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) | 913 ATI_REG_OUT_DMA_SLOT_BIT(4); 914 break; 915 } 916 917 /* set output threshold */ 918 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; 919 atiixp_write(chip, OUT_DMA_SLOT, data); 920 921 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT, 922 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 923 ATI_REG_CMD_INTERLEAVE_OUT : 0); 924 925 /* 926 * enable 6 channel re-ordering bit if needed 927 */ 928 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN, 929 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0); 930 931 spin_unlock_irq(&chip->reg_lock); 932 return 0; 933 } 934 935 /* set up slots and formats for analog IN */ 936 static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream) 937 { 938 struct atiixp *chip = snd_pcm_substream_chip(substream); 939 940 spin_lock_irq(&chip->reg_lock); 941 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN, 942 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ? 943 ATI_REG_CMD_INTERLEAVE_IN : 0); 944 spin_unlock_irq(&chip->reg_lock); 945 return 0; 946 } 947 948 /* 949 * hw_params - allocate the buffer and set up buffer descriptors 950 */ 951 static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream, 952 struct snd_pcm_hw_params *hw_params) 953 { 954 struct atiixp *chip = snd_pcm_substream_chip(substream); 955 struct atiixp_dma *dma = substream->runtime->private_data; 956 int err; 957 958 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 959 if (err < 0) 960 return err; 961 dma->buf_addr = substream->runtime->dma_addr; 962 dma->buf_bytes = params_buffer_bytes(hw_params); 963 964 err = atiixp_build_dma_packets(chip, dma, substream, 965 params_periods(hw_params), 966 params_period_bytes(hw_params)); 967 if (err < 0) 968 return err; 969 970 if (dma->ac97_pcm_type >= 0) { 971 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type]; 972 /* PCM is bound to AC97 codec(s) 973 * set up the AC97 codecs 974 */ 975 if (dma->pcm_open_flag) { 976 snd_ac97_pcm_close(pcm); 977 dma->pcm_open_flag = 0; 978 } 979 err = snd_ac97_pcm_open(pcm, params_rate(hw_params), 980 params_channels(hw_params), 981 pcm->r[0].slots); 982 if (err >= 0) 983 dma->pcm_open_flag = 1; 984 } 985 986 return err; 987 } 988 989 static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream) 990 { 991 struct atiixp *chip = snd_pcm_substream_chip(substream); 992 struct atiixp_dma *dma = substream->runtime->private_data; 993 994 if (dma->pcm_open_flag) { 995 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type]; 996 snd_ac97_pcm_close(pcm); 997 dma->pcm_open_flag = 0; 998 } 999 atiixp_clear_dma_packets(chip, dma, substream); 1000 snd_pcm_lib_free_pages(substream); 1001 return 0; 1002 } 1003 1004 1005 /* 1006 * pcm hardware definition, identical for all DMA types 1007 */ 1008 static struct snd_pcm_hardware snd_atiixp_pcm_hw = 1009 { 1010 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1011 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1012 SNDRV_PCM_INFO_PAUSE | 1013 SNDRV_PCM_INFO_RESUME | 1014 SNDRV_PCM_INFO_MMAP_VALID), 1015 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 1016 .rates = SNDRV_PCM_RATE_48000, 1017 .rate_min = 48000, 1018 .rate_max = 48000, 1019 .channels_min = 2, 1020 .channels_max = 2, 1021 .buffer_bytes_max = 256 * 1024, 1022 .period_bytes_min = 32, 1023 .period_bytes_max = 128 * 1024, 1024 .periods_min = 2, 1025 .periods_max = ATI_MAX_DESCRIPTORS, 1026 }; 1027 1028 static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream, 1029 struct atiixp_dma *dma, int pcm_type) 1030 { 1031 struct atiixp *chip = snd_pcm_substream_chip(substream); 1032 struct snd_pcm_runtime *runtime = substream->runtime; 1033 int err; 1034 1035 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL); 1036 1037 if (dma->opened) 1038 return -EBUSY; 1039 dma->substream = substream; 1040 runtime->hw = snd_atiixp_pcm_hw; 1041 dma->ac97_pcm_type = pcm_type; 1042 if (pcm_type >= 0) { 1043 runtime->hw.rates = chip->pcms[pcm_type]->rates; 1044 snd_pcm_limit_hw_rates(runtime); 1045 } else { 1046 /* direct SPDIF */ 1047 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE; 1048 } 1049 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 1050 return err; 1051 runtime->private_data = dma; 1052 1053 /* enable DMA bits */ 1054 spin_lock_irq(&chip->reg_lock); 1055 dma->ops->enable_dma(chip, 1); 1056 spin_unlock_irq(&chip->reg_lock); 1057 dma->opened = 1; 1058 1059 return 0; 1060 } 1061 1062 static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream, 1063 struct atiixp_dma *dma) 1064 { 1065 struct atiixp *chip = snd_pcm_substream_chip(substream); 1066 /* disable DMA bits */ 1067 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL); 1068 spin_lock_irq(&chip->reg_lock); 1069 dma->ops->enable_dma(chip, 0); 1070 spin_unlock_irq(&chip->reg_lock); 1071 dma->substream = NULL; 1072 dma->opened = 0; 1073 return 0; 1074 } 1075 1076 /* 1077 */ 1078 static int snd_atiixp_playback_open(struct snd_pcm_substream *substream) 1079 { 1080 struct atiixp *chip = snd_pcm_substream_chip(substream); 1081 int err; 1082 1083 mutex_lock(&chip->open_mutex); 1084 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0); 1085 mutex_unlock(&chip->open_mutex); 1086 if (err < 0) 1087 return err; 1088 substream->runtime->hw.channels_max = chip->max_channels; 1089 if (chip->max_channels > 2) 1090 /* channels must be even */ 1091 snd_pcm_hw_constraint_step(substream->runtime, 0, 1092 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1093 return 0; 1094 } 1095 1096 static int snd_atiixp_playback_close(struct snd_pcm_substream *substream) 1097 { 1098 struct atiixp *chip = snd_pcm_substream_chip(substream); 1099 int err; 1100 mutex_lock(&chip->open_mutex); 1101 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); 1102 mutex_unlock(&chip->open_mutex); 1103 return err; 1104 } 1105 1106 static int snd_atiixp_capture_open(struct snd_pcm_substream *substream) 1107 { 1108 struct atiixp *chip = snd_pcm_substream_chip(substream); 1109 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1); 1110 } 1111 1112 static int snd_atiixp_capture_close(struct snd_pcm_substream *substream) 1113 { 1114 struct atiixp *chip = snd_pcm_substream_chip(substream); 1115 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]); 1116 } 1117 1118 static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream) 1119 { 1120 struct atiixp *chip = snd_pcm_substream_chip(substream); 1121 int err; 1122 mutex_lock(&chip->open_mutex); 1123 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */ 1124 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2); 1125 else 1126 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1); 1127 mutex_unlock(&chip->open_mutex); 1128 return err; 1129 } 1130 1131 static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream) 1132 { 1133 struct atiixp *chip = snd_pcm_substream_chip(substream); 1134 int err; 1135 mutex_lock(&chip->open_mutex); 1136 if (chip->spdif_over_aclink) 1137 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); 1138 else 1139 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]); 1140 mutex_unlock(&chip->open_mutex); 1141 return err; 1142 } 1143 1144 /* AC97 playback */ 1145 static struct snd_pcm_ops snd_atiixp_playback_ops = { 1146 .open = snd_atiixp_playback_open, 1147 .close = snd_atiixp_playback_close, 1148 .ioctl = snd_pcm_lib_ioctl, 1149 .hw_params = snd_atiixp_pcm_hw_params, 1150 .hw_free = snd_atiixp_pcm_hw_free, 1151 .prepare = snd_atiixp_playback_prepare, 1152 .trigger = snd_atiixp_pcm_trigger, 1153 .pointer = snd_atiixp_pcm_pointer, 1154 }; 1155 1156 /* AC97 capture */ 1157 static struct snd_pcm_ops snd_atiixp_capture_ops = { 1158 .open = snd_atiixp_capture_open, 1159 .close = snd_atiixp_capture_close, 1160 .ioctl = snd_pcm_lib_ioctl, 1161 .hw_params = snd_atiixp_pcm_hw_params, 1162 .hw_free = snd_atiixp_pcm_hw_free, 1163 .prepare = snd_atiixp_capture_prepare, 1164 .trigger = snd_atiixp_pcm_trigger, 1165 .pointer = snd_atiixp_pcm_pointer, 1166 }; 1167 1168 /* SPDIF playback */ 1169 static struct snd_pcm_ops snd_atiixp_spdif_ops = { 1170 .open = snd_atiixp_spdif_open, 1171 .close = snd_atiixp_spdif_close, 1172 .ioctl = snd_pcm_lib_ioctl, 1173 .hw_params = snd_atiixp_pcm_hw_params, 1174 .hw_free = snd_atiixp_pcm_hw_free, 1175 .prepare = snd_atiixp_spdif_prepare, 1176 .trigger = snd_atiixp_pcm_trigger, 1177 .pointer = snd_atiixp_pcm_pointer, 1178 }; 1179 1180 static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = { 1181 /* front PCM */ 1182 { 1183 .exclusive = 1, 1184 .r = { { 1185 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1186 (1 << AC97_SLOT_PCM_RIGHT) | 1187 (1 << AC97_SLOT_PCM_CENTER) | 1188 (1 << AC97_SLOT_PCM_SLEFT) | 1189 (1 << AC97_SLOT_PCM_SRIGHT) | 1190 (1 << AC97_SLOT_LFE) 1191 } 1192 } 1193 }, 1194 /* PCM IN #1 */ 1195 { 1196 .stream = 1, 1197 .exclusive = 1, 1198 .r = { { 1199 .slots = (1 << AC97_SLOT_PCM_LEFT) | 1200 (1 << AC97_SLOT_PCM_RIGHT) 1201 } 1202 } 1203 }, 1204 /* S/PDIF OUT (optional) */ 1205 { 1206 .exclusive = 1, 1207 .spdif = 1, 1208 .r = { { 1209 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) | 1210 (1 << AC97_SLOT_SPDIF_RIGHT2) 1211 } 1212 } 1213 }, 1214 }; 1215 1216 static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { 1217 .type = ATI_DMA_PLAYBACK, 1218 .llp_offset = ATI_REG_OUT_DMA_LINKPTR, 1219 .dt_cur = ATI_REG_OUT_DMA_DT_CUR, 1220 .enable_dma = atiixp_out_enable_dma, 1221 .enable_transfer = atiixp_out_enable_transfer, 1222 .flush_dma = atiixp_out_flush_dma, 1223 }; 1224 1225 static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { 1226 .type = ATI_DMA_CAPTURE, 1227 .llp_offset = ATI_REG_IN_DMA_LINKPTR, 1228 .dt_cur = ATI_REG_IN_DMA_DT_CUR, 1229 .enable_dma = atiixp_in_enable_dma, 1230 .enable_transfer = atiixp_in_enable_transfer, 1231 .flush_dma = atiixp_in_flush_dma, 1232 }; 1233 1234 static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = { 1235 .type = ATI_DMA_SPDIF, 1236 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR, 1237 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR, 1238 .enable_dma = atiixp_spdif_enable_dma, 1239 .enable_transfer = atiixp_spdif_enable_transfer, 1240 .flush_dma = atiixp_spdif_flush_dma, 1241 }; 1242 1243 1244 static int __devinit snd_atiixp_pcm_new(struct atiixp *chip) 1245 { 1246 struct snd_pcm *pcm; 1247 struct snd_ac97_bus *pbus = chip->ac97_bus; 1248 int err, i, num_pcms; 1249 1250 /* initialize constants */ 1251 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops; 1252 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops; 1253 if (! chip->spdif_over_aclink) 1254 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops; 1255 1256 /* assign AC97 pcm */ 1257 if (chip->spdif_over_aclink) 1258 num_pcms = 3; 1259 else 1260 num_pcms = 2; 1261 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs); 1262 if (err < 0) 1263 return err; 1264 for (i = 0; i < num_pcms; i++) 1265 chip->pcms[i] = &pbus->pcms[i]; 1266 1267 chip->max_channels = 2; 1268 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) { 1269 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE)) 1270 chip->max_channels = 6; 1271 else 1272 chip->max_channels = 4; 1273 } 1274 1275 /* PCM #0: analog I/O */ 1276 err = snd_pcm_new(chip->card, "ATI IXP AC97", 1277 ATI_PCMDEV_ANALOG, 1, 1, &pcm); 1278 if (err < 0) 1279 return err; 1280 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops); 1281 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops); 1282 pcm->private_data = chip; 1283 strcpy(pcm->name, "ATI IXP AC97"); 1284 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm; 1285 1286 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1287 snd_dma_pci_data(chip->pci), 1288 64*1024, 128*1024); 1289 1290 /* no SPDIF support on codec? */ 1291 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates) 1292 return 0; 1293 1294 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */ 1295 if (chip->pcms[ATI_PCM_SPDIF]) 1296 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000; 1297 1298 /* PCM #1: spdif playback */ 1299 err = snd_pcm_new(chip->card, "ATI IXP IEC958", 1300 ATI_PCMDEV_DIGITAL, 1, 0, &pcm); 1301 if (err < 0) 1302 return err; 1303 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops); 1304 pcm->private_data = chip; 1305 if (chip->spdif_over_aclink) 1306 strcpy(pcm->name, "ATI IXP IEC958 (AC97)"); 1307 else 1308 strcpy(pcm->name, "ATI IXP IEC958 (Direct)"); 1309 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm; 1310 1311 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1312 snd_dma_pci_data(chip->pci), 1313 64*1024, 128*1024); 1314 1315 /* pre-select AC97 SPDIF slots 10/11 */ 1316 for (i = 0; i < NUM_ATI_CODECS; i++) { 1317 if (chip->ac97[i]) 1318 snd_ac97_update_bits(chip->ac97[i], 1319 AC97_EXTENDED_STATUS, 1320 0x03 << 4, 0x03 << 4); 1321 } 1322 1323 return 0; 1324 } 1325 1326 1327 1328 /* 1329 * interrupt handler 1330 */ 1331 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id) 1332 { 1333 struct atiixp *chip = dev_id; 1334 unsigned int status; 1335 1336 status = atiixp_read(chip, ISR); 1337 1338 if (! status) 1339 return IRQ_NONE; 1340 1341 /* process audio DMA */ 1342 if (status & ATI_REG_ISR_OUT_XRUN) 1343 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); 1344 else if (status & ATI_REG_ISR_OUT_STATUS) 1345 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); 1346 if (status & ATI_REG_ISR_IN_XRUN) 1347 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); 1348 else if (status & ATI_REG_ISR_IN_STATUS) 1349 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); 1350 if (! chip->spdif_over_aclink) { 1351 if (status & ATI_REG_ISR_SPDF_XRUN) 1352 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]); 1353 else if (status & ATI_REG_ISR_SPDF_STATUS) 1354 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]); 1355 } 1356 1357 /* for codec detection */ 1358 if (status & CODEC_CHECK_BITS) { 1359 unsigned int detected; 1360 detected = status & CODEC_CHECK_BITS; 1361 spin_lock(&chip->reg_lock); 1362 chip->codec_not_ready_bits |= detected; 1363 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */ 1364 spin_unlock(&chip->reg_lock); 1365 } 1366 1367 /* ack */ 1368 atiixp_write(chip, ISR, status); 1369 1370 return IRQ_HANDLED; 1371 } 1372 1373 1374 /* 1375 * ac97 mixer section 1376 */ 1377 1378 static struct ac97_quirk ac97_quirks[] __devinitdata = { 1379 { 1380 .subvendor = 0x103c, 1381 .subdevice = 0x006b, 1382 .name = "HP Pavilion ZV5030US", 1383 .type = AC97_TUNE_MUTE_LED 1384 }, 1385 { 1386 .subvendor = 0x103c, 1387 .subdevice = 0x308b, 1388 .name = "HP nx6125", 1389 .type = AC97_TUNE_MUTE_LED 1390 }, 1391 { } /* terminator */ 1392 }; 1393 1394 static int __devinit snd_atiixp_mixer_new(struct atiixp *chip, int clock, 1395 const char *quirk_override) 1396 { 1397 struct snd_ac97_bus *pbus; 1398 struct snd_ac97_template ac97; 1399 int i, err; 1400 int codec_count; 1401 static struct snd_ac97_bus_ops ops = { 1402 .write = snd_atiixp_ac97_write, 1403 .read = snd_atiixp_ac97_read, 1404 }; 1405 static unsigned int codec_skip[NUM_ATI_CODECS] = { 1406 ATI_REG_ISR_CODEC0_NOT_READY, 1407 ATI_REG_ISR_CODEC1_NOT_READY, 1408 ATI_REG_ISR_CODEC2_NOT_READY, 1409 }; 1410 1411 if (snd_atiixp_codec_detect(chip) < 0) 1412 return -ENXIO; 1413 1414 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) 1415 return err; 1416 pbus->clock = clock; 1417 chip->ac97_bus = pbus; 1418 1419 codec_count = 0; 1420 for (i = 0; i < NUM_ATI_CODECS; i++) { 1421 if (chip->codec_not_ready_bits & codec_skip[i]) 1422 continue; 1423 memset(&ac97, 0, sizeof(ac97)); 1424 ac97.private_data = chip; 1425 ac97.pci = chip->pci; 1426 ac97.num = i; 1427 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE; 1428 if (! chip->spdif_over_aclink) 1429 ac97.scaps |= AC97_SCAP_NO_SPDIF; 1430 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { 1431 chip->ac97[i] = NULL; /* to be sure */ 1432 snd_printdd("atiixp: codec %d not available for audio\n", i); 1433 continue; 1434 } 1435 codec_count++; 1436 } 1437 1438 if (! codec_count) { 1439 snd_printk(KERN_ERR "atiixp: no codec available\n"); 1440 return -ENODEV; 1441 } 1442 1443 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override); 1444 1445 return 0; 1446 } 1447 1448 1449 #ifdef CONFIG_PM 1450 /* 1451 * power management 1452 */ 1453 static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state) 1454 { 1455 struct snd_card *card = pci_get_drvdata(pci); 1456 struct atiixp *chip = card->private_data; 1457 int i; 1458 1459 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1460 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1461 if (chip->pcmdevs[i]) { 1462 struct atiixp_dma *dma = &chip->dmas[i]; 1463 if (dma->substream && dma->running) 1464 dma->saved_curptr = readl(chip->remap_addr + 1465 dma->ops->dt_cur); 1466 snd_pcm_suspend_all(chip->pcmdevs[i]); 1467 } 1468 for (i = 0; i < NUM_ATI_CODECS; i++) 1469 snd_ac97_suspend(chip->ac97[i]); 1470 snd_atiixp_aclink_down(chip); 1471 snd_atiixp_chip_stop(chip); 1472 1473 pci_disable_device(pci); 1474 pci_save_state(pci); 1475 pci_set_power_state(pci, pci_choose_state(pci, state)); 1476 return 0; 1477 } 1478 1479 static int snd_atiixp_resume(struct pci_dev *pci) 1480 { 1481 struct snd_card *card = pci_get_drvdata(pci); 1482 struct atiixp *chip = card->private_data; 1483 int i; 1484 1485 pci_set_power_state(pci, PCI_D0); 1486 pci_restore_state(pci); 1487 if (pci_enable_device(pci) < 0) { 1488 printk(KERN_ERR "atiixp: pci_enable_device failed, " 1489 "disabling device\n"); 1490 snd_card_disconnect(card); 1491 return -EIO; 1492 } 1493 pci_set_master(pci); 1494 1495 snd_atiixp_aclink_reset(chip); 1496 snd_atiixp_chip_start(chip); 1497 1498 for (i = 0; i < NUM_ATI_CODECS; i++) 1499 snd_ac97_resume(chip->ac97[i]); 1500 1501 for (i = 0; i < NUM_ATI_PCMDEVS; i++) 1502 if (chip->pcmdevs[i]) { 1503 struct atiixp_dma *dma = &chip->dmas[i]; 1504 if (dma->substream && dma->suspended) { 1505 dma->ops->enable_dma(chip, 1); 1506 dma->substream->ops->prepare(dma->substream); 1507 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, 1508 chip->remap_addr + dma->ops->llp_offset); 1509 writel(dma->saved_curptr, chip->remap_addr + 1510 dma->ops->dt_cur); 1511 } 1512 } 1513 1514 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1515 return 0; 1516 } 1517 #endif /* CONFIG_PM */ 1518 1519 1520 #ifdef CONFIG_PROC_FS 1521 /* 1522 * proc interface for register dump 1523 */ 1524 1525 static void snd_atiixp_proc_read(struct snd_info_entry *entry, 1526 struct snd_info_buffer *buffer) 1527 { 1528 struct atiixp *chip = entry->private_data; 1529 int i; 1530 1531 for (i = 0; i < 256; i += 4) 1532 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i)); 1533 } 1534 1535 static void __devinit snd_atiixp_proc_init(struct atiixp *chip) 1536 { 1537 struct snd_info_entry *entry; 1538 1539 if (! snd_card_proc_new(chip->card, "atiixp", &entry)) 1540 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read); 1541 } 1542 #else /* !CONFIG_PROC_FS */ 1543 #define snd_atiixp_proc_init(chip) 1544 #endif 1545 1546 1547 /* 1548 * destructor 1549 */ 1550 1551 static int snd_atiixp_free(struct atiixp *chip) 1552 { 1553 if (chip->irq < 0) 1554 goto __hw_end; 1555 snd_atiixp_chip_stop(chip); 1556 1557 __hw_end: 1558 if (chip->irq >= 0) 1559 free_irq(chip->irq, chip); 1560 if (chip->remap_addr) 1561 iounmap(chip->remap_addr); 1562 pci_release_regions(chip->pci); 1563 pci_disable_device(chip->pci); 1564 kfree(chip); 1565 return 0; 1566 } 1567 1568 static int snd_atiixp_dev_free(struct snd_device *device) 1569 { 1570 struct atiixp *chip = device->device_data; 1571 return snd_atiixp_free(chip); 1572 } 1573 1574 /* 1575 * constructor for chip instance 1576 */ 1577 static int __devinit snd_atiixp_create(struct snd_card *card, 1578 struct pci_dev *pci, 1579 struct atiixp **r_chip) 1580 { 1581 static struct snd_device_ops ops = { 1582 .dev_free = snd_atiixp_dev_free, 1583 }; 1584 struct atiixp *chip; 1585 int err; 1586 1587 if ((err = pci_enable_device(pci)) < 0) 1588 return err; 1589 1590 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1591 if (chip == NULL) { 1592 pci_disable_device(pci); 1593 return -ENOMEM; 1594 } 1595 1596 spin_lock_init(&chip->reg_lock); 1597 mutex_init(&chip->open_mutex); 1598 chip->card = card; 1599 chip->pci = pci; 1600 chip->irq = -1; 1601 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) { 1602 pci_disable_device(pci); 1603 kfree(chip); 1604 return err; 1605 } 1606 chip->addr = pci_resource_start(pci, 0); 1607 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0)); 1608 if (chip->remap_addr == NULL) { 1609 snd_printk(KERN_ERR "AC'97 space ioremap problem\n"); 1610 snd_atiixp_free(chip); 1611 return -EIO; 1612 } 1613 1614 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED, 1615 card->shortname, chip)) { 1616 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 1617 snd_atiixp_free(chip); 1618 return -EBUSY; 1619 } 1620 chip->irq = pci->irq; 1621 pci_set_master(pci); 1622 synchronize_irq(chip->irq); 1623 1624 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1625 snd_atiixp_free(chip); 1626 return err; 1627 } 1628 1629 snd_card_set_dev(card, &pci->dev); 1630 1631 *r_chip = chip; 1632 return 0; 1633 } 1634 1635 1636 static int __devinit snd_atiixp_probe(struct pci_dev *pci, 1637 const struct pci_device_id *pci_id) 1638 { 1639 struct snd_card *card; 1640 struct atiixp *chip; 1641 int err; 1642 1643 card = snd_card_new(index, id, THIS_MODULE, 0); 1644 if (card == NULL) 1645 return -ENOMEM; 1646 1647 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA"); 1648 strcpy(card->shortname, "ATI IXP"); 1649 if ((err = snd_atiixp_create(card, pci, &chip)) < 0) 1650 goto __error; 1651 card->private_data = chip; 1652 1653 if ((err = snd_atiixp_aclink_reset(chip)) < 0) 1654 goto __error; 1655 1656 chip->spdif_over_aclink = spdif_aclink; 1657 1658 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0) 1659 goto __error; 1660 1661 if ((err = snd_atiixp_pcm_new(chip)) < 0) 1662 goto __error; 1663 1664 snd_atiixp_proc_init(chip); 1665 1666 snd_atiixp_chip_start(chip); 1667 1668 snprintf(card->longname, sizeof(card->longname), 1669 "%s rev %x with %s at %#lx, irq %i", card->shortname, 1670 pci->revision, 1671 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?", 1672 chip->addr, chip->irq); 1673 1674 if ((err = snd_card_register(card)) < 0) 1675 goto __error; 1676 1677 pci_set_drvdata(pci, card); 1678 return 0; 1679 1680 __error: 1681 snd_card_free(card); 1682 return err; 1683 } 1684 1685 static void __devexit snd_atiixp_remove(struct pci_dev *pci) 1686 { 1687 snd_card_free(pci_get_drvdata(pci)); 1688 pci_set_drvdata(pci, NULL); 1689 } 1690 1691 static struct pci_driver driver = { 1692 .name = "ATI IXP AC97 controller", 1693 .id_table = snd_atiixp_ids, 1694 .probe = snd_atiixp_probe, 1695 .remove = __devexit_p(snd_atiixp_remove), 1696 #ifdef CONFIG_PM 1697 .suspend = snd_atiixp_suspend, 1698 .resume = snd_atiixp_resume, 1699 #endif 1700 }; 1701 1702 1703 static int __init alsa_card_atiixp_init(void) 1704 { 1705 return pci_register_driver(&driver); 1706 } 1707 1708 static void __exit alsa_card_atiixp_exit(void) 1709 { 1710 pci_unregister_driver(&driver); 1711 } 1712 1713 module_init(alsa_card_atiixp_init) 1714 module_exit(alsa_card_atiixp_exit) 1715