1 /* 2 * card-als4000.c - driver for Avance Logic ALS4000 based soundcards. 3 * Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>, 4 * Jaroslav Kysela <perex@perex.cz> 5 * Copyright (C) 2002, 2008 by Andreas Mohr <hw7oshyuv3001@sneakemail.com> 6 * 7 * Framework borrowed from Massimo Piccioni's card-als100.c. 8 * 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 * NOTES 25 * 26 * Since Avance does not provide any meaningful documentation, and I 27 * bought an ALS4000 based soundcard, I was forced to base this driver 28 * on reverse engineering. 29 * 30 * Note: this is no longer true (thank you!): 31 * pretty verbose chip docu (ALS4000a.PDF) can be found on the ALSA web site. 32 * Page numbers stated anywhere below with the "SPECS_PAGE:" tag 33 * refer to: ALS4000a.PDF specs Ver 1.0, May 28th, 1998. 34 * 35 * The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an 36 * ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport 37 * interface. These subsystems can be mapped into ISA io-port space, 38 * using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ 39 * services to the subsystems. 40 * 41 * While ALS4000 is very similar to a SoundBlaster, the differences in 42 * DMA and capturing require more changes to the SoundBlaster than 43 * desirable, so I made this separate driver. 44 * 45 * The ALS4000 can do real full duplex playback/capture. 46 * 47 * FMDAC: 48 * - 0x4f -> port 0x14 49 * - port 0x15 |= 1 50 * 51 * Enable/disable 3D sound: 52 * - 0x50 -> port 0x14 53 * - change bit 6 (0x40) of port 0x15 54 * 55 * Set QSound: 56 * - 0xdb -> port 0x14 57 * - set port 0x15: 58 * 0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0) 59 * 60 * Set KSound: 61 * - value -> some port 0x0c0d 62 * 63 * ToDo: 64 * - by default, don't enable legacy game and use PCI game I/O 65 * - power management? (card can do voice wakeup according to datasheet!!) 66 */ 67 68 #include <linux/io.h> 69 #include <linux/init.h> 70 #include <linux/pci.h> 71 #include <linux/gameport.h> 72 #include <linux/module.h> 73 #include <linux/dma-mapping.h> 74 #include <sound/core.h> 75 #include <sound/pcm.h> 76 #include <sound/rawmidi.h> 77 #include <sound/mpu401.h> 78 #include <sound/opl3.h> 79 #include <sound/sb.h> 80 #include <sound/initval.h> 81 82 MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr"); 83 MODULE_DESCRIPTION("Avance Logic ALS4000"); 84 MODULE_LICENSE("GPL"); 85 MODULE_SUPPORTED_DEVICE("{{Avance Logic,ALS4000}}"); 86 87 #if IS_REACHABLE(CONFIG_GAMEPORT) 88 #define SUPPORT_JOYSTICK 1 89 #endif 90 91 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 92 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 93 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 94 #ifdef SUPPORT_JOYSTICK 95 static int joystick_port[SNDRV_CARDS]; 96 #endif 97 98 module_param_array(index, int, NULL, 0444); 99 MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard."); 100 module_param_array(id, charp, NULL, 0444); 101 MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard."); 102 module_param_array(enable, bool, NULL, 0444); 103 MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard."); 104 #ifdef SUPPORT_JOYSTICK 105 module_param_hw_array(joystick_port, int, ioport, NULL, 0444); 106 MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)"); 107 #endif 108 109 struct snd_card_als4000 { 110 /* most frequent access first */ 111 unsigned long iobase; 112 struct pci_dev *pci; 113 struct snd_sb *chip; 114 #ifdef SUPPORT_JOYSTICK 115 struct gameport *gameport; 116 #endif 117 }; 118 119 static const struct pci_device_id snd_als4000_ids[] = { 120 { 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ALS4000 */ 121 { 0, } 122 }; 123 124 MODULE_DEVICE_TABLE(pci, snd_als4000_ids); 125 126 enum als4k_iobase_t { 127 /* IOx: B == Byte, W = Word, D = DWord; SPECS_PAGE: 37 */ 128 ALS4K_IOD_00_AC97_ACCESS = 0x00, 129 ALS4K_IOW_04_AC97_READ = 0x04, 130 ALS4K_IOB_06_AC97_STATUS = 0x06, 131 ALS4K_IOB_07_IRQSTATUS = 0x07, 132 ALS4K_IOD_08_GCR_DATA = 0x08, 133 ALS4K_IOB_0C_GCR_INDEX = 0x0c, 134 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e, 135 ALS4K_IOB_10_ADLIB_ADDR0 = 0x10, 136 ALS4K_IOB_11_ADLIB_ADDR1 = 0x11, 137 ALS4K_IOB_12_ADLIB_ADDR2 = 0x12, 138 ALS4K_IOB_13_ADLIB_ADDR3 = 0x13, 139 ALS4K_IOB_14_MIXER_INDEX = 0x14, 140 ALS4K_IOB_15_MIXER_DATA = 0x15, 141 ALS4K_IOB_16_ESP_RESET = 0x16, 142 ALS4K_IOB_16_ACK_FOR_CR1E = 0x16, /* 2nd function */ 143 ALS4K_IOB_18_OPL_ADDR0 = 0x18, 144 ALS4K_IOB_19_OPL_ADDR1 = 0x19, 145 ALS4K_IOB_1A_ESP_RD_DATA = 0x1a, 146 ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c, 147 ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c, /* 2nd function */ 148 ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e, 149 ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f, 150 ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20, 151 ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21, 152 ALS4K_IOB_30_MIDI_DATA = 0x30, 153 ALS4K_IOB_31_MIDI_STATUS = 0x31, 154 ALS4K_IOB_31_MIDI_COMMAND = 0x31, /* 2nd function */ 155 }; 156 157 enum als4k_iobase_0e_t { 158 ALS4K_IOB_0E_MPU_IRQ = 0x10, 159 ALS4K_IOB_0E_CR1E_IRQ = 0x40, 160 ALS4K_IOB_0E_SB_DMA_IRQ = 0x80, 161 }; 162 163 enum als4k_gcr_t { /* all registers 32bit wide; SPECS_PAGE: 38 to 42 */ 164 ALS4K_GCR8C_MISC_CTRL = 0x8c, 165 ALS4K_GCR90_TEST_MODE_REG = 0x90, 166 ALS4K_GCR91_DMA0_ADDR = 0x91, 167 ALS4K_GCR92_DMA0_MODE_COUNT = 0x92, 168 ALS4K_GCR93_DMA1_ADDR = 0x93, 169 ALS4K_GCR94_DMA1_MODE_COUNT = 0x94, 170 ALS4K_GCR95_DMA3_ADDR = 0x95, 171 ALS4K_GCR96_DMA3_MODE_COUNT = 0x96, 172 ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99, 173 ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0, 174 ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1, 175 ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2, 176 ALS4K_GCRA3_FIFO2_COUNT = 0xa3, 177 ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4, 178 ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5, 179 ALS4K_GCRA6_PM_CTRL = 0xa6, 180 ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7, 181 ALS4K_GCRA8_LEGACY_CFG1 = 0xa8, 182 ALS4K_GCRA9_LEGACY_CFG2 = 0xa9, 183 ALS4K_GCRFF_DUMMY_SCRATCH = 0xff, 184 }; 185 186 enum als4k_gcr8c_t { 187 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000, 188 ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000 189 }; 190 191 static inline void snd_als4k_iobase_writeb(unsigned long iobase, 192 enum als4k_iobase_t reg, 193 u8 val) 194 { 195 outb(val, iobase + reg); 196 } 197 198 static inline void snd_als4k_iobase_writel(unsigned long iobase, 199 enum als4k_iobase_t reg, 200 u32 val) 201 { 202 outl(val, iobase + reg); 203 } 204 205 static inline u8 snd_als4k_iobase_readb(unsigned long iobase, 206 enum als4k_iobase_t reg) 207 { 208 return inb(iobase + reg); 209 } 210 211 static inline u32 snd_als4k_iobase_readl(unsigned long iobase, 212 enum als4k_iobase_t reg) 213 { 214 return inl(iobase + reg); 215 } 216 217 static inline void snd_als4k_gcr_write_addr(unsigned long iobase, 218 enum als4k_gcr_t reg, 219 u32 val) 220 { 221 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg); 222 snd_als4k_iobase_writel(iobase, ALS4K_IOD_08_GCR_DATA, val); 223 } 224 225 static inline void snd_als4k_gcr_write(struct snd_sb *sb, 226 enum als4k_gcr_t reg, 227 u32 val) 228 { 229 snd_als4k_gcr_write_addr(sb->alt_port, reg, val); 230 } 231 232 static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase, 233 enum als4k_gcr_t reg) 234 { 235 /* SPECS_PAGE: 37/38 */ 236 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg); 237 return snd_als4k_iobase_readl(iobase, ALS4K_IOD_08_GCR_DATA); 238 } 239 240 static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg) 241 { 242 return snd_als4k_gcr_read_addr(sb->alt_port, reg); 243 } 244 245 enum als4k_cr_t { /* all registers 8bit wide; SPECS_PAGE: 20 to 23 */ 246 ALS4K_CR0_SB_CONFIG = 0x00, 247 ALS4K_CR2_MISC_CONTROL = 0x02, 248 ALS4K_CR3_CONFIGURATION = 0x03, 249 ALS4K_CR17_FIFO_STATUS = 0x17, 250 ALS4K_CR18_ESP_MAJOR_VERSION = 0x18, 251 ALS4K_CR19_ESP_MINOR_VERSION = 0x19, 252 ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a, 253 ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c, 254 ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d, 255 ALS4K_CR1E_FIFO2_CONTROL = 0x1e, /* secondary PCM FIFO (recording) */ 256 ALS4K_CR3A_MISC_CONTROL = 0x3a, 257 ALS4K_CR3B_CRC32_BYTE0 = 0x3b, /* for testing, activate via CR3A */ 258 ALS4K_CR3C_CRC32_BYTE1 = 0x3c, 259 ALS4K_CR3D_CRC32_BYTE2 = 0x3d, 260 ALS4K_CR3E_CRC32_BYTE3 = 0x3e, 261 }; 262 263 enum als4k_cr0_t { 264 ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02, /* IRQ/FIFO controlled for 0/1 */ 265 ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04, /* IRQ/FIFO controlled for 0/1 */ 266 ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80, 267 }; 268 269 static inline void snd_als4_cr_write(struct snd_sb *chip, 270 enum als4k_cr_t reg, 271 u8 data) 272 { 273 /* Control Register is reg | 0xc0 (bit 7, 6 set) on sbmixer_index 274 * NOTE: assumes chip->mixer_lock to be locked externally already! 275 * SPECS_PAGE: 6 */ 276 snd_sbmixer_write(chip, reg | 0xc0, data); 277 } 278 279 static inline u8 snd_als4_cr_read(struct snd_sb *chip, 280 enum als4k_cr_t reg) 281 { 282 /* NOTE: assumes chip->mixer_lock to be locked externally already! */ 283 return snd_sbmixer_read(chip, reg | 0xc0); 284 } 285 286 287 288 static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate) 289 { 290 if (!(chip->mode & SB_RATE_LOCK)) { 291 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT); 292 snd_sbdsp_command(chip, rate>>8); 293 snd_sbdsp_command(chip, rate); 294 } 295 } 296 297 static inline void snd_als4000_set_capture_dma(struct snd_sb *chip, 298 dma_addr_t addr, unsigned size) 299 { 300 /* SPECS_PAGE: 40 */ 301 snd_als4k_gcr_write(chip, ALS4K_GCRA2_FIFO2_PCIADDR, addr); 302 snd_als4k_gcr_write(chip, ALS4K_GCRA3_FIFO2_COUNT, (size-1)); 303 } 304 305 static inline void snd_als4000_set_playback_dma(struct snd_sb *chip, 306 dma_addr_t addr, 307 unsigned size) 308 { 309 /* SPECS_PAGE: 38 */ 310 snd_als4k_gcr_write(chip, ALS4K_GCR91_DMA0_ADDR, addr); 311 snd_als4k_gcr_write(chip, ALS4K_GCR92_DMA0_MODE_COUNT, 312 (size-1)|0x180000); 313 } 314 315 #define ALS4000_FORMAT_SIGNED (1<<0) 316 #define ALS4000_FORMAT_16BIT (1<<1) 317 #define ALS4000_FORMAT_STEREO (1<<2) 318 319 static int snd_als4000_get_format(struct snd_pcm_runtime *runtime) 320 { 321 int result; 322 323 result = 0; 324 if (snd_pcm_format_signed(runtime->format)) 325 result |= ALS4000_FORMAT_SIGNED; 326 if (snd_pcm_format_physical_width(runtime->format) == 16) 327 result |= ALS4000_FORMAT_16BIT; 328 if (runtime->channels > 1) 329 result |= ALS4000_FORMAT_STEREO; 330 return result; 331 } 332 333 /* structure for setting up playback */ 334 static const struct { 335 unsigned char dsp_cmd, dma_on, dma_off, format; 336 } playback_cmd_vals[]={ 337 /* ALS4000_FORMAT_U8_MONO */ 338 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO }, 339 /* ALS4000_FORMAT_S8_MONO */ 340 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO }, 341 /* ALS4000_FORMAT_U16L_MONO */ 342 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO }, 343 /* ALS4000_FORMAT_S16L_MONO */ 344 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO }, 345 /* ALS4000_FORMAT_U8_STEREO */ 346 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO }, 347 /* ALS4000_FORMAT_S8_STEREO */ 348 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO }, 349 /* ALS4000_FORMAT_U16L_STEREO */ 350 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO }, 351 /* ALS4000_FORMAT_S16L_STEREO */ 352 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO }, 353 }; 354 #define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format]) 355 356 /* structure for setting up capture */ 357 enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 }; 358 static const unsigned char capture_cmd_vals[]= 359 { 360 CMD_WIDTH8|CMD_MONO, /* ALS4000_FORMAT_U8_MONO */ 361 CMD_WIDTH8|CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S8_MONO */ 362 CMD_MONO, /* ALS4000_FORMAT_U16L_MONO */ 363 CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S16L_MONO */ 364 CMD_WIDTH8|CMD_STEREO, /* ALS4000_FORMAT_U8_STEREO */ 365 CMD_WIDTH8|CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S8_STEREO */ 366 CMD_STEREO, /* ALS4000_FORMAT_U16L_STEREO */ 367 CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S16L_STEREO */ 368 }; 369 #define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format]) 370 371 static int snd_als4000_hw_params(struct snd_pcm_substream *substream, 372 struct snd_pcm_hw_params *hw_params) 373 { 374 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 375 } 376 377 static int snd_als4000_hw_free(struct snd_pcm_substream *substream) 378 { 379 snd_pcm_lib_free_pages(substream); 380 return 0; 381 } 382 383 static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream) 384 { 385 struct snd_sb *chip = snd_pcm_substream_chip(substream); 386 struct snd_pcm_runtime *runtime = substream->runtime; 387 unsigned long size; 388 unsigned count; 389 390 chip->capture_format = snd_als4000_get_format(runtime); 391 392 size = snd_pcm_lib_buffer_bytes(substream); 393 count = snd_pcm_lib_period_bytes(substream); 394 395 if (chip->capture_format & ALS4000_FORMAT_16BIT) 396 count >>= 1; 397 count--; 398 399 spin_lock_irq(&chip->reg_lock); 400 snd_als4000_set_rate(chip, runtime->rate); 401 snd_als4000_set_capture_dma(chip, runtime->dma_addr, size); 402 spin_unlock_irq(&chip->reg_lock); 403 spin_lock_irq(&chip->mixer_lock); 404 snd_als4_cr_write(chip, ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, count & 0xff); 405 snd_als4_cr_write(chip, ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, count >> 8); 406 spin_unlock_irq(&chip->mixer_lock); 407 return 0; 408 } 409 410 static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream) 411 { 412 struct snd_sb *chip = snd_pcm_substream_chip(substream); 413 struct snd_pcm_runtime *runtime = substream->runtime; 414 unsigned long size; 415 unsigned count; 416 417 chip->playback_format = snd_als4000_get_format(runtime); 418 419 size = snd_pcm_lib_buffer_bytes(substream); 420 count = snd_pcm_lib_period_bytes(substream); 421 422 if (chip->playback_format & ALS4000_FORMAT_16BIT) 423 count >>= 1; 424 count--; 425 426 /* FIXME: from second playback on, there's a lot more clicks and pops 427 * involved here than on first playback. Fiddling with 428 * tons of different settings didn't help (DMA, speaker on/off, 429 * reordering, ...). Something seems to get enabled on playback 430 * that I haven't found out how to disable again, which then causes 431 * the switching pops to reach the speakers the next time here. */ 432 spin_lock_irq(&chip->reg_lock); 433 snd_als4000_set_rate(chip, runtime->rate); 434 snd_als4000_set_playback_dma(chip, runtime->dma_addr, size); 435 436 /* SPEAKER_ON not needed, since dma_on seems to also enable speaker */ 437 /* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */ 438 snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd); 439 snd_sbdsp_command(chip, playback_cmd(chip).format); 440 snd_sbdsp_command(chip, count & 0xff); 441 snd_sbdsp_command(chip, count >> 8); 442 snd_sbdsp_command(chip, playback_cmd(chip).dma_off); 443 spin_unlock_irq(&chip->reg_lock); 444 445 return 0; 446 } 447 448 static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd) 449 { 450 struct snd_sb *chip = snd_pcm_substream_chip(substream); 451 int result = 0; 452 453 /* FIXME race condition in here!!! 454 chip->mode non-atomic update gets consistently protected 455 by reg_lock always, _except_ for this place!! 456 Probably need to take reg_lock as outer (or inner??) lock, too. 457 (or serialize both lock operations? probably not, though... - racy?) 458 */ 459 spin_lock(&chip->mixer_lock); 460 switch (cmd) { 461 case SNDRV_PCM_TRIGGER_START: 462 case SNDRV_PCM_TRIGGER_RESUME: 463 chip->mode |= SB_RATE_LOCK_CAPTURE; 464 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL, 465 capture_cmd(chip)); 466 break; 467 case SNDRV_PCM_TRIGGER_STOP: 468 case SNDRV_PCM_TRIGGER_SUSPEND: 469 chip->mode &= ~SB_RATE_LOCK_CAPTURE; 470 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL, 471 capture_cmd(chip)); 472 break; 473 default: 474 result = -EINVAL; 475 break; 476 } 477 spin_unlock(&chip->mixer_lock); 478 return result; 479 } 480 481 static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd) 482 { 483 struct snd_sb *chip = snd_pcm_substream_chip(substream); 484 int result = 0; 485 486 spin_lock(&chip->reg_lock); 487 switch (cmd) { 488 case SNDRV_PCM_TRIGGER_START: 489 case SNDRV_PCM_TRIGGER_RESUME: 490 chip->mode |= SB_RATE_LOCK_PLAYBACK; 491 snd_sbdsp_command(chip, playback_cmd(chip).dma_on); 492 break; 493 case SNDRV_PCM_TRIGGER_STOP: 494 case SNDRV_PCM_TRIGGER_SUSPEND: 495 snd_sbdsp_command(chip, playback_cmd(chip).dma_off); 496 chip->mode &= ~SB_RATE_LOCK_PLAYBACK; 497 break; 498 default: 499 result = -EINVAL; 500 break; 501 } 502 spin_unlock(&chip->reg_lock); 503 return result; 504 } 505 506 static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream) 507 { 508 struct snd_sb *chip = snd_pcm_substream_chip(substream); 509 unsigned int result; 510 511 spin_lock(&chip->reg_lock); 512 result = snd_als4k_gcr_read(chip, ALS4K_GCRA4_FIFO2_CURRENT_ADDR); 513 spin_unlock(&chip->reg_lock); 514 result &= 0xffff; 515 return bytes_to_frames( substream->runtime, result ); 516 } 517 518 static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream) 519 { 520 struct snd_sb *chip = snd_pcm_substream_chip(substream); 521 unsigned result; 522 523 spin_lock(&chip->reg_lock); 524 result = snd_als4k_gcr_read(chip, ALS4K_GCRA0_FIFO1_CURRENT_ADDR); 525 spin_unlock(&chip->reg_lock); 526 result &= 0xffff; 527 return bytes_to_frames( substream->runtime, result ); 528 } 529 530 /* FIXME: this IRQ routine doesn't really support IRQ sharing (we always 531 * return IRQ_HANDLED no matter whether we actually had an IRQ flag or not). 532 * ALS4000a.PDF writes that while ACKing IRQ in PCI block will *not* ACK 533 * the IRQ in the SB core, ACKing IRQ in SB block *will* ACK the PCI IRQ 534 * register (alt_port + ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU). Probably something 535 * could be optimized here to query/write one register only... 536 * And even if both registers need to be queried, then there's still the 537 * question of whether it's actually correct to ACK PCI IRQ before reading 538 * SB IRQ like we do now, since ALS4000a.PDF mentions that PCI IRQ will *clear* 539 * SB IRQ status. 540 * (hmm, SPECS_PAGE: 38 mentions it the other way around!) 541 * And do we *really* need the lock here for *reading* SB_DSP4_IRQSTATUS?? 542 * */ 543 static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id) 544 { 545 struct snd_sb *chip = dev_id; 546 unsigned pci_irqstatus; 547 unsigned sb_irqstatus; 548 549 /* find out which bit of the ALS4000 PCI block produced the interrupt, 550 SPECS_PAGE: 38, 5 */ 551 pci_irqstatus = snd_als4k_iobase_readb(chip->alt_port, 552 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU); 553 if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ) 554 && (chip->playback_substream)) /* playback */ 555 snd_pcm_period_elapsed(chip->playback_substream); 556 if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ) 557 && (chip->capture_substream)) /* capturing */ 558 snd_pcm_period_elapsed(chip->capture_substream); 559 if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ) 560 && (chip->rmidi)) /* MPU401 interrupt */ 561 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); 562 /* ACK the PCI block IRQ */ 563 snd_als4k_iobase_writeb(chip->alt_port, 564 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, pci_irqstatus); 565 566 spin_lock(&chip->mixer_lock); 567 /* SPECS_PAGE: 20 */ 568 sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS); 569 spin_unlock(&chip->mixer_lock); 570 571 if (sb_irqstatus & SB_IRQTYPE_8BIT) 572 snd_sb_ack_8bit(chip); 573 if (sb_irqstatus & SB_IRQTYPE_16BIT) 574 snd_sb_ack_16bit(chip); 575 if (sb_irqstatus & SB_IRQTYPE_MPUIN) 576 inb(chip->mpu_port); 577 if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA) 578 snd_als4k_iobase_readb(chip->alt_port, 579 ALS4K_IOB_16_ACK_FOR_CR1E); 580 581 /* dev_dbg(chip->card->dev, "als4000: irq 0x%04x 0x%04x\n", 582 pci_irqstatus, sb_irqstatus); */ 583 584 /* only ack the things we actually handled above */ 585 return IRQ_RETVAL( 586 (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ| 587 ALS4K_IOB_0E_MPU_IRQ)) 588 || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT| 589 SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA)) 590 ); 591 } 592 593 /*****************************************************************/ 594 595 static const struct snd_pcm_hardware snd_als4000_playback = 596 { 597 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 598 SNDRV_PCM_INFO_MMAP_VALID), 599 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | 600 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */ 601 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 602 .rate_min = 4000, 603 .rate_max = 48000, 604 .channels_min = 1, 605 .channels_max = 2, 606 .buffer_bytes_max = 65536, 607 .period_bytes_min = 64, 608 .period_bytes_max = 65536, 609 .periods_min = 1, 610 .periods_max = 1024, 611 .fifo_size = 0 612 }; 613 614 static const struct snd_pcm_hardware snd_als4000_capture = 615 { 616 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 617 SNDRV_PCM_INFO_MMAP_VALID), 618 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | 619 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */ 620 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 621 .rate_min = 4000, 622 .rate_max = 48000, 623 .channels_min = 1, 624 .channels_max = 2, 625 .buffer_bytes_max = 65536, 626 .period_bytes_min = 64, 627 .period_bytes_max = 65536, 628 .periods_min = 1, 629 .periods_max = 1024, 630 .fifo_size = 0 631 }; 632 633 /*****************************************************************/ 634 635 static int snd_als4000_playback_open(struct snd_pcm_substream *substream) 636 { 637 struct snd_sb *chip = snd_pcm_substream_chip(substream); 638 struct snd_pcm_runtime *runtime = substream->runtime; 639 640 chip->playback_substream = substream; 641 runtime->hw = snd_als4000_playback; 642 return 0; 643 } 644 645 static int snd_als4000_playback_close(struct snd_pcm_substream *substream) 646 { 647 struct snd_sb *chip = snd_pcm_substream_chip(substream); 648 649 chip->playback_substream = NULL; 650 snd_pcm_lib_free_pages(substream); 651 return 0; 652 } 653 654 static int snd_als4000_capture_open(struct snd_pcm_substream *substream) 655 { 656 struct snd_sb *chip = snd_pcm_substream_chip(substream); 657 struct snd_pcm_runtime *runtime = substream->runtime; 658 659 chip->capture_substream = substream; 660 runtime->hw = snd_als4000_capture; 661 return 0; 662 } 663 664 static int snd_als4000_capture_close(struct snd_pcm_substream *substream) 665 { 666 struct snd_sb *chip = snd_pcm_substream_chip(substream); 667 668 chip->capture_substream = NULL; 669 snd_pcm_lib_free_pages(substream); 670 return 0; 671 } 672 673 /******************************************************************/ 674 675 static const struct snd_pcm_ops snd_als4000_playback_ops = { 676 .open = snd_als4000_playback_open, 677 .close = snd_als4000_playback_close, 678 .ioctl = snd_pcm_lib_ioctl, 679 .hw_params = snd_als4000_hw_params, 680 .hw_free = snd_als4000_hw_free, 681 .prepare = snd_als4000_playback_prepare, 682 .trigger = snd_als4000_playback_trigger, 683 .pointer = snd_als4000_playback_pointer 684 }; 685 686 static const struct snd_pcm_ops snd_als4000_capture_ops = { 687 .open = snd_als4000_capture_open, 688 .close = snd_als4000_capture_close, 689 .ioctl = snd_pcm_lib_ioctl, 690 .hw_params = snd_als4000_hw_params, 691 .hw_free = snd_als4000_hw_free, 692 .prepare = snd_als4000_capture_prepare, 693 .trigger = snd_als4000_capture_trigger, 694 .pointer = snd_als4000_capture_pointer 695 }; 696 697 static int snd_als4000_pcm(struct snd_sb *chip, int device) 698 { 699 struct snd_pcm *pcm; 700 int err; 701 702 err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm); 703 if (err < 0) 704 return err; 705 pcm->private_data = chip; 706 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 707 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops); 708 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops); 709 710 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 711 64*1024, 64*1024); 712 713 chip->pcm = pcm; 714 715 return 0; 716 } 717 718 /******************************************************************/ 719 720 static void snd_als4000_set_addr(unsigned long iobase, 721 unsigned int sb_io, 722 unsigned int mpu_io, 723 unsigned int opl_io, 724 unsigned int game_io) 725 { 726 u32 cfg1 = 0; 727 u32 cfg2 = 0; 728 729 if (mpu_io > 0) 730 cfg2 |= (mpu_io | 1) << 16; 731 if (sb_io > 0) 732 cfg2 |= (sb_io | 1); 733 if (game_io > 0) 734 cfg1 |= (game_io | 1) << 16; 735 if (opl_io > 0) 736 cfg1 |= (opl_io | 1); 737 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1); 738 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA9_LEGACY_CFG2, cfg2); 739 } 740 741 static void snd_als4000_configure(struct snd_sb *chip) 742 { 743 u8 tmp; 744 int i; 745 746 /* do some more configuration */ 747 spin_lock_irq(&chip->mixer_lock); 748 tmp = snd_als4_cr_read(chip, ALS4K_CR0_SB_CONFIG); 749 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG, 750 tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE); 751 /* always select DMA channel 0, since we do not actually use DMA 752 * SPECS_PAGE: 19/20 */ 753 snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0); 754 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG, 755 tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE); 756 spin_unlock_irq(&chip->mixer_lock); 757 758 spin_lock_irq(&chip->reg_lock); 759 /* enable interrupts */ 760 snd_als4k_gcr_write(chip, ALS4K_GCR8C_MISC_CTRL, 761 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE); 762 763 /* SPECS_PAGE: 39 */ 764 for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i) 765 snd_als4k_gcr_write(chip, i, 0); 766 /* enable burst mode to prevent dropouts during high PCI bus usage */ 767 snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL, 768 (snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04); 769 spin_unlock_irq(&chip->reg_lock); 770 } 771 772 #ifdef SUPPORT_JOYSTICK 773 static int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) 774 { 775 struct gameport *gp; 776 struct resource *r; 777 int io_port; 778 779 if (joystick_port[dev] == 0) 780 return -ENODEV; 781 782 if (joystick_port[dev] == 1) { /* auto-detect */ 783 for (io_port = 0x200; io_port <= 0x218; io_port += 8) { 784 r = request_region(io_port, 8, "ALS4000 gameport"); 785 if (r) 786 break; 787 } 788 } else { 789 io_port = joystick_port[dev]; 790 r = request_region(io_port, 8, "ALS4000 gameport"); 791 } 792 793 if (!r) { 794 dev_warn(&acard->pci->dev, "cannot reserve joystick ports\n"); 795 return -EBUSY; 796 } 797 798 acard->gameport = gp = gameport_allocate_port(); 799 if (!gp) { 800 dev_err(&acard->pci->dev, "cannot allocate memory for gameport\n"); 801 release_and_free_resource(r); 802 return -ENOMEM; 803 } 804 805 gameport_set_name(gp, "ALS4000 Gameport"); 806 gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci)); 807 gameport_set_dev_parent(gp, &acard->pci->dev); 808 gp->io = io_port; 809 gameport_set_port_data(gp, r); 810 811 /* Enable legacy joystick port */ 812 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1); 813 814 gameport_register_port(acard->gameport); 815 816 return 0; 817 } 818 819 static void snd_als4000_free_gameport(struct snd_card_als4000 *acard) 820 { 821 if (acard->gameport) { 822 struct resource *r = gameport_get_port_data(acard->gameport); 823 824 gameport_unregister_port(acard->gameport); 825 acard->gameport = NULL; 826 827 /* disable joystick */ 828 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0); 829 830 release_and_free_resource(r); 831 } 832 } 833 #else 834 static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; } 835 static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { } 836 #endif 837 838 static void snd_card_als4000_free( struct snd_card *card ) 839 { 840 struct snd_card_als4000 *acard = card->private_data; 841 842 /* make sure that interrupts are disabled */ 843 snd_als4k_gcr_write_addr(acard->iobase, ALS4K_GCR8C_MISC_CTRL, 0); 844 /* free resources */ 845 snd_als4000_free_gameport(acard); 846 pci_release_regions(acard->pci); 847 pci_disable_device(acard->pci); 848 } 849 850 static int snd_card_als4000_probe(struct pci_dev *pci, 851 const struct pci_device_id *pci_id) 852 { 853 static int dev; 854 struct snd_card *card; 855 struct snd_card_als4000 *acard; 856 unsigned long iobase; 857 struct snd_sb *chip; 858 struct snd_opl3 *opl3; 859 unsigned short word; 860 int err; 861 862 if (dev >= SNDRV_CARDS) 863 return -ENODEV; 864 if (!enable[dev]) { 865 dev++; 866 return -ENOENT; 867 } 868 869 /* enable PCI device */ 870 if ((err = pci_enable_device(pci)) < 0) { 871 return err; 872 } 873 /* check, if we can restrict PCI DMA transfers to 24 bits */ 874 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 || 875 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) { 876 dev_err(&pci->dev, "architecture does not support 24bit PCI busmaster DMA\n"); 877 pci_disable_device(pci); 878 return -ENXIO; 879 } 880 881 if ((err = pci_request_regions(pci, "ALS4000")) < 0) { 882 pci_disable_device(pci); 883 return err; 884 } 885 iobase = pci_resource_start(pci, 0); 886 887 pci_read_config_word(pci, PCI_COMMAND, &word); 888 pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO); 889 pci_set_master(pci); 890 891 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 892 sizeof(*acard) /* private_data: acard */, 893 &card); 894 if (err < 0) { 895 pci_release_regions(pci); 896 pci_disable_device(pci); 897 return err; 898 } 899 900 acard = card->private_data; 901 acard->pci = pci; 902 acard->iobase = iobase; 903 card->private_free = snd_card_als4000_free; 904 905 /* disable all legacy ISA stuff */ 906 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0); 907 908 if ((err = snd_sbdsp_create(card, 909 iobase + ALS4K_IOB_10_ADLIB_ADDR0, 910 pci->irq, 911 /* internally registered as IRQF_SHARED in case of ALS4000 SB */ 912 snd_als4000_interrupt, 913 -1, 914 -1, 915 SB_HW_ALS4000, 916 &chip)) < 0) { 917 goto out_err; 918 } 919 acard->chip = chip; 920 921 chip->pci = pci; 922 chip->alt_port = iobase; 923 924 snd_als4000_configure(chip); 925 926 strcpy(card->driver, "ALS4000"); 927 strcpy(card->shortname, "Avance Logic ALS4000"); 928 sprintf(card->longname, "%s at 0x%lx, irq %i", 929 card->shortname, chip->alt_port, chip->irq); 930 931 if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_ALS4000, 932 iobase + ALS4K_IOB_30_MIDI_DATA, 933 MPU401_INFO_INTEGRATED | 934 MPU401_INFO_IRQ_HOOK, 935 -1, &chip->rmidi)) < 0) { 936 dev_err(&pci->dev, "no MPU-401 device at 0x%lx?\n", 937 iobase + ALS4K_IOB_30_MIDI_DATA); 938 goto out_err; 939 } 940 /* FIXME: ALS4000 has interesting MPU401 configuration features 941 * at ALS4K_CR1A_MPU401_UART_MODE_CONTROL 942 * (pass-thru / UART switching, fast MIDI clock, etc.), 943 * however there doesn't seem to be an ALSA API for this... 944 * SPECS_PAGE: 21 */ 945 946 if ((err = snd_als4000_pcm(chip, 0)) < 0) { 947 goto out_err; 948 } 949 if ((err = snd_sbmixer_new(chip)) < 0) { 950 goto out_err; 951 } 952 953 if (snd_opl3_create(card, 954 iobase + ALS4K_IOB_10_ADLIB_ADDR0, 955 iobase + ALS4K_IOB_12_ADLIB_ADDR2, 956 OPL3_HW_AUTO, 1, &opl3) < 0) { 957 dev_err(&pci->dev, "no OPL device at 0x%lx-0x%lx?\n", 958 iobase + ALS4K_IOB_10_ADLIB_ADDR0, 959 iobase + ALS4K_IOB_12_ADLIB_ADDR2); 960 } else { 961 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { 962 goto out_err; 963 } 964 } 965 966 snd_als4000_create_gameport(acard, dev); 967 968 if ((err = snd_card_register(card)) < 0) { 969 goto out_err; 970 } 971 pci_set_drvdata(pci, card); 972 dev++; 973 err = 0; 974 goto out; 975 976 out_err: 977 snd_card_free(card); 978 979 out: 980 return err; 981 } 982 983 static void snd_card_als4000_remove(struct pci_dev *pci) 984 { 985 snd_card_free(pci_get_drvdata(pci)); 986 } 987 988 #ifdef CONFIG_PM_SLEEP 989 static int snd_als4000_suspend(struct device *dev) 990 { 991 struct snd_card *card = dev_get_drvdata(dev); 992 struct snd_card_als4000 *acard = card->private_data; 993 struct snd_sb *chip = acard->chip; 994 995 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 996 997 snd_sbmixer_suspend(chip); 998 return 0; 999 } 1000 1001 static int snd_als4000_resume(struct device *dev) 1002 { 1003 struct snd_card *card = dev_get_drvdata(dev); 1004 struct snd_card_als4000 *acard = card->private_data; 1005 struct snd_sb *chip = acard->chip; 1006 1007 snd_als4000_configure(chip); 1008 snd_sbdsp_reset(chip); 1009 snd_sbmixer_resume(chip); 1010 1011 #ifdef SUPPORT_JOYSTICK 1012 if (acard->gameport) 1013 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1); 1014 #endif 1015 1016 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1017 return 0; 1018 } 1019 1020 static SIMPLE_DEV_PM_OPS(snd_als4000_pm, snd_als4000_suspend, snd_als4000_resume); 1021 #define SND_ALS4000_PM_OPS &snd_als4000_pm 1022 #else 1023 #define SND_ALS4000_PM_OPS NULL 1024 #endif /* CONFIG_PM_SLEEP */ 1025 1026 static struct pci_driver als4000_driver = { 1027 .name = KBUILD_MODNAME, 1028 .id_table = snd_als4000_ids, 1029 .probe = snd_card_als4000_probe, 1030 .remove = snd_card_als4000_remove, 1031 .driver = { 1032 .pm = SND_ALS4000_PM_OPS, 1033 }, 1034 }; 1035 1036 module_pci_driver(als4000_driver); 1037