xref: /openbmc/linux/sound/pci/als4000.c (revision 9a4df825)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  card-als4000.c - driver for Avance Logic ALS4000 based soundcards.
4  *  Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>,
5  *			  Jaroslav Kysela <perex@perex.cz>
6  *  Copyright (C) 2002, 2008 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
7  *
8  *  Framework borrowed from Massimo Piccioni's card-als100.c.
9  *
10  * NOTES
11  *
12  *  Since Avance does not provide any meaningful documentation, and I
13  *  bought an ALS4000 based soundcard, I was forced to base this driver
14  *  on reverse engineering.
15  *
16  *  Note: this is no longer true (thank you!):
17  *  pretty verbose chip docu (ALS4000a.PDF) can be found on the ALSA web site.
18  *  Page numbers stated anywhere below with the "SPECS_PAGE:" tag
19  *  refer to: ALS4000a.PDF specs Ver 1.0, May 28th, 1998.
20  *
21  *  The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an
22  *  ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport
23  *  interface. These subsystems can be mapped into ISA io-port space,
24  *  using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ
25  *  services to the subsystems.
26  *
27  * While ALS4000 is very similar to a SoundBlaster, the differences in
28  * DMA and capturing require more changes to the SoundBlaster than
29  * desirable, so I made this separate driver.
30  *
31  * The ALS4000 can do real full duplex playback/capture.
32  *
33  * FMDAC:
34  * - 0x4f -> port 0x14
35  * - port 0x15 |= 1
36  *
37  * Enable/disable 3D sound:
38  * - 0x50 -> port 0x14
39  * - change bit 6 (0x40) of port 0x15
40  *
41  * Set QSound:
42  * - 0xdb -> port 0x14
43  * - set port 0x15:
44  *   0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0)
45  *
46  * Set KSound:
47  * - value -> some port 0x0c0d
48  *
49  * ToDo:
50  * - by default, don't enable legacy game and use PCI game I/O
51  * - power management? (card can do voice wakeup according to datasheet!!)
52  */
53 
54 #include <linux/io.h>
55 #include <linux/init.h>
56 #include <linux/pci.h>
57 #include <linux/gameport.h>
58 #include <linux/module.h>
59 #include <linux/dma-mapping.h>
60 #include <sound/core.h>
61 #include <sound/pcm.h>
62 #include <sound/rawmidi.h>
63 #include <sound/mpu401.h>
64 #include <sound/opl3.h>
65 #include <sound/sb.h>
66 #include <sound/initval.h>
67 
68 MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr");
69 MODULE_DESCRIPTION("Avance Logic ALS4000");
70 MODULE_LICENSE("GPL");
71 MODULE_SUPPORTED_DEVICE("{{Avance Logic,ALS4000}}");
72 
73 #if IS_REACHABLE(CONFIG_GAMEPORT)
74 #define SUPPORT_JOYSTICK 1
75 #endif
76 
77 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;	/* Index 0-MAX */
78 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
79 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;	/* Enable this card */
80 #ifdef SUPPORT_JOYSTICK
81 static int joystick_port[SNDRV_CARDS];
82 #endif
83 
84 module_param_array(index, int, NULL, 0444);
85 MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard.");
86 module_param_array(id, charp, NULL, 0444);
87 MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard.");
88 module_param_array(enable, bool, NULL, 0444);
89 MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard.");
90 #ifdef SUPPORT_JOYSTICK
91 module_param_hw_array(joystick_port, int, ioport, NULL, 0444);
92 MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)");
93 #endif
94 
95 struct snd_card_als4000 {
96 	/* most frequent access first */
97 	unsigned long iobase;
98 	struct pci_dev *pci;
99 	struct snd_sb *chip;
100 #ifdef SUPPORT_JOYSTICK
101 	struct gameport *gameport;
102 #endif
103 };
104 
105 static const struct pci_device_id snd_als4000_ids[] = {
106 	{ 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },   /* ALS4000 */
107 	{ 0, }
108 };
109 
110 MODULE_DEVICE_TABLE(pci, snd_als4000_ids);
111 
112 enum als4k_iobase_t {
113 	/* IOx: B == Byte, W = Word, D = DWord; SPECS_PAGE: 37 */
114 	ALS4K_IOD_00_AC97_ACCESS = 0x00,
115 	ALS4K_IOW_04_AC97_READ = 0x04,
116 	ALS4K_IOB_06_AC97_STATUS = 0x06,
117 	ALS4K_IOB_07_IRQSTATUS = 0x07,
118 	ALS4K_IOD_08_GCR_DATA = 0x08,
119 	ALS4K_IOB_0C_GCR_INDEX = 0x0c,
120 	ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e,
121 	ALS4K_IOB_10_ADLIB_ADDR0 = 0x10,
122 	ALS4K_IOB_11_ADLIB_ADDR1 = 0x11,
123 	ALS4K_IOB_12_ADLIB_ADDR2 = 0x12,
124 	ALS4K_IOB_13_ADLIB_ADDR3 = 0x13,
125 	ALS4K_IOB_14_MIXER_INDEX = 0x14,
126 	ALS4K_IOB_15_MIXER_DATA = 0x15,
127 	ALS4K_IOB_16_ESP_RESET = 0x16,
128 	ALS4K_IOB_16_ACK_FOR_CR1E = 0x16, /* 2nd function */
129 	ALS4K_IOB_18_OPL_ADDR0 = 0x18,
130 	ALS4K_IOB_19_OPL_ADDR1 = 0x19,
131 	ALS4K_IOB_1A_ESP_RD_DATA = 0x1a,
132 	ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c,
133 	ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c, /* 2nd function */
134 	ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e,
135 	ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f,
136 	ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20,
137 	ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21,
138 	ALS4K_IOB_30_MIDI_DATA = 0x30,
139 	ALS4K_IOB_31_MIDI_STATUS = 0x31,
140 	ALS4K_IOB_31_MIDI_COMMAND = 0x31, /* 2nd function */
141 };
142 
143 enum als4k_iobase_0e_t {
144 	ALS4K_IOB_0E_MPU_IRQ = 0x10,
145 	ALS4K_IOB_0E_CR1E_IRQ = 0x40,
146 	ALS4K_IOB_0E_SB_DMA_IRQ = 0x80,
147 };
148 
149 enum als4k_gcr_t { /* all registers 32bit wide; SPECS_PAGE: 38 to 42 */
150 	ALS4K_GCR8C_MISC_CTRL = 0x8c,
151 	ALS4K_GCR90_TEST_MODE_REG = 0x90,
152 	ALS4K_GCR91_DMA0_ADDR = 0x91,
153 	ALS4K_GCR92_DMA0_MODE_COUNT = 0x92,
154 	ALS4K_GCR93_DMA1_ADDR = 0x93,
155 	ALS4K_GCR94_DMA1_MODE_COUNT = 0x94,
156 	ALS4K_GCR95_DMA3_ADDR = 0x95,
157 	ALS4K_GCR96_DMA3_MODE_COUNT = 0x96,
158 	ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99,
159 	ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0,
160 	ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1,
161 	ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2,
162 	ALS4K_GCRA3_FIFO2_COUNT = 0xa3,
163 	ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4,
164 	ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5,
165 	ALS4K_GCRA6_PM_CTRL = 0xa6,
166 	ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7,
167 	ALS4K_GCRA8_LEGACY_CFG1 = 0xa8,
168 	ALS4K_GCRA9_LEGACY_CFG2 = 0xa9,
169 	ALS4K_GCRFF_DUMMY_SCRATCH = 0xff,
170 };
171 
172 enum als4k_gcr8c_t {
173 	ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000,
174 	ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000
175 };
176 
177 static inline void snd_als4k_iobase_writeb(unsigned long iobase,
178 						enum als4k_iobase_t reg,
179 						u8 val)
180 {
181 	outb(val, iobase + reg);
182 }
183 
184 static inline void snd_als4k_iobase_writel(unsigned long iobase,
185 						enum als4k_iobase_t reg,
186 						u32 val)
187 {
188 	outl(val, iobase + reg);
189 }
190 
191 static inline u8 snd_als4k_iobase_readb(unsigned long iobase,
192 						enum als4k_iobase_t reg)
193 {
194 	return inb(iobase + reg);
195 }
196 
197 static inline u32 snd_als4k_iobase_readl(unsigned long iobase,
198 						enum als4k_iobase_t reg)
199 {
200 	return inl(iobase + reg);
201 }
202 
203 static inline void snd_als4k_gcr_write_addr(unsigned long iobase,
204 						 enum als4k_gcr_t reg,
205 						 u32 val)
206 {
207 	snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
208 	snd_als4k_iobase_writel(iobase, ALS4K_IOD_08_GCR_DATA, val);
209 }
210 
211 static inline void snd_als4k_gcr_write(struct snd_sb *sb,
212 					 enum als4k_gcr_t reg,
213 					 u32 val)
214 {
215 	snd_als4k_gcr_write_addr(sb->alt_port, reg, val);
216 }
217 
218 static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase,
219 						 enum als4k_gcr_t reg)
220 {
221 	/* SPECS_PAGE: 37/38 */
222 	snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
223 	return snd_als4k_iobase_readl(iobase, ALS4K_IOD_08_GCR_DATA);
224 }
225 
226 static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg)
227 {
228 	return snd_als4k_gcr_read_addr(sb->alt_port, reg);
229 }
230 
231 enum als4k_cr_t { /* all registers 8bit wide; SPECS_PAGE: 20 to 23 */
232 	ALS4K_CR0_SB_CONFIG = 0x00,
233 	ALS4K_CR2_MISC_CONTROL = 0x02,
234 	ALS4K_CR3_CONFIGURATION = 0x03,
235 	ALS4K_CR17_FIFO_STATUS = 0x17,
236 	ALS4K_CR18_ESP_MAJOR_VERSION = 0x18,
237 	ALS4K_CR19_ESP_MINOR_VERSION = 0x19,
238 	ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a,
239 	ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c,
240 	ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d,
241 	ALS4K_CR1E_FIFO2_CONTROL = 0x1e, /* secondary PCM FIFO (recording) */
242 	ALS4K_CR3A_MISC_CONTROL = 0x3a,
243 	ALS4K_CR3B_CRC32_BYTE0 = 0x3b, /* for testing, activate via CR3A */
244 	ALS4K_CR3C_CRC32_BYTE1 = 0x3c,
245 	ALS4K_CR3D_CRC32_BYTE2 = 0x3d,
246 	ALS4K_CR3E_CRC32_BYTE3 = 0x3e,
247 };
248 
249 enum als4k_cr0_t {
250 	ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02, /* IRQ/FIFO controlled for 0/1 */
251 	ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04, /* IRQ/FIFO controlled for 0/1 */
252 	ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80,
253 };
254 
255 static inline void snd_als4_cr_write(struct snd_sb *chip,
256 					enum als4k_cr_t reg,
257 					u8 data)
258 {
259 	/* Control Register is reg | 0xc0 (bit 7, 6 set) on sbmixer_index
260 	 * NOTE: assumes chip->mixer_lock to be locked externally already!
261 	 * SPECS_PAGE: 6 */
262 	snd_sbmixer_write(chip, reg | 0xc0, data);
263 }
264 
265 static inline u8 snd_als4_cr_read(struct snd_sb *chip,
266 					enum als4k_cr_t reg)
267 {
268 	/* NOTE: assumes chip->mixer_lock to be locked externally already! */
269 	return snd_sbmixer_read(chip, reg | 0xc0);
270 }
271 
272 
273 
274 static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate)
275 {
276 	if (!(chip->mode & SB_RATE_LOCK)) {
277 		snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
278 		snd_sbdsp_command(chip, rate>>8);
279 		snd_sbdsp_command(chip, rate);
280 	}
281 }
282 
283 static inline void snd_als4000_set_capture_dma(struct snd_sb *chip,
284 					       dma_addr_t addr, unsigned size)
285 {
286 	/* SPECS_PAGE: 40 */
287 	snd_als4k_gcr_write(chip, ALS4K_GCRA2_FIFO2_PCIADDR, addr);
288 	snd_als4k_gcr_write(chip, ALS4K_GCRA3_FIFO2_COUNT, (size-1));
289 }
290 
291 static inline void snd_als4000_set_playback_dma(struct snd_sb *chip,
292 						dma_addr_t addr,
293 						unsigned size)
294 {
295 	/* SPECS_PAGE: 38 */
296 	snd_als4k_gcr_write(chip, ALS4K_GCR91_DMA0_ADDR, addr);
297 	snd_als4k_gcr_write(chip, ALS4K_GCR92_DMA0_MODE_COUNT,
298 							(size-1)|0x180000);
299 }
300 
301 #define ALS4000_FORMAT_SIGNED	(1<<0)
302 #define ALS4000_FORMAT_16BIT	(1<<1)
303 #define ALS4000_FORMAT_STEREO	(1<<2)
304 
305 static int snd_als4000_get_format(struct snd_pcm_runtime *runtime)
306 {
307 	int result;
308 
309 	result = 0;
310 	if (snd_pcm_format_signed(runtime->format))
311 		result |= ALS4000_FORMAT_SIGNED;
312 	if (snd_pcm_format_physical_width(runtime->format) == 16)
313 		result |= ALS4000_FORMAT_16BIT;
314 	if (runtime->channels > 1)
315 		result |= ALS4000_FORMAT_STEREO;
316 	return result;
317 }
318 
319 /* structure for setting up playback */
320 static const struct {
321 	unsigned char dsp_cmd, dma_on, dma_off, format;
322 } playback_cmd_vals[]={
323 /* ALS4000_FORMAT_U8_MONO */
324 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO },
325 /* ALS4000_FORMAT_S8_MONO */
326 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO },
327 /* ALS4000_FORMAT_U16L_MONO */
328 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO },
329 /* ALS4000_FORMAT_S16L_MONO */
330 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO },
331 /* ALS4000_FORMAT_U8_STEREO */
332 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO },
333 /* ALS4000_FORMAT_S8_STEREO */
334 { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO },
335 /* ALS4000_FORMAT_U16L_STEREO */
336 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO },
337 /* ALS4000_FORMAT_S16L_STEREO */
338 { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO },
339 };
340 #define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format])
341 
342 /* structure for setting up capture */
343 enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 };
344 static const unsigned char capture_cmd_vals[]=
345 {
346 CMD_WIDTH8|CMD_MONO,			/* ALS4000_FORMAT_U8_MONO */
347 CMD_WIDTH8|CMD_SIGNED|CMD_MONO,		/* ALS4000_FORMAT_S8_MONO */
348 CMD_MONO,				/* ALS4000_FORMAT_U16L_MONO */
349 CMD_SIGNED|CMD_MONO,			/* ALS4000_FORMAT_S16L_MONO */
350 CMD_WIDTH8|CMD_STEREO,			/* ALS4000_FORMAT_U8_STEREO */
351 CMD_WIDTH8|CMD_SIGNED|CMD_STEREO,	/* ALS4000_FORMAT_S8_STEREO */
352 CMD_STEREO,				/* ALS4000_FORMAT_U16L_STEREO */
353 CMD_SIGNED|CMD_STEREO,			/* ALS4000_FORMAT_S16L_STEREO */
354 };
355 #define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format])
356 
357 static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream)
358 {
359 	struct snd_sb *chip = snd_pcm_substream_chip(substream);
360 	struct snd_pcm_runtime *runtime = substream->runtime;
361 	unsigned long size;
362 	unsigned count;
363 
364 	chip->capture_format = snd_als4000_get_format(runtime);
365 
366 	size = snd_pcm_lib_buffer_bytes(substream);
367 	count = snd_pcm_lib_period_bytes(substream);
368 
369 	if (chip->capture_format & ALS4000_FORMAT_16BIT)
370 		count >>= 1;
371 	count--;
372 
373 	spin_lock_irq(&chip->reg_lock);
374 	snd_als4000_set_rate(chip, runtime->rate);
375 	snd_als4000_set_capture_dma(chip, runtime->dma_addr, size);
376 	spin_unlock_irq(&chip->reg_lock);
377 	spin_lock_irq(&chip->mixer_lock);
378 	snd_als4_cr_write(chip, ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, count & 0xff);
379 	snd_als4_cr_write(chip, ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, count >> 8);
380 	spin_unlock_irq(&chip->mixer_lock);
381 	return 0;
382 }
383 
384 static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream)
385 {
386 	struct snd_sb *chip = snd_pcm_substream_chip(substream);
387 	struct snd_pcm_runtime *runtime = substream->runtime;
388 	unsigned long size;
389 	unsigned count;
390 
391 	chip->playback_format = snd_als4000_get_format(runtime);
392 
393 	size = snd_pcm_lib_buffer_bytes(substream);
394 	count = snd_pcm_lib_period_bytes(substream);
395 
396 	if (chip->playback_format & ALS4000_FORMAT_16BIT)
397 		count >>= 1;
398 	count--;
399 
400 	/* FIXME: from second playback on, there's a lot more clicks and pops
401 	 * involved here than on first playback. Fiddling with
402 	 * tons of different settings didn't help (DMA, speaker on/off,
403 	 * reordering, ...). Something seems to get enabled on playback
404 	 * that I haven't found out how to disable again, which then causes
405 	 * the switching pops to reach the speakers the next time here. */
406 	spin_lock_irq(&chip->reg_lock);
407 	snd_als4000_set_rate(chip, runtime->rate);
408 	snd_als4000_set_playback_dma(chip, runtime->dma_addr, size);
409 
410 	/* SPEAKER_ON not needed, since dma_on seems to also enable speaker */
411 	/* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */
412 	snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd);
413 	snd_sbdsp_command(chip, playback_cmd(chip).format);
414 	snd_sbdsp_command(chip, count & 0xff);
415 	snd_sbdsp_command(chip, count >> 8);
416 	snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
417 	spin_unlock_irq(&chip->reg_lock);
418 
419 	return 0;
420 }
421 
422 static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd)
423 {
424 	struct snd_sb *chip = snd_pcm_substream_chip(substream);
425 	int result = 0;
426 
427 	/* FIXME race condition in here!!!
428 	   chip->mode non-atomic update gets consistently protected
429 	   by reg_lock always, _except_ for this place!!
430 	   Probably need to take reg_lock as outer (or inner??) lock, too.
431 	   (or serialize both lock operations? probably not, though... - racy?)
432 	*/
433 	spin_lock(&chip->mixer_lock);
434 	switch (cmd) {
435 	case SNDRV_PCM_TRIGGER_START:
436 	case SNDRV_PCM_TRIGGER_RESUME:
437 		chip->mode |= SB_RATE_LOCK_CAPTURE;
438 		snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
439 							 capture_cmd(chip));
440 		break;
441 	case SNDRV_PCM_TRIGGER_STOP:
442 	case SNDRV_PCM_TRIGGER_SUSPEND:
443 		chip->mode &= ~SB_RATE_LOCK_CAPTURE;
444 		snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
445 							 capture_cmd(chip));
446 		break;
447 	default:
448 		result = -EINVAL;
449 		break;
450 	}
451 	spin_unlock(&chip->mixer_lock);
452 	return result;
453 }
454 
455 static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd)
456 {
457 	struct snd_sb *chip = snd_pcm_substream_chip(substream);
458 	int result = 0;
459 
460 	spin_lock(&chip->reg_lock);
461 	switch (cmd) {
462 	case SNDRV_PCM_TRIGGER_START:
463 	case SNDRV_PCM_TRIGGER_RESUME:
464 		chip->mode |= SB_RATE_LOCK_PLAYBACK;
465 		snd_sbdsp_command(chip, playback_cmd(chip).dma_on);
466 		break;
467 	case SNDRV_PCM_TRIGGER_STOP:
468 	case SNDRV_PCM_TRIGGER_SUSPEND:
469 		snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
470 		chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
471 		break;
472 	default:
473 		result = -EINVAL;
474 		break;
475 	}
476 	spin_unlock(&chip->reg_lock);
477 	return result;
478 }
479 
480 static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream)
481 {
482 	struct snd_sb *chip = snd_pcm_substream_chip(substream);
483 	unsigned int result;
484 
485 	spin_lock(&chip->reg_lock);
486 	result = snd_als4k_gcr_read(chip, ALS4K_GCRA4_FIFO2_CURRENT_ADDR);
487 	spin_unlock(&chip->reg_lock);
488 	result &= 0xffff;
489 	return bytes_to_frames( substream->runtime, result );
490 }
491 
492 static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream)
493 {
494 	struct snd_sb *chip = snd_pcm_substream_chip(substream);
495 	unsigned result;
496 
497 	spin_lock(&chip->reg_lock);
498 	result = snd_als4k_gcr_read(chip, ALS4K_GCRA0_FIFO1_CURRENT_ADDR);
499 	spin_unlock(&chip->reg_lock);
500 	result &= 0xffff;
501 	return bytes_to_frames( substream->runtime, result );
502 }
503 
504 /* FIXME: this IRQ routine doesn't really support IRQ sharing (we always
505  * return IRQ_HANDLED no matter whether we actually had an IRQ flag or not).
506  * ALS4000a.PDF writes that while ACKing IRQ in PCI block will *not* ACK
507  * the IRQ in the SB core, ACKing IRQ in SB block *will* ACK the PCI IRQ
508  * register (alt_port + ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU). Probably something
509  * could be optimized here to query/write one register only...
510  * And even if both registers need to be queried, then there's still the
511  * question of whether it's actually correct to ACK PCI IRQ before reading
512  * SB IRQ like we do now, since ALS4000a.PDF mentions that PCI IRQ will *clear*
513  * SB IRQ status.
514  * (hmm, SPECS_PAGE: 38 mentions it the other way around!)
515  * And do we *really* need the lock here for *reading* SB_DSP4_IRQSTATUS??
516  * */
517 static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id)
518 {
519 	struct snd_sb *chip = dev_id;
520 	unsigned pci_irqstatus;
521 	unsigned sb_irqstatus;
522 
523 	/* find out which bit of the ALS4000 PCI block produced the interrupt,
524 	   SPECS_PAGE: 38, 5 */
525 	pci_irqstatus = snd_als4k_iobase_readb(chip->alt_port,
526 				 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU);
527 	if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ)
528 	 && (chip->playback_substream)) /* playback */
529 		snd_pcm_period_elapsed(chip->playback_substream);
530 	if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ)
531 	 && (chip->capture_substream)) /* capturing */
532 		snd_pcm_period_elapsed(chip->capture_substream);
533 	if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ)
534 	 && (chip->rmidi)) /* MPU401 interrupt */
535 		snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
536 	/* ACK the PCI block IRQ */
537 	snd_als4k_iobase_writeb(chip->alt_port,
538 			 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, pci_irqstatus);
539 
540 	spin_lock(&chip->mixer_lock);
541 	/* SPECS_PAGE: 20 */
542 	sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
543 	spin_unlock(&chip->mixer_lock);
544 
545 	if (sb_irqstatus & SB_IRQTYPE_8BIT)
546 		snd_sb_ack_8bit(chip);
547 	if (sb_irqstatus & SB_IRQTYPE_16BIT)
548 		snd_sb_ack_16bit(chip);
549 	if (sb_irqstatus & SB_IRQTYPE_MPUIN)
550 		inb(chip->mpu_port);
551 	if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA)
552 		snd_als4k_iobase_readb(chip->alt_port,
553 					ALS4K_IOB_16_ACK_FOR_CR1E);
554 
555 	/* dev_dbg(chip->card->dev, "als4000: irq 0x%04x 0x%04x\n",
556 					 pci_irqstatus, sb_irqstatus); */
557 
558 	/* only ack the things we actually handled above */
559 	return IRQ_RETVAL(
560 	     (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ|
561 				ALS4K_IOB_0E_MPU_IRQ))
562 	  || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT|
563 				SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA))
564 	);
565 }
566 
567 /*****************************************************************/
568 
569 static const struct snd_pcm_hardware snd_als4000_playback =
570 {
571 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
572 				 SNDRV_PCM_INFO_MMAP_VALID),
573 	.formats =		SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
574 				SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,	/* formats */
575 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
576 	.rate_min =		4000,
577 	.rate_max =		48000,
578 	.channels_min =		1,
579 	.channels_max =		2,
580 	.buffer_bytes_max =	65536,
581 	.period_bytes_min =	64,
582 	.period_bytes_max =	65536,
583 	.periods_min =		1,
584 	.periods_max =		1024,
585 	.fifo_size =		0
586 };
587 
588 static const struct snd_pcm_hardware snd_als4000_capture =
589 {
590 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
591 				 SNDRV_PCM_INFO_MMAP_VALID),
592 	.formats =		SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
593 				SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,	/* formats */
594 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
595 	.rate_min =		4000,
596 	.rate_max =		48000,
597 	.channels_min =		1,
598 	.channels_max =		2,
599 	.buffer_bytes_max =	65536,
600 	.period_bytes_min =	64,
601 	.period_bytes_max =	65536,
602 	.periods_min =		1,
603 	.periods_max =		1024,
604 	.fifo_size =		0
605 };
606 
607 /*****************************************************************/
608 
609 static int snd_als4000_playback_open(struct snd_pcm_substream *substream)
610 {
611 	struct snd_sb *chip = snd_pcm_substream_chip(substream);
612 	struct snd_pcm_runtime *runtime = substream->runtime;
613 
614 	chip->playback_substream = substream;
615 	runtime->hw = snd_als4000_playback;
616 	return 0;
617 }
618 
619 static int snd_als4000_playback_close(struct snd_pcm_substream *substream)
620 {
621 	struct snd_sb *chip = snd_pcm_substream_chip(substream);
622 
623 	chip->playback_substream = NULL;
624 	return 0;
625 }
626 
627 static int snd_als4000_capture_open(struct snd_pcm_substream *substream)
628 {
629 	struct snd_sb *chip = snd_pcm_substream_chip(substream);
630 	struct snd_pcm_runtime *runtime = substream->runtime;
631 
632 	chip->capture_substream = substream;
633 	runtime->hw = snd_als4000_capture;
634 	return 0;
635 }
636 
637 static int snd_als4000_capture_close(struct snd_pcm_substream *substream)
638 {
639 	struct snd_sb *chip = snd_pcm_substream_chip(substream);
640 
641 	chip->capture_substream = NULL;
642 	return 0;
643 }
644 
645 /******************************************************************/
646 
647 static const struct snd_pcm_ops snd_als4000_playback_ops = {
648 	.open =		snd_als4000_playback_open,
649 	.close =	snd_als4000_playback_close,
650 	.ioctl =	snd_pcm_lib_ioctl,
651 	.prepare =	snd_als4000_playback_prepare,
652 	.trigger =	snd_als4000_playback_trigger,
653 	.pointer =	snd_als4000_playback_pointer
654 };
655 
656 static const struct snd_pcm_ops snd_als4000_capture_ops = {
657 	.open =		snd_als4000_capture_open,
658 	.close =	snd_als4000_capture_close,
659 	.ioctl =	snd_pcm_lib_ioctl,
660 	.prepare =	snd_als4000_capture_prepare,
661 	.trigger =	snd_als4000_capture_trigger,
662 	.pointer =	snd_als4000_capture_pointer
663 };
664 
665 static int snd_als4000_pcm(struct snd_sb *chip, int device)
666 {
667 	struct snd_pcm *pcm;
668 	int err;
669 
670 	err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm);
671 	if (err < 0)
672 		return err;
673 	pcm->private_data = chip;
674 	pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
675 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops);
676 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops);
677 
678 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
679 				       &chip->pci->dev, 64*1024, 64*1024);
680 
681 	chip->pcm = pcm;
682 
683 	return 0;
684 }
685 
686 /******************************************************************/
687 
688 static void snd_als4000_set_addr(unsigned long iobase,
689 					unsigned int sb_io,
690 					unsigned int mpu_io,
691 					unsigned int opl_io,
692 					unsigned int game_io)
693 {
694 	u32 cfg1 = 0;
695 	u32 cfg2 = 0;
696 
697 	if (mpu_io > 0)
698 		cfg2 |= (mpu_io | 1) << 16;
699 	if (sb_io > 0)
700 		cfg2 |= (sb_io | 1);
701 	if (game_io > 0)
702 		cfg1 |= (game_io | 1) << 16;
703 	if (opl_io > 0)
704 		cfg1 |= (opl_io | 1);
705 	snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1);
706 	snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA9_LEGACY_CFG2, cfg2);
707 }
708 
709 static void snd_als4000_configure(struct snd_sb *chip)
710 {
711 	u8 tmp;
712 	int i;
713 
714 	/* do some more configuration */
715 	spin_lock_irq(&chip->mixer_lock);
716 	tmp = snd_als4_cr_read(chip, ALS4K_CR0_SB_CONFIG);
717 	snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
718 				tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
719 	/* always select DMA channel 0, since we do not actually use DMA
720 	 * SPECS_PAGE: 19/20 */
721 	snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0);
722 	snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
723 				 tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
724 	spin_unlock_irq(&chip->mixer_lock);
725 
726 	spin_lock_irq(&chip->reg_lock);
727 	/* enable interrupts */
728 	snd_als4k_gcr_write(chip, ALS4K_GCR8C_MISC_CTRL,
729 					ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE);
730 
731 	/* SPECS_PAGE: 39 */
732 	for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i)
733 		snd_als4k_gcr_write(chip, i, 0);
734 	/* enable burst mode to prevent dropouts during high PCI bus usage */
735 	snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL,
736 		(snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04);
737 	spin_unlock_irq(&chip->reg_lock);
738 }
739 
740 #ifdef SUPPORT_JOYSTICK
741 static int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev)
742 {
743 	struct gameport *gp;
744 	struct resource *r;
745 	int io_port;
746 
747 	if (joystick_port[dev] == 0)
748 		return -ENODEV;
749 
750 	if (joystick_port[dev] == 1) { /* auto-detect */
751 		for (io_port = 0x200; io_port <= 0x218; io_port += 8) {
752 			r = request_region(io_port, 8, "ALS4000 gameport");
753 			if (r)
754 				break;
755 		}
756 	} else {
757 		io_port = joystick_port[dev];
758 		r = request_region(io_port, 8, "ALS4000 gameport");
759 	}
760 
761 	if (!r) {
762 		dev_warn(&acard->pci->dev, "cannot reserve joystick ports\n");
763 		return -EBUSY;
764 	}
765 
766 	acard->gameport = gp = gameport_allocate_port();
767 	if (!gp) {
768 		dev_err(&acard->pci->dev, "cannot allocate memory for gameport\n");
769 		release_and_free_resource(r);
770 		return -ENOMEM;
771 	}
772 
773 	gameport_set_name(gp, "ALS4000 Gameport");
774 	gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci));
775 	gameport_set_dev_parent(gp, &acard->pci->dev);
776 	gp->io = io_port;
777 	gameport_set_port_data(gp, r);
778 
779 	/* Enable legacy joystick port */
780 	snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
781 
782 	gameport_register_port(acard->gameport);
783 
784 	return 0;
785 }
786 
787 static void snd_als4000_free_gameport(struct snd_card_als4000 *acard)
788 {
789 	if (acard->gameport) {
790 		struct resource *r = gameport_get_port_data(acard->gameport);
791 
792 		gameport_unregister_port(acard->gameport);
793 		acard->gameport = NULL;
794 
795 		/* disable joystick */
796 		snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
797 
798 		release_and_free_resource(r);
799 	}
800 }
801 #else
802 static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; }
803 static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { }
804 #endif
805 
806 static void snd_card_als4000_free( struct snd_card *card )
807 {
808 	struct snd_card_als4000 *acard = card->private_data;
809 
810 	/* make sure that interrupts are disabled */
811 	snd_als4k_gcr_write_addr(acard->iobase, ALS4K_GCR8C_MISC_CTRL, 0);
812 	/* free resources */
813 	snd_als4000_free_gameport(acard);
814 	pci_release_regions(acard->pci);
815 	pci_disable_device(acard->pci);
816 }
817 
818 static int snd_card_als4000_probe(struct pci_dev *pci,
819 				  const struct pci_device_id *pci_id)
820 {
821 	static int dev;
822 	struct snd_card *card;
823 	struct snd_card_als4000 *acard;
824 	unsigned long iobase;
825 	struct snd_sb *chip;
826 	struct snd_opl3 *opl3;
827 	unsigned short word;
828 	int err;
829 
830 	if (dev >= SNDRV_CARDS)
831 		return -ENODEV;
832 	if (!enable[dev]) {
833 		dev++;
834 		return -ENOENT;
835 	}
836 
837 	/* enable PCI device */
838 	if ((err = pci_enable_device(pci)) < 0) {
839 		return err;
840 	}
841 	/* check, if we can restrict PCI DMA transfers to 24 bits */
842 	if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 ||
843 	    dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) {
844 		dev_err(&pci->dev, "architecture does not support 24bit PCI busmaster DMA\n");
845 		pci_disable_device(pci);
846 		return -ENXIO;
847 	}
848 
849 	if ((err = pci_request_regions(pci, "ALS4000")) < 0) {
850 		pci_disable_device(pci);
851 		return err;
852 	}
853 	iobase = pci_resource_start(pci, 0);
854 
855 	pci_read_config_word(pci, PCI_COMMAND, &word);
856 	pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO);
857 	pci_set_master(pci);
858 
859 	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
860 			   sizeof(*acard) /* private_data: acard */,
861 			   &card);
862 	if (err < 0) {
863 		pci_release_regions(pci);
864 		pci_disable_device(pci);
865 		return err;
866 	}
867 
868 	acard = card->private_data;
869 	acard->pci = pci;
870 	acard->iobase = iobase;
871 	card->private_free = snd_card_als4000_free;
872 
873 	/* disable all legacy ISA stuff */
874 	snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
875 
876 	if ((err = snd_sbdsp_create(card,
877 				    iobase + ALS4K_IOB_10_ADLIB_ADDR0,
878 				    pci->irq,
879 		/* internally registered as IRQF_SHARED in case of ALS4000 SB */
880 				    snd_als4000_interrupt,
881 				    -1,
882 				    -1,
883 				    SB_HW_ALS4000,
884 				    &chip)) < 0) {
885 		goto out_err;
886 	}
887 	acard->chip = chip;
888 
889 	chip->pci = pci;
890 	chip->alt_port = iobase;
891 
892 	snd_als4000_configure(chip);
893 
894 	strcpy(card->driver, "ALS4000");
895 	strcpy(card->shortname, "Avance Logic ALS4000");
896 	sprintf(card->longname, "%s at 0x%lx, irq %i",
897 		card->shortname, chip->alt_port, chip->irq);
898 
899 	if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_ALS4000,
900 					iobase + ALS4K_IOB_30_MIDI_DATA,
901 					MPU401_INFO_INTEGRATED |
902 					MPU401_INFO_IRQ_HOOK,
903 					-1, &chip->rmidi)) < 0) {
904 		dev_err(&pci->dev, "no MPU-401 device at 0x%lx?\n",
905 				iobase + ALS4K_IOB_30_MIDI_DATA);
906 		goto out_err;
907 	}
908 	/* FIXME: ALS4000 has interesting MPU401 configuration features
909 	 * at ALS4K_CR1A_MPU401_UART_MODE_CONTROL
910 	 * (pass-thru / UART switching, fast MIDI clock, etc.),
911 	 * however there doesn't seem to be an ALSA API for this...
912 	 * SPECS_PAGE: 21 */
913 
914 	if ((err = snd_als4000_pcm(chip, 0)) < 0) {
915 		goto out_err;
916 	}
917 	if ((err = snd_sbmixer_new(chip)) < 0) {
918 		goto out_err;
919 	}
920 
921 	if (snd_opl3_create(card,
922 				iobase + ALS4K_IOB_10_ADLIB_ADDR0,
923 				iobase + ALS4K_IOB_12_ADLIB_ADDR2,
924 			    OPL3_HW_AUTO, 1, &opl3) < 0) {
925 		dev_err(&pci->dev, "no OPL device at 0x%lx-0x%lx?\n",
926 			   iobase + ALS4K_IOB_10_ADLIB_ADDR0,
927 			   iobase + ALS4K_IOB_12_ADLIB_ADDR2);
928 	} else {
929 		if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
930 			goto out_err;
931 		}
932 	}
933 
934 	snd_als4000_create_gameport(acard, dev);
935 
936 	if ((err = snd_card_register(card)) < 0) {
937 		goto out_err;
938 	}
939 	pci_set_drvdata(pci, card);
940 	dev++;
941 	err = 0;
942 	goto out;
943 
944 out_err:
945 	snd_card_free(card);
946 
947 out:
948 	return err;
949 }
950 
951 static void snd_card_als4000_remove(struct pci_dev *pci)
952 {
953 	snd_card_free(pci_get_drvdata(pci));
954 }
955 
956 #ifdef CONFIG_PM_SLEEP
957 static int snd_als4000_suspend(struct device *dev)
958 {
959 	struct snd_card *card = dev_get_drvdata(dev);
960 	struct snd_card_als4000 *acard = card->private_data;
961 	struct snd_sb *chip = acard->chip;
962 
963 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
964 
965 	snd_sbmixer_suspend(chip);
966 	return 0;
967 }
968 
969 static int snd_als4000_resume(struct device *dev)
970 {
971 	struct snd_card *card = dev_get_drvdata(dev);
972 	struct snd_card_als4000 *acard = card->private_data;
973 	struct snd_sb *chip = acard->chip;
974 
975 	snd_als4000_configure(chip);
976 	snd_sbdsp_reset(chip);
977 	snd_sbmixer_resume(chip);
978 
979 #ifdef SUPPORT_JOYSTICK
980 	if (acard->gameport)
981 		snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
982 #endif
983 
984 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
985 	return 0;
986 }
987 
988 static SIMPLE_DEV_PM_OPS(snd_als4000_pm, snd_als4000_suspend, snd_als4000_resume);
989 #define SND_ALS4000_PM_OPS	&snd_als4000_pm
990 #else
991 #define SND_ALS4000_PM_OPS	NULL
992 #endif /* CONFIG_PM_SLEEP */
993 
994 static struct pci_driver als4000_driver = {
995 	.name = KBUILD_MODNAME,
996 	.id_table = snd_als4000_ids,
997 	.probe = snd_card_als4000_probe,
998 	.remove = snd_card_als4000_remove,
999 	.driver = {
1000 		.pm = SND_ALS4000_PM_OPS,
1001 	},
1002 };
1003 
1004 module_pci_driver(als4000_driver);
1005