1 /* Analog Devices 1889 audio driver 2 * 3 * This is a driver for the AD1889 PCI audio chipset found 4 * on the HP PA-RISC [BCJ]-xxx0 workstations. 5 * 6 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org> 7 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org> 8 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License, version 2, as 12 * published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23 * TODO: 24 * Do we need to take care of CCS register? 25 * Maybe we could use finer grained locking (separate locks for pb/cap)? 26 * Wishlist: 27 * Control Interface (mixer) support 28 * Better AC97 support (VSR...)? 29 * PM support 30 * MIDI support 31 * Game Port support 32 * SG DMA support (this will need *a lot* of work) 33 */ 34 35 #include <linux/init.h> 36 #include <linux/pci.h> 37 #include <linux/dma-mapping.h> 38 #include <linux/slab.h> 39 #include <linux/interrupt.h> 40 #include <linux/compiler.h> 41 #include <linux/delay.h> 42 #include <linux/module.h> 43 44 #include <sound/core.h> 45 #include <sound/pcm.h> 46 #include <sound/initval.h> 47 #include <sound/ac97_codec.h> 48 49 #include <asm/io.h> 50 51 #include "ad1889.h" 52 #include "ac97/ac97_id.h" 53 54 #define AD1889_DRVVER "Version: 1.7" 55 56 MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>"); 57 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver"); 58 MODULE_LICENSE("GPL"); 59 MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}"); 60 61 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 62 module_param_array(index, int, NULL, 0444); 63 MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard."); 64 65 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 66 module_param_array(id, charp, NULL, 0444); 67 MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard."); 68 69 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 70 module_param_array(enable, bool, NULL, 0444); 71 MODULE_PARM_DESC(enable, "Enable AD1889 soundcard."); 72 73 static char *ac97_quirk[SNDRV_CARDS]; 74 module_param_array(ac97_quirk, charp, NULL, 0444); 75 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 76 77 #define DEVNAME "ad1889" 78 #define PFX DEVNAME ": " 79 80 /* keep track of some hw registers */ 81 struct ad1889_register_state { 82 u16 reg; /* reg setup */ 83 u32 addr; /* dma base address */ 84 unsigned long size; /* DMA buffer size */ 85 }; 86 87 struct snd_ad1889 { 88 struct snd_card *card; 89 struct pci_dev *pci; 90 91 int irq; 92 unsigned long bar; 93 void __iomem *iobase; 94 95 struct snd_ac97 *ac97; 96 struct snd_ac97_bus *ac97_bus; 97 struct snd_pcm *pcm; 98 struct snd_info_entry *proc; 99 100 struct snd_pcm_substream *psubs; 101 struct snd_pcm_substream *csubs; 102 103 /* playback register state */ 104 struct ad1889_register_state wave; 105 struct ad1889_register_state ramc; 106 107 spinlock_t lock; 108 }; 109 110 static inline u16 111 ad1889_readw(struct snd_ad1889 *chip, unsigned reg) 112 { 113 return readw(chip->iobase + reg); 114 } 115 116 static inline void 117 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) 118 { 119 writew(val, chip->iobase + reg); 120 } 121 122 static inline u32 123 ad1889_readl(struct snd_ad1889 *chip, unsigned reg) 124 { 125 return readl(chip->iobase + reg); 126 } 127 128 static inline void 129 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) 130 { 131 writel(val, chip->iobase + reg); 132 } 133 134 static inline void 135 ad1889_unmute(struct snd_ad1889 *chip) 136 { 137 u16 st; 138 st = ad1889_readw(chip, AD_DS_WADA) & 139 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM); 140 ad1889_writew(chip, AD_DS_WADA, st); 141 ad1889_readw(chip, AD_DS_WADA); 142 } 143 144 static inline void 145 ad1889_mute(struct snd_ad1889 *chip) 146 { 147 u16 st; 148 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM; 149 ad1889_writew(chip, AD_DS_WADA, st); 150 ad1889_readw(chip, AD_DS_WADA); 151 } 152 153 static inline void 154 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address) 155 { 156 ad1889_writel(chip, AD_DMA_ADCBA, address); 157 ad1889_writel(chip, AD_DMA_ADCCA, address); 158 } 159 160 static inline void 161 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count) 162 { 163 ad1889_writel(chip, AD_DMA_ADCBC, count); 164 ad1889_writel(chip, AD_DMA_ADCCC, count); 165 } 166 167 static inline void 168 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count) 169 { 170 ad1889_writel(chip, AD_DMA_ADCIB, count); 171 ad1889_writel(chip, AD_DMA_ADCIC, count); 172 } 173 174 static inline void 175 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address) 176 { 177 ad1889_writel(chip, AD_DMA_WAVBA, address); 178 ad1889_writel(chip, AD_DMA_WAVCA, address); 179 } 180 181 static inline void 182 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count) 183 { 184 ad1889_writel(chip, AD_DMA_WAVBC, count); 185 ad1889_writel(chip, AD_DMA_WAVCC, count); 186 } 187 188 static inline void 189 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count) 190 { 191 ad1889_writel(chip, AD_DMA_WAVIB, count); 192 ad1889_writel(chip, AD_DMA_WAVIC, count); 193 } 194 195 static void 196 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel) 197 { 198 u16 reg; 199 200 if (channel & AD_CHAN_WAV) { 201 /* Disable wave channel */ 202 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN; 203 ad1889_writew(chip, AD_DS_WSMC, reg); 204 chip->wave.reg = reg; 205 206 /* disable IRQs */ 207 reg = ad1889_readw(chip, AD_DMA_WAV); 208 reg &= AD_DMA_IM_DIS; 209 reg &= ~AD_DMA_LOOP; 210 ad1889_writew(chip, AD_DMA_WAV, reg); 211 212 /* clear IRQ and address counters and pointers */ 213 ad1889_load_wave_buffer_address(chip, 0x0); 214 ad1889_load_wave_buffer_count(chip, 0x0); 215 ad1889_load_wave_interrupt_count(chip, 0x0); 216 217 /* flush */ 218 ad1889_readw(chip, AD_DMA_WAV); 219 } 220 221 if (channel & AD_CHAN_ADC) { 222 /* Disable ADC channel */ 223 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN; 224 ad1889_writew(chip, AD_DS_RAMC, reg); 225 chip->ramc.reg = reg; 226 227 reg = ad1889_readw(chip, AD_DMA_ADC); 228 reg &= AD_DMA_IM_DIS; 229 reg &= ~AD_DMA_LOOP; 230 ad1889_writew(chip, AD_DMA_ADC, reg); 231 232 ad1889_load_adc_buffer_address(chip, 0x0); 233 ad1889_load_adc_buffer_count(chip, 0x0); 234 ad1889_load_adc_interrupt_count(chip, 0x0); 235 236 /* flush */ 237 ad1889_readw(chip, AD_DMA_ADC); 238 } 239 } 240 241 static u16 242 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 243 { 244 struct snd_ad1889 *chip = ac97->private_data; 245 return ad1889_readw(chip, AD_AC97_BASE + reg); 246 } 247 248 static void 249 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) 250 { 251 struct snd_ad1889 *chip = ac97->private_data; 252 ad1889_writew(chip, AD_AC97_BASE + reg, val); 253 } 254 255 static int 256 snd_ad1889_ac97_ready(struct snd_ad1889 *chip) 257 { 258 int retry = 400; /* average needs 352 msec */ 259 260 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY) 261 && --retry) 262 mdelay(1); 263 if (!retry) { 264 dev_err(chip->card->dev, "[%s] Link is not ready.\n", 265 __func__); 266 return -EIO; 267 } 268 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry); 269 270 return 0; 271 } 272 273 static int 274 snd_ad1889_hw_params(struct snd_pcm_substream *substream, 275 struct snd_pcm_hw_params *hw_params) 276 { 277 return snd_pcm_lib_malloc_pages(substream, 278 params_buffer_bytes(hw_params)); 279 } 280 281 static int 282 snd_ad1889_hw_free(struct snd_pcm_substream *substream) 283 { 284 return snd_pcm_lib_free_pages(substream); 285 } 286 287 static struct snd_pcm_hardware snd_ad1889_playback_hw = { 288 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 289 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 290 .formats = SNDRV_PCM_FMTBIT_S16_LE, 291 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 292 .rate_min = 8000, /* docs say 7000, but we're lazy */ 293 .rate_max = 48000, 294 .channels_min = 1, 295 .channels_max = 2, 296 .buffer_bytes_max = BUFFER_BYTES_MAX, 297 .period_bytes_min = PERIOD_BYTES_MIN, 298 .period_bytes_max = PERIOD_BYTES_MAX, 299 .periods_min = PERIODS_MIN, 300 .periods_max = PERIODS_MAX, 301 /*.fifo_size = 0,*/ 302 }; 303 304 static struct snd_pcm_hardware snd_ad1889_capture_hw = { 305 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 306 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 307 .formats = SNDRV_PCM_FMTBIT_S16_LE, 308 .rates = SNDRV_PCM_RATE_48000, 309 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */ 310 .rate_max = 48000, 311 .channels_min = 1, 312 .channels_max = 2, 313 .buffer_bytes_max = BUFFER_BYTES_MAX, 314 .period_bytes_min = PERIOD_BYTES_MIN, 315 .period_bytes_max = PERIOD_BYTES_MAX, 316 .periods_min = PERIODS_MIN, 317 .periods_max = PERIODS_MAX, 318 /*.fifo_size = 0,*/ 319 }; 320 321 static int 322 snd_ad1889_playback_open(struct snd_pcm_substream *ss) 323 { 324 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 325 struct snd_pcm_runtime *rt = ss->runtime; 326 327 chip->psubs = ss; 328 rt->hw = snd_ad1889_playback_hw; 329 330 return 0; 331 } 332 333 static int 334 snd_ad1889_capture_open(struct snd_pcm_substream *ss) 335 { 336 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 337 struct snd_pcm_runtime *rt = ss->runtime; 338 339 chip->csubs = ss; 340 rt->hw = snd_ad1889_capture_hw; 341 342 return 0; 343 } 344 345 static int 346 snd_ad1889_playback_close(struct snd_pcm_substream *ss) 347 { 348 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 349 chip->psubs = NULL; 350 return 0; 351 } 352 353 static int 354 snd_ad1889_capture_close(struct snd_pcm_substream *ss) 355 { 356 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 357 chip->csubs = NULL; 358 return 0; 359 } 360 361 static int 362 snd_ad1889_playback_prepare(struct snd_pcm_substream *ss) 363 { 364 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 365 struct snd_pcm_runtime *rt = ss->runtime; 366 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 367 unsigned int count = snd_pcm_lib_period_bytes(ss); 368 u16 reg; 369 370 ad1889_channel_reset(chip, AD_CHAN_WAV); 371 372 reg = ad1889_readw(chip, AD_DS_WSMC); 373 374 /* Mask out 16-bit / Stereo */ 375 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST); 376 377 if (snd_pcm_format_width(rt->format) == 16) 378 reg |= AD_DS_WSMC_WA16; 379 380 if (rt->channels > 1) 381 reg |= AD_DS_WSMC_WAST; 382 383 /* let's make sure we don't clobber ourselves */ 384 spin_lock_irq(&chip->lock); 385 386 chip->wave.size = size; 387 chip->wave.reg = reg; 388 chip->wave.addr = rt->dma_addr; 389 390 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); 391 392 /* Set sample rates on the codec */ 393 ad1889_writew(chip, AD_DS_WAS, rt->rate); 394 395 /* Set up DMA */ 396 ad1889_load_wave_buffer_address(chip, chip->wave.addr); 397 ad1889_load_wave_buffer_count(chip, size); 398 ad1889_load_wave_interrupt_count(chip, count); 399 400 /* writes flush */ 401 ad1889_readw(chip, AD_DS_WSMC); 402 403 spin_unlock_irq(&chip->lock); 404 405 dev_dbg(chip->card->dev, 406 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n", 407 chip->wave.addr, count, size, reg, rt->rate); 408 return 0; 409 } 410 411 static int 412 snd_ad1889_capture_prepare(struct snd_pcm_substream *ss) 413 { 414 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 415 struct snd_pcm_runtime *rt = ss->runtime; 416 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 417 unsigned int count = snd_pcm_lib_period_bytes(ss); 418 u16 reg; 419 420 ad1889_channel_reset(chip, AD_CHAN_ADC); 421 422 reg = ad1889_readw(chip, AD_DS_RAMC); 423 424 /* Mask out 16-bit / Stereo */ 425 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST); 426 427 if (snd_pcm_format_width(rt->format) == 16) 428 reg |= AD_DS_RAMC_AD16; 429 430 if (rt->channels > 1) 431 reg |= AD_DS_RAMC_ADST; 432 433 /* let's make sure we don't clobber ourselves */ 434 spin_lock_irq(&chip->lock); 435 436 chip->ramc.size = size; 437 chip->ramc.reg = reg; 438 chip->ramc.addr = rt->dma_addr; 439 440 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg); 441 442 /* Set up DMA */ 443 ad1889_load_adc_buffer_address(chip, chip->ramc.addr); 444 ad1889_load_adc_buffer_count(chip, size); 445 ad1889_load_adc_interrupt_count(chip, count); 446 447 /* writes flush */ 448 ad1889_readw(chip, AD_DS_RAMC); 449 450 spin_unlock_irq(&chip->lock); 451 452 dev_dbg(chip->card->dev, 453 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n", 454 chip->ramc.addr, count, size, reg, rt->rate); 455 return 0; 456 } 457 458 /* this is called in atomic context with IRQ disabled. 459 Must be as fast as possible and not sleep. 460 DMA should be *triggered* by this call. 461 The WSMC "WAEN" bit triggers DMA Wave On/Off */ 462 static int 463 snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd) 464 { 465 u16 wsmc; 466 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 467 468 wsmc = ad1889_readw(chip, AD_DS_WSMC); 469 470 switch (cmd) { 471 case SNDRV_PCM_TRIGGER_START: 472 /* enable DMA loop & interrupts */ 473 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT); 474 wsmc |= AD_DS_WSMC_WAEN; 475 /* 1 to clear CHSS bit */ 476 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS); 477 ad1889_unmute(chip); 478 break; 479 case SNDRV_PCM_TRIGGER_STOP: 480 ad1889_mute(chip); 481 wsmc &= ~AD_DS_WSMC_WAEN; 482 break; 483 default: 484 snd_BUG(); 485 return -EINVAL; 486 } 487 488 chip->wave.reg = wsmc; 489 ad1889_writew(chip, AD_DS_WSMC, wsmc); 490 ad1889_readw(chip, AD_DS_WSMC); /* flush */ 491 492 /* reset the chip when STOP - will disable IRQs */ 493 if (cmd == SNDRV_PCM_TRIGGER_STOP) 494 ad1889_channel_reset(chip, AD_CHAN_WAV); 495 496 return 0; 497 } 498 499 /* this is called in atomic context with IRQ disabled. 500 Must be as fast as possible and not sleep. 501 DMA should be *triggered* by this call. 502 The RAMC "ADEN" bit triggers DMA ADC On/Off */ 503 static int 504 snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd) 505 { 506 u16 ramc; 507 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 508 509 ramc = ad1889_readw(chip, AD_DS_RAMC); 510 511 switch (cmd) { 512 case SNDRV_PCM_TRIGGER_START: 513 /* enable DMA loop & interrupts */ 514 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT); 515 ramc |= AD_DS_RAMC_ADEN; 516 /* 1 to clear CHSS bit */ 517 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS); 518 break; 519 case SNDRV_PCM_TRIGGER_STOP: 520 ramc &= ~AD_DS_RAMC_ADEN; 521 break; 522 default: 523 return -EINVAL; 524 } 525 526 chip->ramc.reg = ramc; 527 ad1889_writew(chip, AD_DS_RAMC, ramc); 528 ad1889_readw(chip, AD_DS_RAMC); /* flush */ 529 530 /* reset the chip when STOP - will disable IRQs */ 531 if (cmd == SNDRV_PCM_TRIGGER_STOP) 532 ad1889_channel_reset(chip, AD_CHAN_ADC); 533 534 return 0; 535 } 536 537 /* Called in atomic context with IRQ disabled */ 538 static snd_pcm_uframes_t 539 snd_ad1889_playback_pointer(struct snd_pcm_substream *ss) 540 { 541 size_t ptr = 0; 542 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 543 544 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) 545 return 0; 546 547 ptr = ad1889_readl(chip, AD_DMA_WAVCA); 548 ptr -= chip->wave.addr; 549 550 if (snd_BUG_ON(ptr >= chip->wave.size)) 551 return 0; 552 553 return bytes_to_frames(ss->runtime, ptr); 554 } 555 556 /* Called in atomic context with IRQ disabled */ 557 static snd_pcm_uframes_t 558 snd_ad1889_capture_pointer(struct snd_pcm_substream *ss) 559 { 560 size_t ptr = 0; 561 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 562 563 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN))) 564 return 0; 565 566 ptr = ad1889_readl(chip, AD_DMA_ADCCA); 567 ptr -= chip->ramc.addr; 568 569 if (snd_BUG_ON(ptr >= chip->ramc.size)) 570 return 0; 571 572 return bytes_to_frames(ss->runtime, ptr); 573 } 574 575 static struct snd_pcm_ops snd_ad1889_playback_ops = { 576 .open = snd_ad1889_playback_open, 577 .close = snd_ad1889_playback_close, 578 .ioctl = snd_pcm_lib_ioctl, 579 .hw_params = snd_ad1889_hw_params, 580 .hw_free = snd_ad1889_hw_free, 581 .prepare = snd_ad1889_playback_prepare, 582 .trigger = snd_ad1889_playback_trigger, 583 .pointer = snd_ad1889_playback_pointer, 584 }; 585 586 static struct snd_pcm_ops snd_ad1889_capture_ops = { 587 .open = snd_ad1889_capture_open, 588 .close = snd_ad1889_capture_close, 589 .ioctl = snd_pcm_lib_ioctl, 590 .hw_params = snd_ad1889_hw_params, 591 .hw_free = snd_ad1889_hw_free, 592 .prepare = snd_ad1889_capture_prepare, 593 .trigger = snd_ad1889_capture_trigger, 594 .pointer = snd_ad1889_capture_pointer, 595 }; 596 597 static irqreturn_t 598 snd_ad1889_interrupt(int irq, void *dev_id) 599 { 600 unsigned long st; 601 struct snd_ad1889 *chip = dev_id; 602 603 st = ad1889_readl(chip, AD_DMA_DISR); 604 605 /* clear ISR */ 606 ad1889_writel(chip, AD_DMA_DISR, st); 607 608 st &= AD_INTR_MASK; 609 610 if (unlikely(!st)) 611 return IRQ_NONE; 612 613 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI)) 614 dev_dbg(chip->card->dev, 615 "Unexpected master or target abort interrupt!\n"); 616 617 if ((st & AD_DMA_DISR_WAVI) && chip->psubs) 618 snd_pcm_period_elapsed(chip->psubs); 619 if ((st & AD_DMA_DISR_ADCI) && chip->csubs) 620 snd_pcm_period_elapsed(chip->csubs); 621 622 return IRQ_HANDLED; 623 } 624 625 static int 626 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device, struct snd_pcm **rpcm) 627 { 628 int err; 629 struct snd_pcm *pcm; 630 631 if (rpcm) 632 *rpcm = NULL; 633 634 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm); 635 if (err < 0) 636 return err; 637 638 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 639 &snd_ad1889_playback_ops); 640 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 641 &snd_ad1889_capture_ops); 642 643 pcm->private_data = chip; 644 pcm->info_flags = 0; 645 strcpy(pcm->name, chip->card->shortname); 646 647 chip->pcm = pcm; 648 chip->psubs = NULL; 649 chip->csubs = NULL; 650 651 err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 652 snd_dma_pci_data(chip->pci), 653 BUFFER_BYTES_MAX / 2, 654 BUFFER_BYTES_MAX); 655 656 if (err < 0) { 657 dev_err(chip->card->dev, "buffer allocation error: %d\n", err); 658 return err; 659 } 660 661 if (rpcm) 662 *rpcm = pcm; 663 664 return 0; 665 } 666 667 static void 668 snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 669 { 670 struct snd_ad1889 *chip = entry->private_data; 671 u16 reg; 672 int tmp; 673 674 reg = ad1889_readw(chip, AD_DS_WSMC); 675 snd_iprintf(buffer, "Wave output: %s\n", 676 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled"); 677 snd_iprintf(buffer, "Wave Channels: %s\n", 678 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 679 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n", 680 (reg & AD_DS_WSMC_WA16) ? 16 : 8); 681 682 /* WARQ is at offset 12 */ 683 tmp = (reg & AD_DS_WSMC_WARQ) ? 684 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4; 685 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 686 687 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp, 688 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 689 690 691 snd_iprintf(buffer, "Synthesis output: %s\n", 692 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled"); 693 694 /* SYRQ is at offset 4 */ 695 tmp = (reg & AD_DS_WSMC_SYRQ) ? 696 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4; 697 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 698 699 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp, 700 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 701 702 reg = ad1889_readw(chip, AD_DS_RAMC); 703 snd_iprintf(buffer, "ADC input: %s\n", 704 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled"); 705 snd_iprintf(buffer, "ADC Channels: %s\n", 706 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 707 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n", 708 (reg & AD_DS_RAMC_AD16) ? 16 : 8); 709 710 /* ACRQ is at offset 4 */ 711 tmp = (reg & AD_DS_RAMC_ACRQ) ? 712 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4; 713 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 714 715 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp, 716 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 717 718 snd_iprintf(buffer, "Resampler input: %s\n", 719 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled"); 720 721 /* RERQ is at offset 12 */ 722 tmp = (reg & AD_DS_RAMC_RERQ) ? 723 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4; 724 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 725 726 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp, 727 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 728 729 730 /* doc says LSB represents -1.5dB, but the max value (-94.5dB) 731 suggests that LSB is -3dB, which is more coherent with the logarithmic 732 nature of the dB scale */ 733 reg = ad1889_readw(chip, AD_DS_WADA); 734 snd_iprintf(buffer, "Left: %s, -%d dB\n", 735 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute", 736 ((reg & AD_DS_WADA_LWAA) >> 8) * 3); 737 reg = ad1889_readw(chip, AD_DS_WADA); 738 snd_iprintf(buffer, "Right: %s, -%d dB\n", 739 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute", 740 (reg & AD_DS_WADA_RWAA) * 3); 741 742 reg = ad1889_readw(chip, AD_DS_WAS); 743 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg); 744 reg = ad1889_readw(chip, AD_DS_RES); 745 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg); 746 } 747 748 static void 749 snd_ad1889_proc_init(struct snd_ad1889 *chip) 750 { 751 struct snd_info_entry *entry; 752 753 if (!snd_card_proc_new(chip->card, chip->card->driver, &entry)) 754 snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read); 755 } 756 757 static struct ac97_quirk ac97_quirks[] = { 758 { 759 .subvendor = 0x11d4, /* AD */ 760 .subdevice = 0x1889, /* AD1889 */ 761 .codec_id = AC97_ID_AD1819, 762 .name = "AD1889", 763 .type = AC97_TUNE_HP_ONLY 764 }, 765 { } /* terminator */ 766 }; 767 768 static void 769 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip) 770 { 771 u16 reg; 772 773 reg = ad1889_readw(chip, AD_AC97_ACIC); 774 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */ 775 ad1889_writew(chip, AD_AC97_ACIC, reg); 776 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 777 udelay(10); 778 /* Interface Enable */ 779 reg |= AD_AC97_ACIC_ACIE; 780 ad1889_writew(chip, AD_AC97_ACIC, reg); 781 782 snd_ad1889_ac97_ready(chip); 783 784 /* Audio Stream Output | Variable Sample Rate Mode */ 785 reg = ad1889_readw(chip, AD_AC97_ACIC); 786 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM; 787 ad1889_writew(chip, AD_AC97_ACIC, reg); 788 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 789 790 } 791 792 static void 793 snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus) 794 { 795 struct snd_ad1889 *chip = bus->private_data; 796 chip->ac97_bus = NULL; 797 } 798 799 static void 800 snd_ad1889_ac97_free(struct snd_ac97 *ac97) 801 { 802 struct snd_ad1889 *chip = ac97->private_data; 803 chip->ac97 = NULL; 804 } 805 806 static int 807 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override) 808 { 809 int err; 810 struct snd_ac97_template ac97; 811 static struct snd_ac97_bus_ops ops = { 812 .write = snd_ad1889_ac97_write, 813 .read = snd_ad1889_ac97_read, 814 }; 815 816 /* doing that here, it works. */ 817 snd_ad1889_ac97_xinit(chip); 818 819 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); 820 if (err < 0) 821 return err; 822 823 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free; 824 825 memset(&ac97, 0, sizeof(ac97)); 826 ac97.private_data = chip; 827 ac97.private_free = snd_ad1889_ac97_free; 828 ac97.pci = chip->pci; 829 830 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); 831 if (err < 0) 832 return err; 833 834 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); 835 836 return 0; 837 } 838 839 static int 840 snd_ad1889_free(struct snd_ad1889 *chip) 841 { 842 if (chip->irq < 0) 843 goto skip_hw; 844 845 spin_lock_irq(&chip->lock); 846 847 ad1889_mute(chip); 848 849 /* Turn off interrupt on count and zero DMA registers */ 850 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC); 851 852 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */ 853 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI); 854 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */ 855 856 spin_unlock_irq(&chip->lock); 857 858 if (chip->irq >= 0) 859 free_irq(chip->irq, chip); 860 861 skip_hw: 862 if (chip->iobase) 863 iounmap(chip->iobase); 864 865 pci_release_regions(chip->pci); 866 pci_disable_device(chip->pci); 867 868 kfree(chip); 869 return 0; 870 } 871 872 static int 873 snd_ad1889_dev_free(struct snd_device *device) 874 { 875 struct snd_ad1889 *chip = device->device_data; 876 return snd_ad1889_free(chip); 877 } 878 879 static int 880 snd_ad1889_init(struct snd_ad1889 *chip) 881 { 882 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */ 883 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */ 884 885 mdelay(10); 886 887 /* enable Master and Target abort interrupts */ 888 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE); 889 890 return 0; 891 } 892 893 static int 894 snd_ad1889_create(struct snd_card *card, 895 struct pci_dev *pci, 896 struct snd_ad1889 **rchip) 897 { 898 int err; 899 900 struct snd_ad1889 *chip; 901 static struct snd_device_ops ops = { 902 .dev_free = snd_ad1889_dev_free, 903 }; 904 905 *rchip = NULL; 906 907 if ((err = pci_enable_device(pci)) < 0) 908 return err; 909 910 /* check PCI availability (32bit DMA) */ 911 if (pci_set_dma_mask(pci, DMA_BIT_MASK(32)) < 0 || 912 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32)) < 0) { 913 dev_err(card->dev, "error setting 32-bit DMA mask.\n"); 914 pci_disable_device(pci); 915 return -ENXIO; 916 } 917 918 /* allocate chip specific data with zero-filled memory */ 919 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) { 920 pci_disable_device(pci); 921 return -ENOMEM; 922 } 923 924 chip->card = card; 925 card->private_data = chip; 926 chip->pci = pci; 927 chip->irq = -1; 928 929 /* (1) PCI resource allocation */ 930 if ((err = pci_request_regions(pci, card->driver)) < 0) 931 goto free_and_ret; 932 933 chip->bar = pci_resource_start(pci, 0); 934 chip->iobase = pci_ioremap_bar(pci, 0); 935 if (chip->iobase == NULL) { 936 dev_err(card->dev, "unable to reserve region.\n"); 937 err = -EBUSY; 938 goto free_and_ret; 939 } 940 941 pci_set_master(pci); 942 943 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */ 944 945 if (request_irq(pci->irq, snd_ad1889_interrupt, 946 IRQF_SHARED, KBUILD_MODNAME, chip)) { 947 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq); 948 snd_ad1889_free(chip); 949 return -EBUSY; 950 } 951 952 chip->irq = pci->irq; 953 synchronize_irq(chip->irq); 954 955 /* (2) initialization of the chip hardware */ 956 if ((err = snd_ad1889_init(chip)) < 0) { 957 snd_ad1889_free(chip); 958 return err; 959 } 960 961 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 962 snd_ad1889_free(chip); 963 return err; 964 } 965 966 *rchip = chip; 967 968 return 0; 969 970 free_and_ret: 971 kfree(chip); 972 pci_disable_device(pci); 973 974 return err; 975 } 976 977 static int 978 snd_ad1889_probe(struct pci_dev *pci, 979 const struct pci_device_id *pci_id) 980 { 981 int err; 982 static int devno; 983 struct snd_card *card; 984 struct snd_ad1889 *chip; 985 986 /* (1) */ 987 if (devno >= SNDRV_CARDS) 988 return -ENODEV; 989 if (!enable[devno]) { 990 devno++; 991 return -ENOENT; 992 } 993 994 /* (2) */ 995 err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE, 996 0, &card); 997 /* XXX REVISIT: we can probably allocate chip in this call */ 998 if (err < 0) 999 return err; 1000 1001 strcpy(card->driver, "AD1889"); 1002 strcpy(card->shortname, "Analog Devices AD1889"); 1003 1004 /* (3) */ 1005 err = snd_ad1889_create(card, pci, &chip); 1006 if (err < 0) 1007 goto free_and_ret; 1008 1009 /* (4) */ 1010 sprintf(card->longname, "%s at 0x%lx irq %i", 1011 card->shortname, chip->bar, chip->irq); 1012 1013 /* (5) */ 1014 /* register AC97 mixer */ 1015 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]); 1016 if (err < 0) 1017 goto free_and_ret; 1018 1019 err = snd_ad1889_pcm_init(chip, 0, NULL); 1020 if (err < 0) 1021 goto free_and_ret; 1022 1023 /* register proc interface */ 1024 snd_ad1889_proc_init(chip); 1025 1026 /* (6) */ 1027 err = snd_card_register(card); 1028 if (err < 0) 1029 goto free_and_ret; 1030 1031 /* (7) */ 1032 pci_set_drvdata(pci, card); 1033 1034 devno++; 1035 return 0; 1036 1037 free_and_ret: 1038 snd_card_free(card); 1039 return err; 1040 } 1041 1042 static void 1043 snd_ad1889_remove(struct pci_dev *pci) 1044 { 1045 snd_card_free(pci_get_drvdata(pci)); 1046 } 1047 1048 static const struct pci_device_id snd_ad1889_ids[] = { 1049 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) }, 1050 { 0, }, 1051 }; 1052 MODULE_DEVICE_TABLE(pci, snd_ad1889_ids); 1053 1054 static struct pci_driver ad1889_pci_driver = { 1055 .name = KBUILD_MODNAME, 1056 .id_table = snd_ad1889_ids, 1057 .probe = snd_ad1889_probe, 1058 .remove = snd_ad1889_remove, 1059 }; 1060 1061 module_pci_driver(ad1889_pci_driver); 1062