xref: /openbmc/linux/sound/pci/ad1889.c (revision 65ee8aeb)
1 /* Analog Devices 1889 audio driver
2  *
3  * This is a driver for the AD1889 PCI audio chipset found
4  * on the HP PA-RISC [BCJ]-xxx0 workstations.
5  *
6  * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
7  * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
8  *   Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License, version 2, as
12  * published by the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  *
23  * TODO:
24  *	Do we need to take care of CCS register?
25  *	Maybe we could use finer grained locking (separate locks for pb/cap)?
26  * Wishlist:
27  *	Control Interface (mixer) support
28  *	Better AC97 support (VSR...)?
29  *	PM support
30  *	MIDI support
31  *	Game Port support
32  *	SG DMA support (this will need *a lot* of work)
33  */
34 
35 #include <linux/init.h>
36 #include <linux/pci.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/slab.h>
39 #include <linux/interrupt.h>
40 #include <linux/compiler.h>
41 #include <linux/delay.h>
42 #include <linux/module.h>
43 #include <linux/io.h>
44 
45 #include <sound/core.h>
46 #include <sound/pcm.h>
47 #include <sound/initval.h>
48 #include <sound/ac97_codec.h>
49 
50 #include "ad1889.h"
51 #include "ac97/ac97_id.h"
52 
53 #define	AD1889_DRVVER	"Version: 1.7"
54 
55 MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
56 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
57 MODULE_LICENSE("GPL");
58 MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
59 
60 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
61 module_param_array(index, int, NULL, 0444);
62 MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
63 
64 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
65 module_param_array(id, charp, NULL, 0444);
66 MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
67 
68 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
69 module_param_array(enable, bool, NULL, 0444);
70 MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
71 
72 static char *ac97_quirk[SNDRV_CARDS];
73 module_param_array(ac97_quirk, charp, NULL, 0444);
74 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
75 
76 #define DEVNAME "ad1889"
77 #define PFX	DEVNAME ": "
78 
79 /* keep track of some hw registers */
80 struct ad1889_register_state {
81 	u16 reg;	/* reg setup */
82 	u32 addr;	/* dma base address */
83 	unsigned long size;	/* DMA buffer size */
84 };
85 
86 struct snd_ad1889 {
87 	struct snd_card *card;
88 	struct pci_dev *pci;
89 
90 	int irq;
91 	unsigned long bar;
92 	void __iomem *iobase;
93 
94 	struct snd_ac97 *ac97;
95 	struct snd_ac97_bus *ac97_bus;
96 	struct snd_pcm *pcm;
97 	struct snd_info_entry *proc;
98 
99 	struct snd_pcm_substream *psubs;
100 	struct snd_pcm_substream *csubs;
101 
102 	/* playback register state */
103 	struct ad1889_register_state wave;
104 	struct ad1889_register_state ramc;
105 
106 	spinlock_t lock;
107 };
108 
109 static inline u16
110 ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
111 {
112 	return readw(chip->iobase + reg);
113 }
114 
115 static inline void
116 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
117 {
118 	writew(val, chip->iobase + reg);
119 }
120 
121 static inline u32
122 ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
123 {
124 	return readl(chip->iobase + reg);
125 }
126 
127 static inline void
128 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
129 {
130 	writel(val, chip->iobase + reg);
131 }
132 
133 static inline void
134 ad1889_unmute(struct snd_ad1889 *chip)
135 {
136 	u16 st;
137 	st = ad1889_readw(chip, AD_DS_WADA) &
138 		~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
139 	ad1889_writew(chip, AD_DS_WADA, st);
140 	ad1889_readw(chip, AD_DS_WADA);
141 }
142 
143 static inline void
144 ad1889_mute(struct snd_ad1889 *chip)
145 {
146 	u16 st;
147 	st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
148 	ad1889_writew(chip, AD_DS_WADA, st);
149 	ad1889_readw(chip, AD_DS_WADA);
150 }
151 
152 static inline void
153 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
154 {
155 	ad1889_writel(chip, AD_DMA_ADCBA, address);
156 	ad1889_writel(chip, AD_DMA_ADCCA, address);
157 }
158 
159 static inline void
160 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
161 {
162 	ad1889_writel(chip, AD_DMA_ADCBC, count);
163 	ad1889_writel(chip, AD_DMA_ADCCC, count);
164 }
165 
166 static inline void
167 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
168 {
169 	ad1889_writel(chip, AD_DMA_ADCIB, count);
170 	ad1889_writel(chip, AD_DMA_ADCIC, count);
171 }
172 
173 static inline void
174 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
175 {
176 	ad1889_writel(chip, AD_DMA_WAVBA, address);
177 	ad1889_writel(chip, AD_DMA_WAVCA, address);
178 }
179 
180 static inline void
181 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
182 {
183 	ad1889_writel(chip, AD_DMA_WAVBC, count);
184 	ad1889_writel(chip, AD_DMA_WAVCC, count);
185 }
186 
187 static inline void
188 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
189 {
190 	ad1889_writel(chip, AD_DMA_WAVIB, count);
191 	ad1889_writel(chip, AD_DMA_WAVIC, count);
192 }
193 
194 static void
195 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
196 {
197 	u16 reg;
198 
199 	if (channel & AD_CHAN_WAV) {
200 		/* Disable wave channel */
201 		reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
202 		ad1889_writew(chip, AD_DS_WSMC, reg);
203 		chip->wave.reg = reg;
204 
205 		/* disable IRQs */
206 		reg = ad1889_readw(chip, AD_DMA_WAV);
207 		reg &= AD_DMA_IM_DIS;
208 		reg &= ~AD_DMA_LOOP;
209 		ad1889_writew(chip, AD_DMA_WAV, reg);
210 
211 		/* clear IRQ and address counters and pointers */
212 		ad1889_load_wave_buffer_address(chip, 0x0);
213 		ad1889_load_wave_buffer_count(chip, 0x0);
214 		ad1889_load_wave_interrupt_count(chip, 0x0);
215 
216 		/* flush */
217 		ad1889_readw(chip, AD_DMA_WAV);
218 	}
219 
220 	if (channel & AD_CHAN_ADC) {
221 		/* Disable ADC channel */
222 		reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
223 		ad1889_writew(chip, AD_DS_RAMC, reg);
224 		chip->ramc.reg = reg;
225 
226 		reg = ad1889_readw(chip, AD_DMA_ADC);
227 		reg &= AD_DMA_IM_DIS;
228 		reg &= ~AD_DMA_LOOP;
229 		ad1889_writew(chip, AD_DMA_ADC, reg);
230 
231 		ad1889_load_adc_buffer_address(chip, 0x0);
232 		ad1889_load_adc_buffer_count(chip, 0x0);
233 		ad1889_load_adc_interrupt_count(chip, 0x0);
234 
235 		/* flush */
236 		ad1889_readw(chip, AD_DMA_ADC);
237 	}
238 }
239 
240 static u16
241 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
242 {
243 	struct snd_ad1889 *chip = ac97->private_data;
244 	return ad1889_readw(chip, AD_AC97_BASE + reg);
245 }
246 
247 static void
248 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
249 {
250 	struct snd_ad1889 *chip = ac97->private_data;
251 	ad1889_writew(chip, AD_AC97_BASE + reg, val);
252 }
253 
254 static int
255 snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
256 {
257 	int retry = 400; /* average needs 352 msec */
258 
259 	while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
260 			&& --retry)
261 		mdelay(1);
262 	if (!retry) {
263 		dev_err(chip->card->dev, "[%s] Link is not ready.\n",
264 			__func__);
265 		return -EIO;
266 	}
267 	dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry);
268 
269 	return 0;
270 }
271 
272 static int
273 snd_ad1889_hw_params(struct snd_pcm_substream *substream,
274 			struct snd_pcm_hw_params *hw_params)
275 {
276 	return snd_pcm_lib_malloc_pages(substream,
277 					params_buffer_bytes(hw_params));
278 }
279 
280 static int
281 snd_ad1889_hw_free(struct snd_pcm_substream *substream)
282 {
283 	return snd_pcm_lib_free_pages(substream);
284 }
285 
286 static struct snd_pcm_hardware snd_ad1889_playback_hw = {
287 	.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
288 		SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
289 	.formats = SNDRV_PCM_FMTBIT_S16_LE,
290 	.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
291 	.rate_min = 8000,	/* docs say 7000, but we're lazy */
292 	.rate_max = 48000,
293 	.channels_min = 1,
294 	.channels_max = 2,
295 	.buffer_bytes_max = BUFFER_BYTES_MAX,
296 	.period_bytes_min = PERIOD_BYTES_MIN,
297 	.period_bytes_max = PERIOD_BYTES_MAX,
298 	.periods_min = PERIODS_MIN,
299 	.periods_max = PERIODS_MAX,
300 	/*.fifo_size = 0,*/
301 };
302 
303 static struct snd_pcm_hardware snd_ad1889_capture_hw = {
304 	.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
305 		SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
306 	.formats = SNDRV_PCM_FMTBIT_S16_LE,
307 	.rates = SNDRV_PCM_RATE_48000,
308 	.rate_min = 48000,	/* docs say we could to VSR, but we're lazy */
309 	.rate_max = 48000,
310 	.channels_min = 1,
311 	.channels_max = 2,
312 	.buffer_bytes_max = BUFFER_BYTES_MAX,
313 	.period_bytes_min = PERIOD_BYTES_MIN,
314 	.period_bytes_max = PERIOD_BYTES_MAX,
315 	.periods_min = PERIODS_MIN,
316 	.periods_max = PERIODS_MAX,
317 	/*.fifo_size = 0,*/
318 };
319 
320 static int
321 snd_ad1889_playback_open(struct snd_pcm_substream *ss)
322 {
323 	struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
324 	struct snd_pcm_runtime *rt = ss->runtime;
325 
326 	chip->psubs = ss;
327 	rt->hw = snd_ad1889_playback_hw;
328 
329 	return 0;
330 }
331 
332 static int
333 snd_ad1889_capture_open(struct snd_pcm_substream *ss)
334 {
335 	struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
336 	struct snd_pcm_runtime *rt = ss->runtime;
337 
338 	chip->csubs = ss;
339 	rt->hw = snd_ad1889_capture_hw;
340 
341 	return 0;
342 }
343 
344 static int
345 snd_ad1889_playback_close(struct snd_pcm_substream *ss)
346 {
347 	struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
348 	chip->psubs = NULL;
349 	return 0;
350 }
351 
352 static int
353 snd_ad1889_capture_close(struct snd_pcm_substream *ss)
354 {
355 	struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
356 	chip->csubs = NULL;
357 	return 0;
358 }
359 
360 static int
361 snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
362 {
363 	struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
364 	struct snd_pcm_runtime *rt = ss->runtime;
365 	unsigned int size = snd_pcm_lib_buffer_bytes(ss);
366 	unsigned int count = snd_pcm_lib_period_bytes(ss);
367 	u16 reg;
368 
369 	ad1889_channel_reset(chip, AD_CHAN_WAV);
370 
371 	reg = ad1889_readw(chip, AD_DS_WSMC);
372 
373 	/* Mask out 16-bit / Stereo */
374 	reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
375 
376 	if (snd_pcm_format_width(rt->format) == 16)
377 		reg |= AD_DS_WSMC_WA16;
378 
379 	if (rt->channels > 1)
380 		reg |= AD_DS_WSMC_WAST;
381 
382 	/* let's make sure we don't clobber ourselves */
383 	spin_lock_irq(&chip->lock);
384 
385 	chip->wave.size = size;
386 	chip->wave.reg = reg;
387 	chip->wave.addr = rt->dma_addr;
388 
389 	ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
390 
391 	/* Set sample rates on the codec */
392 	ad1889_writew(chip, AD_DS_WAS, rt->rate);
393 
394 	/* Set up DMA */
395 	ad1889_load_wave_buffer_address(chip, chip->wave.addr);
396 	ad1889_load_wave_buffer_count(chip, size);
397 	ad1889_load_wave_interrupt_count(chip, count);
398 
399 	/* writes flush */
400 	ad1889_readw(chip, AD_DS_WSMC);
401 
402 	spin_unlock_irq(&chip->lock);
403 
404 	dev_dbg(chip->card->dev,
405 		"prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
406 		chip->wave.addr, count, size, reg, rt->rate);
407 	return 0;
408 }
409 
410 static int
411 snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
412 {
413 	struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
414 	struct snd_pcm_runtime *rt = ss->runtime;
415 	unsigned int size = snd_pcm_lib_buffer_bytes(ss);
416 	unsigned int count = snd_pcm_lib_period_bytes(ss);
417 	u16 reg;
418 
419 	ad1889_channel_reset(chip, AD_CHAN_ADC);
420 
421 	reg = ad1889_readw(chip, AD_DS_RAMC);
422 
423 	/* Mask out 16-bit / Stereo */
424 	reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
425 
426 	if (snd_pcm_format_width(rt->format) == 16)
427 		reg |= AD_DS_RAMC_AD16;
428 
429 	if (rt->channels > 1)
430 		reg |= AD_DS_RAMC_ADST;
431 
432 	/* let's make sure we don't clobber ourselves */
433 	spin_lock_irq(&chip->lock);
434 
435 	chip->ramc.size = size;
436 	chip->ramc.reg = reg;
437 	chip->ramc.addr = rt->dma_addr;
438 
439 	ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
440 
441 	/* Set up DMA */
442 	ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
443 	ad1889_load_adc_buffer_count(chip, size);
444 	ad1889_load_adc_interrupt_count(chip, count);
445 
446 	/* writes flush */
447 	ad1889_readw(chip, AD_DS_RAMC);
448 
449 	spin_unlock_irq(&chip->lock);
450 
451 	dev_dbg(chip->card->dev,
452 		"prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
453 		chip->ramc.addr, count, size, reg, rt->rate);
454 	return 0;
455 }
456 
457 /* this is called in atomic context with IRQ disabled.
458    Must be as fast as possible and not sleep.
459    DMA should be *triggered* by this call.
460    The WSMC "WAEN" bit triggers DMA Wave On/Off */
461 static int
462 snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
463 {
464 	u16 wsmc;
465 	struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
466 
467 	wsmc = ad1889_readw(chip, AD_DS_WSMC);
468 
469 	switch (cmd) {
470 	case SNDRV_PCM_TRIGGER_START:
471 		/* enable DMA loop & interrupts */
472 		ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
473 		wsmc |= AD_DS_WSMC_WAEN;
474 		/* 1 to clear CHSS bit */
475 		ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
476 		ad1889_unmute(chip);
477 		break;
478 	case SNDRV_PCM_TRIGGER_STOP:
479 		ad1889_mute(chip);
480 		wsmc &= ~AD_DS_WSMC_WAEN;
481 		break;
482 	default:
483 		snd_BUG();
484 		return -EINVAL;
485 	}
486 
487 	chip->wave.reg = wsmc;
488 	ad1889_writew(chip, AD_DS_WSMC, wsmc);
489 	ad1889_readw(chip, AD_DS_WSMC);	/* flush */
490 
491 	/* reset the chip when STOP - will disable IRQs */
492 	if (cmd == SNDRV_PCM_TRIGGER_STOP)
493 		ad1889_channel_reset(chip, AD_CHAN_WAV);
494 
495 	return 0;
496 }
497 
498 /* this is called in atomic context with IRQ disabled.
499    Must be as fast as possible and not sleep.
500    DMA should be *triggered* by this call.
501    The RAMC "ADEN" bit triggers DMA ADC On/Off */
502 static int
503 snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
504 {
505 	u16 ramc;
506 	struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
507 
508 	ramc = ad1889_readw(chip, AD_DS_RAMC);
509 
510 	switch (cmd) {
511 	case SNDRV_PCM_TRIGGER_START:
512 		/* enable DMA loop & interrupts */
513 		ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
514 		ramc |= AD_DS_RAMC_ADEN;
515 		/* 1 to clear CHSS bit */
516 		ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
517 		break;
518 	case SNDRV_PCM_TRIGGER_STOP:
519 		ramc &= ~AD_DS_RAMC_ADEN;
520 		break;
521 	default:
522 		return -EINVAL;
523 	}
524 
525 	chip->ramc.reg = ramc;
526 	ad1889_writew(chip, AD_DS_RAMC, ramc);
527 	ad1889_readw(chip, AD_DS_RAMC);	/* flush */
528 
529 	/* reset the chip when STOP - will disable IRQs */
530 	if (cmd == SNDRV_PCM_TRIGGER_STOP)
531 		ad1889_channel_reset(chip, AD_CHAN_ADC);
532 
533 	return 0;
534 }
535 
536 /* Called in atomic context with IRQ disabled */
537 static snd_pcm_uframes_t
538 snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
539 {
540 	size_t ptr = 0;
541 	struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
542 
543 	if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
544 		return 0;
545 
546 	ptr = ad1889_readl(chip, AD_DMA_WAVCA);
547 	ptr -= chip->wave.addr;
548 
549 	if (snd_BUG_ON(ptr >= chip->wave.size))
550 		return 0;
551 
552 	return bytes_to_frames(ss->runtime, ptr);
553 }
554 
555 /* Called in atomic context with IRQ disabled */
556 static snd_pcm_uframes_t
557 snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
558 {
559 	size_t ptr = 0;
560 	struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
561 
562 	if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
563 		return 0;
564 
565 	ptr = ad1889_readl(chip, AD_DMA_ADCCA);
566 	ptr -= chip->ramc.addr;
567 
568 	if (snd_BUG_ON(ptr >= chip->ramc.size))
569 		return 0;
570 
571 	return bytes_to_frames(ss->runtime, ptr);
572 }
573 
574 static struct snd_pcm_ops snd_ad1889_playback_ops = {
575 	.open = snd_ad1889_playback_open,
576 	.close = snd_ad1889_playback_close,
577 	.ioctl = snd_pcm_lib_ioctl,
578 	.hw_params = snd_ad1889_hw_params,
579 	.hw_free = snd_ad1889_hw_free,
580 	.prepare = snd_ad1889_playback_prepare,
581 	.trigger = snd_ad1889_playback_trigger,
582 	.pointer = snd_ad1889_playback_pointer,
583 };
584 
585 static struct snd_pcm_ops snd_ad1889_capture_ops = {
586 	.open = snd_ad1889_capture_open,
587 	.close = snd_ad1889_capture_close,
588 	.ioctl = snd_pcm_lib_ioctl,
589 	.hw_params = snd_ad1889_hw_params,
590 	.hw_free = snd_ad1889_hw_free,
591 	.prepare = snd_ad1889_capture_prepare,
592 	.trigger = snd_ad1889_capture_trigger,
593 	.pointer = snd_ad1889_capture_pointer,
594 };
595 
596 static irqreturn_t
597 snd_ad1889_interrupt(int irq, void *dev_id)
598 {
599 	unsigned long st;
600 	struct snd_ad1889 *chip = dev_id;
601 
602 	st = ad1889_readl(chip, AD_DMA_DISR);
603 
604 	/* clear ISR */
605 	ad1889_writel(chip, AD_DMA_DISR, st);
606 
607 	st &= AD_INTR_MASK;
608 
609 	if (unlikely(!st))
610 		return IRQ_NONE;
611 
612 	if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
613 		dev_dbg(chip->card->dev,
614 			"Unexpected master or target abort interrupt!\n");
615 
616 	if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
617 		snd_pcm_period_elapsed(chip->psubs);
618 	if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
619 		snd_pcm_period_elapsed(chip->csubs);
620 
621 	return IRQ_HANDLED;
622 }
623 
624 static int
625 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device)
626 {
627 	int err;
628 	struct snd_pcm *pcm;
629 
630 	err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
631 	if (err < 0)
632 		return err;
633 
634 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
635 			&snd_ad1889_playback_ops);
636 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
637 			&snd_ad1889_capture_ops);
638 
639 	pcm->private_data = chip;
640 	pcm->info_flags = 0;
641 	strcpy(pcm->name, chip->card->shortname);
642 
643 	chip->pcm = pcm;
644 	chip->psubs = NULL;
645 	chip->csubs = NULL;
646 
647 	err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
648 						snd_dma_pci_data(chip->pci),
649 						BUFFER_BYTES_MAX / 2,
650 						BUFFER_BYTES_MAX);
651 
652 	if (err < 0) {
653 		dev_err(chip->card->dev, "buffer allocation error: %d\n", err);
654 		return err;
655 	}
656 
657 	return 0;
658 }
659 
660 static void
661 snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
662 {
663 	struct snd_ad1889 *chip = entry->private_data;
664 	u16 reg;
665 	int tmp;
666 
667 	reg = ad1889_readw(chip, AD_DS_WSMC);
668 	snd_iprintf(buffer, "Wave output: %s\n",
669 			(reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
670 	snd_iprintf(buffer, "Wave Channels: %s\n",
671 			(reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
672 	snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
673 			(reg & AD_DS_WSMC_WA16) ? 16 : 8);
674 
675 	/* WARQ is at offset 12 */
676 	tmp = (reg & AD_DS_WSMC_WARQ) ?
677 		((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4;
678 	tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
679 
680 	snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
681 			(reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
682 
683 
684 	snd_iprintf(buffer, "Synthesis output: %s\n",
685 			reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
686 
687 	/* SYRQ is at offset 4 */
688 	tmp = (reg & AD_DS_WSMC_SYRQ) ?
689 		((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4;
690 	tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
691 
692 	snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
693 			(reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
694 
695 	reg = ad1889_readw(chip, AD_DS_RAMC);
696 	snd_iprintf(buffer, "ADC input: %s\n",
697 			(reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
698 	snd_iprintf(buffer, "ADC Channels: %s\n",
699 			(reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
700 	snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
701 			(reg & AD_DS_RAMC_AD16) ? 16 : 8);
702 
703 	/* ACRQ is at offset 4 */
704 	tmp = (reg & AD_DS_RAMC_ACRQ) ?
705 		((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4;
706 	tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
707 
708 	snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
709 			(reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
710 
711 	snd_iprintf(buffer, "Resampler input: %s\n",
712 			reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
713 
714 	/* RERQ is at offset 12 */
715 	tmp = (reg & AD_DS_RAMC_RERQ) ?
716 		((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4;
717 	tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
718 
719 	snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
720 			(reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
721 
722 
723 	/* doc says LSB represents -1.5dB, but the max value (-94.5dB)
724 	suggests that LSB is -3dB, which is more coherent with the logarithmic
725 	nature of the dB scale */
726 	reg = ad1889_readw(chip, AD_DS_WADA);
727 	snd_iprintf(buffer, "Left: %s, -%d dB\n",
728 			(reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
729 			((reg & AD_DS_WADA_LWAA) >> 8) * 3);
730 	reg = ad1889_readw(chip, AD_DS_WADA);
731 	snd_iprintf(buffer, "Right: %s, -%d dB\n",
732 			(reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
733 			(reg & AD_DS_WADA_RWAA) * 3);
734 
735 	reg = ad1889_readw(chip, AD_DS_WAS);
736 	snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
737 	reg = ad1889_readw(chip, AD_DS_RES);
738 	snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
739 }
740 
741 static void
742 snd_ad1889_proc_init(struct snd_ad1889 *chip)
743 {
744 	struct snd_info_entry *entry;
745 
746 	if (!snd_card_proc_new(chip->card, chip->card->driver, &entry))
747 		snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read);
748 }
749 
750 static const struct ac97_quirk ac97_quirks[] = {
751 	{
752 		.subvendor = 0x11d4,	/* AD */
753 		.subdevice = 0x1889,	/* AD1889 */
754 		.codec_id = AC97_ID_AD1819,
755 		.name = "AD1889",
756 		.type = AC97_TUNE_HP_ONLY
757 	},
758 	{ } /* terminator */
759 };
760 
761 static void
762 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
763 {
764 	u16 reg;
765 
766 	reg = ad1889_readw(chip, AD_AC97_ACIC);
767 	reg |= AD_AC97_ACIC_ACRD;		/* Reset Disable */
768 	ad1889_writew(chip, AD_AC97_ACIC, reg);
769 	ad1889_readw(chip, AD_AC97_ACIC);	/* flush posted write */
770 	udelay(10);
771 	/* Interface Enable */
772 	reg |= AD_AC97_ACIC_ACIE;
773 	ad1889_writew(chip, AD_AC97_ACIC, reg);
774 
775 	snd_ad1889_ac97_ready(chip);
776 
777 	/* Audio Stream Output | Variable Sample Rate Mode */
778 	reg = ad1889_readw(chip, AD_AC97_ACIC);
779 	reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
780 	ad1889_writew(chip, AD_AC97_ACIC, reg);
781 	ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
782 
783 }
784 
785 static void
786 snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
787 {
788 	struct snd_ad1889 *chip = bus->private_data;
789 	chip->ac97_bus = NULL;
790 }
791 
792 static void
793 snd_ad1889_ac97_free(struct snd_ac97 *ac97)
794 {
795 	struct snd_ad1889 *chip = ac97->private_data;
796 	chip->ac97 = NULL;
797 }
798 
799 static int
800 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
801 {
802 	int err;
803 	struct snd_ac97_template ac97;
804 	static struct snd_ac97_bus_ops ops = {
805 		.write = snd_ad1889_ac97_write,
806 		.read = snd_ad1889_ac97_read,
807 	};
808 
809 	/* doing that here, it works. */
810 	snd_ad1889_ac97_xinit(chip);
811 
812 	err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
813 	if (err < 0)
814 		return err;
815 
816 	chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
817 
818 	memset(&ac97, 0, sizeof(ac97));
819 	ac97.private_data = chip;
820 	ac97.private_free = snd_ad1889_ac97_free;
821 	ac97.pci = chip->pci;
822 
823 	err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
824 	if (err < 0)
825 		return err;
826 
827 	snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
828 
829 	return 0;
830 }
831 
832 static int
833 snd_ad1889_free(struct snd_ad1889 *chip)
834 {
835 	if (chip->irq < 0)
836 		goto skip_hw;
837 
838 	spin_lock_irq(&chip->lock);
839 
840 	ad1889_mute(chip);
841 
842 	/* Turn off interrupt on count and zero DMA registers */
843 	ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
844 
845 	/* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
846 	ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
847 	ad1889_readl(chip, AD_DMA_DISR);	/* flush, dammit! */
848 
849 	spin_unlock_irq(&chip->lock);
850 
851 	if (chip->irq >= 0)
852 		free_irq(chip->irq, chip);
853 
854 skip_hw:
855 	iounmap(chip->iobase);
856 	pci_release_regions(chip->pci);
857 	pci_disable_device(chip->pci);
858 	kfree(chip);
859 	return 0;
860 }
861 
862 static int
863 snd_ad1889_dev_free(struct snd_device *device)
864 {
865 	struct snd_ad1889 *chip = device->device_data;
866 	return snd_ad1889_free(chip);
867 }
868 
869 static int
870 snd_ad1889_init(struct snd_ad1889 *chip)
871 {
872 	ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
873 	ad1889_readw(chip, AD_DS_CCS);	/* flush posted write */
874 
875 	mdelay(10);
876 
877 	/* enable Master and Target abort interrupts */
878 	ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
879 
880 	return 0;
881 }
882 
883 static int
884 snd_ad1889_create(struct snd_card *card,
885 		  struct pci_dev *pci,
886 		  struct snd_ad1889 **rchip)
887 {
888 	int err;
889 
890 	struct snd_ad1889 *chip;
891 	static struct snd_device_ops ops = {
892 		.dev_free = snd_ad1889_dev_free,
893 	};
894 
895 	*rchip = NULL;
896 
897 	if ((err = pci_enable_device(pci)) < 0)
898 		return err;
899 
900 	/* check PCI availability (32bit DMA) */
901 	if (pci_set_dma_mask(pci, DMA_BIT_MASK(32)) < 0 ||
902 	    pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32)) < 0) {
903 		dev_err(card->dev, "error setting 32-bit DMA mask.\n");
904 		pci_disable_device(pci);
905 		return -ENXIO;
906 	}
907 
908 	/* allocate chip specific data with zero-filled memory */
909 	if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
910 		pci_disable_device(pci);
911 		return -ENOMEM;
912 	}
913 
914 	chip->card = card;
915 	card->private_data = chip;
916 	chip->pci = pci;
917 	chip->irq = -1;
918 
919 	/* (1) PCI resource allocation */
920 	if ((err = pci_request_regions(pci, card->driver)) < 0)
921 		goto free_and_ret;
922 
923 	chip->bar = pci_resource_start(pci, 0);
924 	chip->iobase = pci_ioremap_bar(pci, 0);
925 	if (chip->iobase == NULL) {
926 		dev_err(card->dev, "unable to reserve region.\n");
927 		err = -EBUSY;
928 		goto free_and_ret;
929 	}
930 
931 	pci_set_master(pci);
932 
933 	spin_lock_init(&chip->lock);	/* only now can we call ad1889_free */
934 
935 	if (request_irq(pci->irq, snd_ad1889_interrupt,
936 			IRQF_SHARED, KBUILD_MODNAME, chip)) {
937 		dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq);
938 		snd_ad1889_free(chip);
939 		return -EBUSY;
940 	}
941 
942 	chip->irq = pci->irq;
943 	synchronize_irq(chip->irq);
944 
945 	/* (2) initialization of the chip hardware */
946 	if ((err = snd_ad1889_init(chip)) < 0) {
947 		snd_ad1889_free(chip);
948 		return err;
949 	}
950 
951 	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
952 		snd_ad1889_free(chip);
953 		return err;
954 	}
955 
956 	*rchip = chip;
957 
958 	return 0;
959 
960 free_and_ret:
961 	kfree(chip);
962 	pci_disable_device(pci);
963 
964 	return err;
965 }
966 
967 static int
968 snd_ad1889_probe(struct pci_dev *pci,
969 		 const struct pci_device_id *pci_id)
970 {
971 	int err;
972 	static int devno;
973 	struct snd_card *card;
974 	struct snd_ad1889 *chip;
975 
976 	/* (1) */
977 	if (devno >= SNDRV_CARDS)
978 		return -ENODEV;
979 	if (!enable[devno]) {
980 		devno++;
981 		return -ENOENT;
982 	}
983 
984 	/* (2) */
985 	err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE,
986 			   0, &card);
987 	/* XXX REVISIT: we can probably allocate chip in this call */
988 	if (err < 0)
989 		return err;
990 
991 	strcpy(card->driver, "AD1889");
992 	strcpy(card->shortname, "Analog Devices AD1889");
993 
994 	/* (3) */
995 	err = snd_ad1889_create(card, pci, &chip);
996 	if (err < 0)
997 		goto free_and_ret;
998 
999 	/* (4) */
1000 	sprintf(card->longname, "%s at 0x%lx irq %i",
1001 		card->shortname, chip->bar, chip->irq);
1002 
1003 	/* (5) */
1004 	/* register AC97 mixer */
1005 	err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
1006 	if (err < 0)
1007 		goto free_and_ret;
1008 
1009 	err = snd_ad1889_pcm_init(chip, 0);
1010 	if (err < 0)
1011 		goto free_and_ret;
1012 
1013 	/* register proc interface */
1014 	snd_ad1889_proc_init(chip);
1015 
1016 	/* (6) */
1017 	err = snd_card_register(card);
1018 	if (err < 0)
1019 		goto free_and_ret;
1020 
1021 	/* (7) */
1022 	pci_set_drvdata(pci, card);
1023 
1024 	devno++;
1025 	return 0;
1026 
1027 free_and_ret:
1028 	snd_card_free(card);
1029 	return err;
1030 }
1031 
1032 static void
1033 snd_ad1889_remove(struct pci_dev *pci)
1034 {
1035 	snd_card_free(pci_get_drvdata(pci));
1036 }
1037 
1038 static const struct pci_device_id snd_ad1889_ids[] = {
1039 	{ PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
1040 	{ 0, },
1041 };
1042 MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
1043 
1044 static struct pci_driver ad1889_pci_driver = {
1045 	.name = KBUILD_MODNAME,
1046 	.id_table = snd_ad1889_ids,
1047 	.probe = snd_ad1889_probe,
1048 	.remove = snd_ad1889_remove,
1049 };
1050 
1051 module_pci_driver(ad1889_pci_driver);
1052