1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Analog Devices 1889 audio driver 3 * 4 * This is a driver for the AD1889 PCI audio chipset found 5 * on the HP PA-RISC [BCJ]-xxx0 workstations. 6 * 7 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org> 8 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org> 9 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org> 10 * 11 * TODO: 12 * Do we need to take care of CCS register? 13 * Maybe we could use finer grained locking (separate locks for pb/cap)? 14 * Wishlist: 15 * Control Interface (mixer) support 16 * Better AC97 support (VSR...)? 17 * PM support 18 * MIDI support 19 * Game Port support 20 * SG DMA support (this will need *a lot* of work) 21 */ 22 23 #include <linux/init.h> 24 #include <linux/pci.h> 25 #include <linux/dma-mapping.h> 26 #include <linux/slab.h> 27 #include <linux/interrupt.h> 28 #include <linux/compiler.h> 29 #include <linux/delay.h> 30 #include <linux/module.h> 31 #include <linux/io.h> 32 33 #include <sound/core.h> 34 #include <sound/pcm.h> 35 #include <sound/initval.h> 36 #include <sound/ac97_codec.h> 37 38 #include "ad1889.h" 39 #include "ac97/ac97_id.h" 40 41 #define AD1889_DRVVER "Version: 1.7" 42 43 MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>"); 44 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver"); 45 MODULE_LICENSE("GPL"); 46 MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}"); 47 48 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 49 module_param_array(index, int, NULL, 0444); 50 MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard."); 51 52 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 53 module_param_array(id, charp, NULL, 0444); 54 MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard."); 55 56 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 57 module_param_array(enable, bool, NULL, 0444); 58 MODULE_PARM_DESC(enable, "Enable AD1889 soundcard."); 59 60 static char *ac97_quirk[SNDRV_CARDS]; 61 module_param_array(ac97_quirk, charp, NULL, 0444); 62 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 63 64 #define DEVNAME "ad1889" 65 #define PFX DEVNAME ": " 66 67 /* keep track of some hw registers */ 68 struct ad1889_register_state { 69 u16 reg; /* reg setup */ 70 u32 addr; /* dma base address */ 71 unsigned long size; /* DMA buffer size */ 72 }; 73 74 struct snd_ad1889 { 75 struct snd_card *card; 76 struct pci_dev *pci; 77 78 int irq; 79 unsigned long bar; 80 void __iomem *iobase; 81 82 struct snd_ac97 *ac97; 83 struct snd_ac97_bus *ac97_bus; 84 struct snd_pcm *pcm; 85 struct snd_info_entry *proc; 86 87 struct snd_pcm_substream *psubs; 88 struct snd_pcm_substream *csubs; 89 90 /* playback register state */ 91 struct ad1889_register_state wave; 92 struct ad1889_register_state ramc; 93 94 spinlock_t lock; 95 }; 96 97 static inline u16 98 ad1889_readw(struct snd_ad1889 *chip, unsigned reg) 99 { 100 return readw(chip->iobase + reg); 101 } 102 103 static inline void 104 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) 105 { 106 writew(val, chip->iobase + reg); 107 } 108 109 static inline u32 110 ad1889_readl(struct snd_ad1889 *chip, unsigned reg) 111 { 112 return readl(chip->iobase + reg); 113 } 114 115 static inline void 116 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) 117 { 118 writel(val, chip->iobase + reg); 119 } 120 121 static inline void 122 ad1889_unmute(struct snd_ad1889 *chip) 123 { 124 u16 st; 125 st = ad1889_readw(chip, AD_DS_WADA) & 126 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM); 127 ad1889_writew(chip, AD_DS_WADA, st); 128 ad1889_readw(chip, AD_DS_WADA); 129 } 130 131 static inline void 132 ad1889_mute(struct snd_ad1889 *chip) 133 { 134 u16 st; 135 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM; 136 ad1889_writew(chip, AD_DS_WADA, st); 137 ad1889_readw(chip, AD_DS_WADA); 138 } 139 140 static inline void 141 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address) 142 { 143 ad1889_writel(chip, AD_DMA_ADCBA, address); 144 ad1889_writel(chip, AD_DMA_ADCCA, address); 145 } 146 147 static inline void 148 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count) 149 { 150 ad1889_writel(chip, AD_DMA_ADCBC, count); 151 ad1889_writel(chip, AD_DMA_ADCCC, count); 152 } 153 154 static inline void 155 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count) 156 { 157 ad1889_writel(chip, AD_DMA_ADCIB, count); 158 ad1889_writel(chip, AD_DMA_ADCIC, count); 159 } 160 161 static inline void 162 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address) 163 { 164 ad1889_writel(chip, AD_DMA_WAVBA, address); 165 ad1889_writel(chip, AD_DMA_WAVCA, address); 166 } 167 168 static inline void 169 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count) 170 { 171 ad1889_writel(chip, AD_DMA_WAVBC, count); 172 ad1889_writel(chip, AD_DMA_WAVCC, count); 173 } 174 175 static inline void 176 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count) 177 { 178 ad1889_writel(chip, AD_DMA_WAVIB, count); 179 ad1889_writel(chip, AD_DMA_WAVIC, count); 180 } 181 182 static void 183 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel) 184 { 185 u16 reg; 186 187 if (channel & AD_CHAN_WAV) { 188 /* Disable wave channel */ 189 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN; 190 ad1889_writew(chip, AD_DS_WSMC, reg); 191 chip->wave.reg = reg; 192 193 /* disable IRQs */ 194 reg = ad1889_readw(chip, AD_DMA_WAV); 195 reg &= AD_DMA_IM_DIS; 196 reg &= ~AD_DMA_LOOP; 197 ad1889_writew(chip, AD_DMA_WAV, reg); 198 199 /* clear IRQ and address counters and pointers */ 200 ad1889_load_wave_buffer_address(chip, 0x0); 201 ad1889_load_wave_buffer_count(chip, 0x0); 202 ad1889_load_wave_interrupt_count(chip, 0x0); 203 204 /* flush */ 205 ad1889_readw(chip, AD_DMA_WAV); 206 } 207 208 if (channel & AD_CHAN_ADC) { 209 /* Disable ADC channel */ 210 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN; 211 ad1889_writew(chip, AD_DS_RAMC, reg); 212 chip->ramc.reg = reg; 213 214 reg = ad1889_readw(chip, AD_DMA_ADC); 215 reg &= AD_DMA_IM_DIS; 216 reg &= ~AD_DMA_LOOP; 217 ad1889_writew(chip, AD_DMA_ADC, reg); 218 219 ad1889_load_adc_buffer_address(chip, 0x0); 220 ad1889_load_adc_buffer_count(chip, 0x0); 221 ad1889_load_adc_interrupt_count(chip, 0x0); 222 223 /* flush */ 224 ad1889_readw(chip, AD_DMA_ADC); 225 } 226 } 227 228 static u16 229 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 230 { 231 struct snd_ad1889 *chip = ac97->private_data; 232 return ad1889_readw(chip, AD_AC97_BASE + reg); 233 } 234 235 static void 236 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) 237 { 238 struct snd_ad1889 *chip = ac97->private_data; 239 ad1889_writew(chip, AD_AC97_BASE + reg, val); 240 } 241 242 static int 243 snd_ad1889_ac97_ready(struct snd_ad1889 *chip) 244 { 245 int retry = 400; /* average needs 352 msec */ 246 247 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY) 248 && --retry) 249 usleep_range(1000, 2000); 250 if (!retry) { 251 dev_err(chip->card->dev, "[%s] Link is not ready.\n", 252 __func__); 253 return -EIO; 254 } 255 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry); 256 257 return 0; 258 } 259 260 static const struct snd_pcm_hardware snd_ad1889_playback_hw = { 261 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 262 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 263 .formats = SNDRV_PCM_FMTBIT_S16_LE, 264 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 265 .rate_min = 8000, /* docs say 7000, but we're lazy */ 266 .rate_max = 48000, 267 .channels_min = 1, 268 .channels_max = 2, 269 .buffer_bytes_max = BUFFER_BYTES_MAX, 270 .period_bytes_min = PERIOD_BYTES_MIN, 271 .period_bytes_max = PERIOD_BYTES_MAX, 272 .periods_min = PERIODS_MIN, 273 .periods_max = PERIODS_MAX, 274 /*.fifo_size = 0,*/ 275 }; 276 277 static const struct snd_pcm_hardware snd_ad1889_capture_hw = { 278 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 279 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 280 .formats = SNDRV_PCM_FMTBIT_S16_LE, 281 .rates = SNDRV_PCM_RATE_48000, 282 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */ 283 .rate_max = 48000, 284 .channels_min = 1, 285 .channels_max = 2, 286 .buffer_bytes_max = BUFFER_BYTES_MAX, 287 .period_bytes_min = PERIOD_BYTES_MIN, 288 .period_bytes_max = PERIOD_BYTES_MAX, 289 .periods_min = PERIODS_MIN, 290 .periods_max = PERIODS_MAX, 291 /*.fifo_size = 0,*/ 292 }; 293 294 static int 295 snd_ad1889_playback_open(struct snd_pcm_substream *ss) 296 { 297 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 298 struct snd_pcm_runtime *rt = ss->runtime; 299 300 chip->psubs = ss; 301 rt->hw = snd_ad1889_playback_hw; 302 303 return 0; 304 } 305 306 static int 307 snd_ad1889_capture_open(struct snd_pcm_substream *ss) 308 { 309 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 310 struct snd_pcm_runtime *rt = ss->runtime; 311 312 chip->csubs = ss; 313 rt->hw = snd_ad1889_capture_hw; 314 315 return 0; 316 } 317 318 static int 319 snd_ad1889_playback_close(struct snd_pcm_substream *ss) 320 { 321 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 322 chip->psubs = NULL; 323 return 0; 324 } 325 326 static int 327 snd_ad1889_capture_close(struct snd_pcm_substream *ss) 328 { 329 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 330 chip->csubs = NULL; 331 return 0; 332 } 333 334 static int 335 snd_ad1889_playback_prepare(struct snd_pcm_substream *ss) 336 { 337 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 338 struct snd_pcm_runtime *rt = ss->runtime; 339 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 340 unsigned int count = snd_pcm_lib_period_bytes(ss); 341 u16 reg; 342 343 ad1889_channel_reset(chip, AD_CHAN_WAV); 344 345 reg = ad1889_readw(chip, AD_DS_WSMC); 346 347 /* Mask out 16-bit / Stereo */ 348 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST); 349 350 if (snd_pcm_format_width(rt->format) == 16) 351 reg |= AD_DS_WSMC_WA16; 352 353 if (rt->channels > 1) 354 reg |= AD_DS_WSMC_WAST; 355 356 /* let's make sure we don't clobber ourselves */ 357 spin_lock_irq(&chip->lock); 358 359 chip->wave.size = size; 360 chip->wave.reg = reg; 361 chip->wave.addr = rt->dma_addr; 362 363 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); 364 365 /* Set sample rates on the codec */ 366 ad1889_writew(chip, AD_DS_WAS, rt->rate); 367 368 /* Set up DMA */ 369 ad1889_load_wave_buffer_address(chip, chip->wave.addr); 370 ad1889_load_wave_buffer_count(chip, size); 371 ad1889_load_wave_interrupt_count(chip, count); 372 373 /* writes flush */ 374 ad1889_readw(chip, AD_DS_WSMC); 375 376 spin_unlock_irq(&chip->lock); 377 378 dev_dbg(chip->card->dev, 379 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n", 380 chip->wave.addr, count, size, reg, rt->rate); 381 return 0; 382 } 383 384 static int 385 snd_ad1889_capture_prepare(struct snd_pcm_substream *ss) 386 { 387 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 388 struct snd_pcm_runtime *rt = ss->runtime; 389 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 390 unsigned int count = snd_pcm_lib_period_bytes(ss); 391 u16 reg; 392 393 ad1889_channel_reset(chip, AD_CHAN_ADC); 394 395 reg = ad1889_readw(chip, AD_DS_RAMC); 396 397 /* Mask out 16-bit / Stereo */ 398 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST); 399 400 if (snd_pcm_format_width(rt->format) == 16) 401 reg |= AD_DS_RAMC_AD16; 402 403 if (rt->channels > 1) 404 reg |= AD_DS_RAMC_ADST; 405 406 /* let's make sure we don't clobber ourselves */ 407 spin_lock_irq(&chip->lock); 408 409 chip->ramc.size = size; 410 chip->ramc.reg = reg; 411 chip->ramc.addr = rt->dma_addr; 412 413 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg); 414 415 /* Set up DMA */ 416 ad1889_load_adc_buffer_address(chip, chip->ramc.addr); 417 ad1889_load_adc_buffer_count(chip, size); 418 ad1889_load_adc_interrupt_count(chip, count); 419 420 /* writes flush */ 421 ad1889_readw(chip, AD_DS_RAMC); 422 423 spin_unlock_irq(&chip->lock); 424 425 dev_dbg(chip->card->dev, 426 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n", 427 chip->ramc.addr, count, size, reg, rt->rate); 428 return 0; 429 } 430 431 /* this is called in atomic context with IRQ disabled. 432 Must be as fast as possible and not sleep. 433 DMA should be *triggered* by this call. 434 The WSMC "WAEN" bit triggers DMA Wave On/Off */ 435 static int 436 snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd) 437 { 438 u16 wsmc; 439 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 440 441 wsmc = ad1889_readw(chip, AD_DS_WSMC); 442 443 switch (cmd) { 444 case SNDRV_PCM_TRIGGER_START: 445 /* enable DMA loop & interrupts */ 446 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT); 447 wsmc |= AD_DS_WSMC_WAEN; 448 /* 1 to clear CHSS bit */ 449 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS); 450 ad1889_unmute(chip); 451 break; 452 case SNDRV_PCM_TRIGGER_STOP: 453 ad1889_mute(chip); 454 wsmc &= ~AD_DS_WSMC_WAEN; 455 break; 456 default: 457 snd_BUG(); 458 return -EINVAL; 459 } 460 461 chip->wave.reg = wsmc; 462 ad1889_writew(chip, AD_DS_WSMC, wsmc); 463 ad1889_readw(chip, AD_DS_WSMC); /* flush */ 464 465 /* reset the chip when STOP - will disable IRQs */ 466 if (cmd == SNDRV_PCM_TRIGGER_STOP) 467 ad1889_channel_reset(chip, AD_CHAN_WAV); 468 469 return 0; 470 } 471 472 /* this is called in atomic context with IRQ disabled. 473 Must be as fast as possible and not sleep. 474 DMA should be *triggered* by this call. 475 The RAMC "ADEN" bit triggers DMA ADC On/Off */ 476 static int 477 snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd) 478 { 479 u16 ramc; 480 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 481 482 ramc = ad1889_readw(chip, AD_DS_RAMC); 483 484 switch (cmd) { 485 case SNDRV_PCM_TRIGGER_START: 486 /* enable DMA loop & interrupts */ 487 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT); 488 ramc |= AD_DS_RAMC_ADEN; 489 /* 1 to clear CHSS bit */ 490 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS); 491 break; 492 case SNDRV_PCM_TRIGGER_STOP: 493 ramc &= ~AD_DS_RAMC_ADEN; 494 break; 495 default: 496 return -EINVAL; 497 } 498 499 chip->ramc.reg = ramc; 500 ad1889_writew(chip, AD_DS_RAMC, ramc); 501 ad1889_readw(chip, AD_DS_RAMC); /* flush */ 502 503 /* reset the chip when STOP - will disable IRQs */ 504 if (cmd == SNDRV_PCM_TRIGGER_STOP) 505 ad1889_channel_reset(chip, AD_CHAN_ADC); 506 507 return 0; 508 } 509 510 /* Called in atomic context with IRQ disabled */ 511 static snd_pcm_uframes_t 512 snd_ad1889_playback_pointer(struct snd_pcm_substream *ss) 513 { 514 size_t ptr = 0; 515 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 516 517 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) 518 return 0; 519 520 ptr = ad1889_readl(chip, AD_DMA_WAVCA); 521 ptr -= chip->wave.addr; 522 523 if (snd_BUG_ON(ptr >= chip->wave.size)) 524 return 0; 525 526 return bytes_to_frames(ss->runtime, ptr); 527 } 528 529 /* Called in atomic context with IRQ disabled */ 530 static snd_pcm_uframes_t 531 snd_ad1889_capture_pointer(struct snd_pcm_substream *ss) 532 { 533 size_t ptr = 0; 534 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 535 536 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN))) 537 return 0; 538 539 ptr = ad1889_readl(chip, AD_DMA_ADCCA); 540 ptr -= chip->ramc.addr; 541 542 if (snd_BUG_ON(ptr >= chip->ramc.size)) 543 return 0; 544 545 return bytes_to_frames(ss->runtime, ptr); 546 } 547 548 static const struct snd_pcm_ops snd_ad1889_playback_ops = { 549 .open = snd_ad1889_playback_open, 550 .close = snd_ad1889_playback_close, 551 .prepare = snd_ad1889_playback_prepare, 552 .trigger = snd_ad1889_playback_trigger, 553 .pointer = snd_ad1889_playback_pointer, 554 }; 555 556 static const struct snd_pcm_ops snd_ad1889_capture_ops = { 557 .open = snd_ad1889_capture_open, 558 .close = snd_ad1889_capture_close, 559 .prepare = snd_ad1889_capture_prepare, 560 .trigger = snd_ad1889_capture_trigger, 561 .pointer = snd_ad1889_capture_pointer, 562 }; 563 564 static irqreturn_t 565 snd_ad1889_interrupt(int irq, void *dev_id) 566 { 567 unsigned long st; 568 struct snd_ad1889 *chip = dev_id; 569 570 st = ad1889_readl(chip, AD_DMA_DISR); 571 572 /* clear ISR */ 573 ad1889_writel(chip, AD_DMA_DISR, st); 574 575 st &= AD_INTR_MASK; 576 577 if (unlikely(!st)) 578 return IRQ_NONE; 579 580 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI)) 581 dev_dbg(chip->card->dev, 582 "Unexpected master or target abort interrupt!\n"); 583 584 if ((st & AD_DMA_DISR_WAVI) && chip->psubs) 585 snd_pcm_period_elapsed(chip->psubs); 586 if ((st & AD_DMA_DISR_ADCI) && chip->csubs) 587 snd_pcm_period_elapsed(chip->csubs); 588 589 return IRQ_HANDLED; 590 } 591 592 static int 593 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device) 594 { 595 int err; 596 struct snd_pcm *pcm; 597 598 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm); 599 if (err < 0) 600 return err; 601 602 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 603 &snd_ad1889_playback_ops); 604 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 605 &snd_ad1889_capture_ops); 606 607 pcm->private_data = chip; 608 pcm->info_flags = 0; 609 strcpy(pcm->name, chip->card->shortname); 610 611 chip->pcm = pcm; 612 chip->psubs = NULL; 613 chip->csubs = NULL; 614 615 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &chip->pci->dev, 616 BUFFER_BYTES_MAX / 2, BUFFER_BYTES_MAX); 617 618 return 0; 619 } 620 621 static void 622 snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 623 { 624 struct snd_ad1889 *chip = entry->private_data; 625 u16 reg; 626 int tmp; 627 628 reg = ad1889_readw(chip, AD_DS_WSMC); 629 snd_iprintf(buffer, "Wave output: %s\n", 630 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled"); 631 snd_iprintf(buffer, "Wave Channels: %s\n", 632 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 633 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n", 634 (reg & AD_DS_WSMC_WA16) ? 16 : 8); 635 636 /* WARQ is at offset 12 */ 637 tmp = (reg & AD_DS_WSMC_WARQ) ? 638 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4; 639 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 640 641 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp, 642 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 643 644 645 snd_iprintf(buffer, "Synthesis output: %s\n", 646 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled"); 647 648 /* SYRQ is at offset 4 */ 649 tmp = (reg & AD_DS_WSMC_SYRQ) ? 650 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4; 651 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 652 653 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp, 654 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 655 656 reg = ad1889_readw(chip, AD_DS_RAMC); 657 snd_iprintf(buffer, "ADC input: %s\n", 658 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled"); 659 snd_iprintf(buffer, "ADC Channels: %s\n", 660 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 661 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n", 662 (reg & AD_DS_RAMC_AD16) ? 16 : 8); 663 664 /* ACRQ is at offset 4 */ 665 tmp = (reg & AD_DS_RAMC_ACRQ) ? 666 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4; 667 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 668 669 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp, 670 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 671 672 snd_iprintf(buffer, "Resampler input: %s\n", 673 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled"); 674 675 /* RERQ is at offset 12 */ 676 tmp = (reg & AD_DS_RAMC_RERQ) ? 677 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4; 678 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 679 680 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp, 681 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 682 683 684 /* doc says LSB represents -1.5dB, but the max value (-94.5dB) 685 suggests that LSB is -3dB, which is more coherent with the logarithmic 686 nature of the dB scale */ 687 reg = ad1889_readw(chip, AD_DS_WADA); 688 snd_iprintf(buffer, "Left: %s, -%d dB\n", 689 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute", 690 ((reg & AD_DS_WADA_LWAA) >> 8) * 3); 691 reg = ad1889_readw(chip, AD_DS_WADA); 692 snd_iprintf(buffer, "Right: %s, -%d dB\n", 693 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute", 694 (reg & AD_DS_WADA_RWAA) * 3); 695 696 reg = ad1889_readw(chip, AD_DS_WAS); 697 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg); 698 reg = ad1889_readw(chip, AD_DS_RES); 699 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg); 700 } 701 702 static void 703 snd_ad1889_proc_init(struct snd_ad1889 *chip) 704 { 705 snd_card_ro_proc_new(chip->card, chip->card->driver, 706 chip, snd_ad1889_proc_read); 707 } 708 709 static const struct ac97_quirk ac97_quirks[] = { 710 { 711 .subvendor = 0x11d4, /* AD */ 712 .subdevice = 0x1889, /* AD1889 */ 713 .codec_id = AC97_ID_AD1819, 714 .name = "AD1889", 715 .type = AC97_TUNE_HP_ONLY 716 }, 717 { } /* terminator */ 718 }; 719 720 static void 721 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip) 722 { 723 u16 reg; 724 725 reg = ad1889_readw(chip, AD_AC97_ACIC); 726 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */ 727 ad1889_writew(chip, AD_AC97_ACIC, reg); 728 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 729 udelay(10); 730 /* Interface Enable */ 731 reg |= AD_AC97_ACIC_ACIE; 732 ad1889_writew(chip, AD_AC97_ACIC, reg); 733 734 snd_ad1889_ac97_ready(chip); 735 736 /* Audio Stream Output | Variable Sample Rate Mode */ 737 reg = ad1889_readw(chip, AD_AC97_ACIC); 738 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM; 739 ad1889_writew(chip, AD_AC97_ACIC, reg); 740 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 741 742 } 743 744 static void 745 snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus) 746 { 747 struct snd_ad1889 *chip = bus->private_data; 748 chip->ac97_bus = NULL; 749 } 750 751 static void 752 snd_ad1889_ac97_free(struct snd_ac97 *ac97) 753 { 754 struct snd_ad1889 *chip = ac97->private_data; 755 chip->ac97 = NULL; 756 } 757 758 static int 759 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override) 760 { 761 int err; 762 struct snd_ac97_template ac97; 763 static const struct snd_ac97_bus_ops ops = { 764 .write = snd_ad1889_ac97_write, 765 .read = snd_ad1889_ac97_read, 766 }; 767 768 /* doing that here, it works. */ 769 snd_ad1889_ac97_xinit(chip); 770 771 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); 772 if (err < 0) 773 return err; 774 775 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free; 776 777 memset(&ac97, 0, sizeof(ac97)); 778 ac97.private_data = chip; 779 ac97.private_free = snd_ad1889_ac97_free; 780 ac97.pci = chip->pci; 781 782 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); 783 if (err < 0) 784 return err; 785 786 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); 787 788 return 0; 789 } 790 791 static int 792 snd_ad1889_free(struct snd_ad1889 *chip) 793 { 794 if (chip->irq < 0) 795 goto skip_hw; 796 797 spin_lock_irq(&chip->lock); 798 799 ad1889_mute(chip); 800 801 /* Turn off interrupt on count and zero DMA registers */ 802 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC); 803 804 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */ 805 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI); 806 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */ 807 808 spin_unlock_irq(&chip->lock); 809 810 if (chip->irq >= 0) 811 free_irq(chip->irq, chip); 812 813 skip_hw: 814 iounmap(chip->iobase); 815 pci_release_regions(chip->pci); 816 pci_disable_device(chip->pci); 817 kfree(chip); 818 return 0; 819 } 820 821 static int 822 snd_ad1889_dev_free(struct snd_device *device) 823 { 824 struct snd_ad1889 *chip = device->device_data; 825 return snd_ad1889_free(chip); 826 } 827 828 static int 829 snd_ad1889_init(struct snd_ad1889 *chip) 830 { 831 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */ 832 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */ 833 834 usleep_range(10000, 11000); 835 836 /* enable Master and Target abort interrupts */ 837 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE); 838 839 return 0; 840 } 841 842 static int 843 snd_ad1889_create(struct snd_card *card, 844 struct pci_dev *pci, 845 struct snd_ad1889 **rchip) 846 { 847 int err; 848 849 struct snd_ad1889 *chip; 850 static const struct snd_device_ops ops = { 851 .dev_free = snd_ad1889_dev_free, 852 }; 853 854 *rchip = NULL; 855 856 if ((err = pci_enable_device(pci)) < 0) 857 return err; 858 859 /* check PCI availability (32bit DMA) */ 860 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0 || 861 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) { 862 dev_err(card->dev, "error setting 32-bit DMA mask.\n"); 863 pci_disable_device(pci); 864 return -ENXIO; 865 } 866 867 /* allocate chip specific data with zero-filled memory */ 868 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) { 869 pci_disable_device(pci); 870 return -ENOMEM; 871 } 872 873 chip->card = card; 874 card->private_data = chip; 875 chip->pci = pci; 876 chip->irq = -1; 877 878 /* (1) PCI resource allocation */ 879 if ((err = pci_request_regions(pci, card->driver)) < 0) 880 goto free_and_ret; 881 882 chip->bar = pci_resource_start(pci, 0); 883 chip->iobase = pci_ioremap_bar(pci, 0); 884 if (chip->iobase == NULL) { 885 dev_err(card->dev, "unable to reserve region.\n"); 886 err = -EBUSY; 887 goto free_and_ret; 888 } 889 890 pci_set_master(pci); 891 892 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */ 893 894 if (request_irq(pci->irq, snd_ad1889_interrupt, 895 IRQF_SHARED, KBUILD_MODNAME, chip)) { 896 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq); 897 snd_ad1889_free(chip); 898 return -EBUSY; 899 } 900 901 chip->irq = pci->irq; 902 card->sync_irq = chip->irq; 903 904 /* (2) initialization of the chip hardware */ 905 if ((err = snd_ad1889_init(chip)) < 0) { 906 snd_ad1889_free(chip); 907 return err; 908 } 909 910 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 911 snd_ad1889_free(chip); 912 return err; 913 } 914 915 *rchip = chip; 916 917 return 0; 918 919 free_and_ret: 920 kfree(chip); 921 pci_disable_device(pci); 922 923 return err; 924 } 925 926 static int 927 snd_ad1889_probe(struct pci_dev *pci, 928 const struct pci_device_id *pci_id) 929 { 930 int err; 931 static int devno; 932 struct snd_card *card; 933 struct snd_ad1889 *chip; 934 935 /* (1) */ 936 if (devno >= SNDRV_CARDS) 937 return -ENODEV; 938 if (!enable[devno]) { 939 devno++; 940 return -ENOENT; 941 } 942 943 /* (2) */ 944 err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE, 945 0, &card); 946 /* XXX REVISIT: we can probably allocate chip in this call */ 947 if (err < 0) 948 return err; 949 950 strcpy(card->driver, "AD1889"); 951 strcpy(card->shortname, "Analog Devices AD1889"); 952 953 /* (3) */ 954 err = snd_ad1889_create(card, pci, &chip); 955 if (err < 0) 956 goto free_and_ret; 957 958 /* (4) */ 959 sprintf(card->longname, "%s at 0x%lx irq %i", 960 card->shortname, chip->bar, chip->irq); 961 962 /* (5) */ 963 /* register AC97 mixer */ 964 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]); 965 if (err < 0) 966 goto free_and_ret; 967 968 err = snd_ad1889_pcm_init(chip, 0); 969 if (err < 0) 970 goto free_and_ret; 971 972 /* register proc interface */ 973 snd_ad1889_proc_init(chip); 974 975 /* (6) */ 976 err = snd_card_register(card); 977 if (err < 0) 978 goto free_and_ret; 979 980 /* (7) */ 981 pci_set_drvdata(pci, card); 982 983 devno++; 984 return 0; 985 986 free_and_ret: 987 snd_card_free(card); 988 return err; 989 } 990 991 static void 992 snd_ad1889_remove(struct pci_dev *pci) 993 { 994 snd_card_free(pci_get_drvdata(pci)); 995 } 996 997 static const struct pci_device_id snd_ad1889_ids[] = { 998 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) }, 999 { 0, }, 1000 }; 1001 MODULE_DEVICE_TABLE(pci, snd_ad1889_ids); 1002 1003 static struct pci_driver ad1889_pci_driver = { 1004 .name = KBUILD_MODNAME, 1005 .id_table = snd_ad1889_ids, 1006 .probe = snd_ad1889_probe, 1007 .remove = snd_ad1889_remove, 1008 }; 1009 1010 module_pci_driver(ad1889_pci_driver); 1011