1 /* Analog Devices 1889 audio driver 2 * 3 * This is a driver for the AD1889 PCI audio chipset found 4 * on the HP PA-RISC [BCJ]-xxx0 workstations. 5 * 6 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org> 7 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org> 8 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License, version 2, as 12 * published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23 * TODO: 24 * Do we need to take care of CCS register? 25 * Maybe we could use finer grained locking (separate locks for pb/cap)? 26 * Wishlist: 27 * Control Interface (mixer) support 28 * Better AC97 support (VSR...)? 29 * PM support 30 * MIDI support 31 * Game Port support 32 * SG DMA support (this will need *alot* of work) 33 */ 34 35 #include <linux/init.h> 36 #include <linux/pci.h> 37 #include <linux/dma-mapping.h> 38 #include <linux/slab.h> 39 #include <linux/interrupt.h> 40 #include <linux/compiler.h> 41 #include <linux/delay.h> 42 43 #include <sound/core.h> 44 #include <sound/pcm.h> 45 #include <sound/initval.h> 46 #include <sound/ac97_codec.h> 47 48 #include <asm/io.h> 49 50 #include "ad1889.h" 51 #include "ac97/ac97_id.h" 52 53 #define AD1889_DRVVER "Version: 1.7" 54 55 MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>"); 56 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver"); 57 MODULE_LICENSE("GPL"); 58 MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}"); 59 60 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 61 module_param_array(index, int, NULL, 0444); 62 MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard."); 63 64 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 65 module_param_array(id, charp, NULL, 0444); 66 MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard."); 67 68 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 69 module_param_array(enable, bool, NULL, 0444); 70 MODULE_PARM_DESC(enable, "Enable AD1889 soundcard."); 71 72 static char *ac97_quirk[SNDRV_CARDS]; 73 module_param_array(ac97_quirk, charp, NULL, 0444); 74 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 75 76 #define DEVNAME "ad1889" 77 #define PFX DEVNAME ": " 78 79 /* let's use the global sound debug interfaces */ 80 #define ad1889_debug(fmt, arg...) snd_printd(KERN_DEBUG fmt, ## arg) 81 82 /* keep track of some hw registers */ 83 struct ad1889_register_state { 84 u16 reg; /* reg setup */ 85 u32 addr; /* dma base address */ 86 unsigned long size; /* DMA buffer size */ 87 }; 88 89 struct snd_ad1889 { 90 struct snd_card *card; 91 struct pci_dev *pci; 92 93 int irq; 94 unsigned long bar; 95 void __iomem *iobase; 96 97 struct snd_ac97 *ac97; 98 struct snd_ac97_bus *ac97_bus; 99 struct snd_pcm *pcm; 100 struct snd_info_entry *proc; 101 102 struct snd_pcm_substream *psubs; 103 struct snd_pcm_substream *csubs; 104 105 /* playback register state */ 106 struct ad1889_register_state wave; 107 struct ad1889_register_state ramc; 108 109 spinlock_t lock; 110 }; 111 112 static inline u16 113 ad1889_readw(struct snd_ad1889 *chip, unsigned reg) 114 { 115 return readw(chip->iobase + reg); 116 } 117 118 static inline void 119 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) 120 { 121 writew(val, chip->iobase + reg); 122 } 123 124 static inline u32 125 ad1889_readl(struct snd_ad1889 *chip, unsigned reg) 126 { 127 return readl(chip->iobase + reg); 128 } 129 130 static inline void 131 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) 132 { 133 writel(val, chip->iobase + reg); 134 } 135 136 static inline void 137 ad1889_unmute(struct snd_ad1889 *chip) 138 { 139 u16 st; 140 st = ad1889_readw(chip, AD_DS_WADA) & 141 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM); 142 ad1889_writew(chip, AD_DS_WADA, st); 143 ad1889_readw(chip, AD_DS_WADA); 144 } 145 146 static inline void 147 ad1889_mute(struct snd_ad1889 *chip) 148 { 149 u16 st; 150 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM; 151 ad1889_writew(chip, AD_DS_WADA, st); 152 ad1889_readw(chip, AD_DS_WADA); 153 } 154 155 static inline void 156 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address) 157 { 158 ad1889_writel(chip, AD_DMA_ADCBA, address); 159 ad1889_writel(chip, AD_DMA_ADCCA, address); 160 } 161 162 static inline void 163 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count) 164 { 165 ad1889_writel(chip, AD_DMA_ADCBC, count); 166 ad1889_writel(chip, AD_DMA_ADCCC, count); 167 } 168 169 static inline void 170 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count) 171 { 172 ad1889_writel(chip, AD_DMA_ADCIB, count); 173 ad1889_writel(chip, AD_DMA_ADCIC, count); 174 } 175 176 static inline void 177 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address) 178 { 179 ad1889_writel(chip, AD_DMA_WAVBA, address); 180 ad1889_writel(chip, AD_DMA_WAVCA, address); 181 } 182 183 static inline void 184 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count) 185 { 186 ad1889_writel(chip, AD_DMA_WAVBC, count); 187 ad1889_writel(chip, AD_DMA_WAVCC, count); 188 } 189 190 static inline void 191 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count) 192 { 193 ad1889_writel(chip, AD_DMA_WAVIB, count); 194 ad1889_writel(chip, AD_DMA_WAVIC, count); 195 } 196 197 static void 198 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel) 199 { 200 u16 reg; 201 202 if (channel & AD_CHAN_WAV) { 203 /* Disable wave channel */ 204 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN; 205 ad1889_writew(chip, AD_DS_WSMC, reg); 206 chip->wave.reg = reg; 207 208 /* disable IRQs */ 209 reg = ad1889_readw(chip, AD_DMA_WAV); 210 reg &= AD_DMA_IM_DIS; 211 reg &= ~AD_DMA_LOOP; 212 ad1889_writew(chip, AD_DMA_WAV, reg); 213 214 /* clear IRQ and address counters and pointers */ 215 ad1889_load_wave_buffer_address(chip, 0x0); 216 ad1889_load_wave_buffer_count(chip, 0x0); 217 ad1889_load_wave_interrupt_count(chip, 0x0); 218 219 /* flush */ 220 ad1889_readw(chip, AD_DMA_WAV); 221 } 222 223 if (channel & AD_CHAN_ADC) { 224 /* Disable ADC channel */ 225 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN; 226 ad1889_writew(chip, AD_DS_RAMC, reg); 227 chip->ramc.reg = reg; 228 229 reg = ad1889_readw(chip, AD_DMA_ADC); 230 reg &= AD_DMA_IM_DIS; 231 reg &= ~AD_DMA_LOOP; 232 ad1889_writew(chip, AD_DMA_ADC, reg); 233 234 ad1889_load_adc_buffer_address(chip, 0x0); 235 ad1889_load_adc_buffer_count(chip, 0x0); 236 ad1889_load_adc_interrupt_count(chip, 0x0); 237 238 /* flush */ 239 ad1889_readw(chip, AD_DMA_ADC); 240 } 241 } 242 243 static u16 244 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 245 { 246 struct snd_ad1889 *chip = ac97->private_data; 247 return ad1889_readw(chip, AD_AC97_BASE + reg); 248 } 249 250 static void 251 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) 252 { 253 struct snd_ad1889 *chip = ac97->private_data; 254 ad1889_writew(chip, AD_AC97_BASE + reg, val); 255 } 256 257 static int 258 snd_ad1889_ac97_ready(struct snd_ad1889 *chip) 259 { 260 int retry = 400; /* average needs 352 msec */ 261 262 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY) 263 && --retry) 264 mdelay(1); 265 if (!retry) { 266 snd_printk(KERN_ERR PFX "[%s] Link is not ready.\n", 267 __func__); 268 return -EIO; 269 } 270 ad1889_debug("[%s] ready after %d ms\n", __func__, 400 - retry); 271 272 return 0; 273 } 274 275 static int 276 snd_ad1889_hw_params(struct snd_pcm_substream *substream, 277 struct snd_pcm_hw_params *hw_params) 278 { 279 return snd_pcm_lib_malloc_pages(substream, 280 params_buffer_bytes(hw_params)); 281 } 282 283 static int 284 snd_ad1889_hw_free(struct snd_pcm_substream *substream) 285 { 286 return snd_pcm_lib_free_pages(substream); 287 } 288 289 static struct snd_pcm_hardware snd_ad1889_playback_hw = { 290 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 291 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 292 .formats = SNDRV_PCM_FMTBIT_S16_LE, 293 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 294 .rate_min = 8000, /* docs say 7000, but we're lazy */ 295 .rate_max = 48000, 296 .channels_min = 1, 297 .channels_max = 2, 298 .buffer_bytes_max = BUFFER_BYTES_MAX, 299 .period_bytes_min = PERIOD_BYTES_MIN, 300 .period_bytes_max = PERIOD_BYTES_MAX, 301 .periods_min = PERIODS_MIN, 302 .periods_max = PERIODS_MAX, 303 /*.fifo_size = 0,*/ 304 }; 305 306 static struct snd_pcm_hardware snd_ad1889_capture_hw = { 307 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 308 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 309 .formats = SNDRV_PCM_FMTBIT_S16_LE, 310 .rates = SNDRV_PCM_RATE_48000, 311 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */ 312 .rate_max = 48000, 313 .channels_min = 1, 314 .channels_max = 2, 315 .buffer_bytes_max = BUFFER_BYTES_MAX, 316 .period_bytes_min = PERIOD_BYTES_MIN, 317 .period_bytes_max = PERIOD_BYTES_MAX, 318 .periods_min = PERIODS_MIN, 319 .periods_max = PERIODS_MAX, 320 /*.fifo_size = 0,*/ 321 }; 322 323 static int 324 snd_ad1889_playback_open(struct snd_pcm_substream *ss) 325 { 326 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 327 struct snd_pcm_runtime *rt = ss->runtime; 328 329 chip->psubs = ss; 330 rt->hw = snd_ad1889_playback_hw; 331 332 return 0; 333 } 334 335 static int 336 snd_ad1889_capture_open(struct snd_pcm_substream *ss) 337 { 338 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 339 struct snd_pcm_runtime *rt = ss->runtime; 340 341 chip->csubs = ss; 342 rt->hw = snd_ad1889_capture_hw; 343 344 return 0; 345 } 346 347 static int 348 snd_ad1889_playback_close(struct snd_pcm_substream *ss) 349 { 350 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 351 chip->psubs = NULL; 352 return 0; 353 } 354 355 static int 356 snd_ad1889_capture_close(struct snd_pcm_substream *ss) 357 { 358 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 359 chip->csubs = NULL; 360 return 0; 361 } 362 363 static int 364 snd_ad1889_playback_prepare(struct snd_pcm_substream *ss) 365 { 366 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 367 struct snd_pcm_runtime *rt = ss->runtime; 368 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 369 unsigned int count = snd_pcm_lib_period_bytes(ss); 370 u16 reg; 371 372 ad1889_channel_reset(chip, AD_CHAN_WAV); 373 374 reg = ad1889_readw(chip, AD_DS_WSMC); 375 376 /* Mask out 16-bit / Stereo */ 377 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST); 378 379 if (snd_pcm_format_width(rt->format) == 16) 380 reg |= AD_DS_WSMC_WA16; 381 382 if (rt->channels > 1) 383 reg |= AD_DS_WSMC_WAST; 384 385 /* let's make sure we don't clobber ourselves */ 386 spin_lock_irq(&chip->lock); 387 388 chip->wave.size = size; 389 chip->wave.reg = reg; 390 chip->wave.addr = rt->dma_addr; 391 392 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); 393 394 /* Set sample rates on the codec */ 395 ad1889_writew(chip, AD_DS_WAS, rt->rate); 396 397 /* Set up DMA */ 398 ad1889_load_wave_buffer_address(chip, chip->wave.addr); 399 ad1889_load_wave_buffer_count(chip, size); 400 ad1889_load_wave_interrupt_count(chip, count); 401 402 /* writes flush */ 403 ad1889_readw(chip, AD_DS_WSMC); 404 405 spin_unlock_irq(&chip->lock); 406 407 ad1889_debug("prepare playback: addr = 0x%x, count = %u, " 408 "size = %u, reg = 0x%x, rate = %u\n", chip->wave.addr, 409 count, size, reg, rt->rate); 410 return 0; 411 } 412 413 static int 414 snd_ad1889_capture_prepare(struct snd_pcm_substream *ss) 415 { 416 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 417 struct snd_pcm_runtime *rt = ss->runtime; 418 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 419 unsigned int count = snd_pcm_lib_period_bytes(ss); 420 u16 reg; 421 422 ad1889_channel_reset(chip, AD_CHAN_ADC); 423 424 reg = ad1889_readw(chip, AD_DS_RAMC); 425 426 /* Mask out 16-bit / Stereo */ 427 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST); 428 429 if (snd_pcm_format_width(rt->format) == 16) 430 reg |= AD_DS_RAMC_AD16; 431 432 if (rt->channels > 1) 433 reg |= AD_DS_RAMC_ADST; 434 435 /* let's make sure we don't clobber ourselves */ 436 spin_lock_irq(&chip->lock); 437 438 chip->ramc.size = size; 439 chip->ramc.reg = reg; 440 chip->ramc.addr = rt->dma_addr; 441 442 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg); 443 444 /* Set up DMA */ 445 ad1889_load_adc_buffer_address(chip, chip->ramc.addr); 446 ad1889_load_adc_buffer_count(chip, size); 447 ad1889_load_adc_interrupt_count(chip, count); 448 449 /* writes flush */ 450 ad1889_readw(chip, AD_DS_RAMC); 451 452 spin_unlock_irq(&chip->lock); 453 454 ad1889_debug("prepare capture: addr = 0x%x, count = %u, " 455 "size = %u, reg = 0x%x, rate = %u\n", chip->ramc.addr, 456 count, size, reg, rt->rate); 457 return 0; 458 } 459 460 /* this is called in atomic context with IRQ disabled. 461 Must be as fast as possible and not sleep. 462 DMA should be *triggered* by this call. 463 The WSMC "WAEN" bit triggers DMA Wave On/Off */ 464 static int 465 snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd) 466 { 467 u16 wsmc; 468 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 469 470 wsmc = ad1889_readw(chip, AD_DS_WSMC); 471 472 switch (cmd) { 473 case SNDRV_PCM_TRIGGER_START: 474 /* enable DMA loop & interrupts */ 475 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT); 476 wsmc |= AD_DS_WSMC_WAEN; 477 /* 1 to clear CHSS bit */ 478 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS); 479 ad1889_unmute(chip); 480 break; 481 case SNDRV_PCM_TRIGGER_STOP: 482 ad1889_mute(chip); 483 wsmc &= ~AD_DS_WSMC_WAEN; 484 break; 485 default: 486 snd_BUG(); 487 return -EINVAL; 488 } 489 490 chip->wave.reg = wsmc; 491 ad1889_writew(chip, AD_DS_WSMC, wsmc); 492 ad1889_readw(chip, AD_DS_WSMC); /* flush */ 493 494 /* reset the chip when STOP - will disable IRQs */ 495 if (cmd == SNDRV_PCM_TRIGGER_STOP) 496 ad1889_channel_reset(chip, AD_CHAN_WAV); 497 498 return 0; 499 } 500 501 /* this is called in atomic context with IRQ disabled. 502 Must be as fast as possible and not sleep. 503 DMA should be *triggered* by this call. 504 The RAMC "ADEN" bit triggers DMA ADC On/Off */ 505 static int 506 snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd) 507 { 508 u16 ramc; 509 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 510 511 ramc = ad1889_readw(chip, AD_DS_RAMC); 512 513 switch (cmd) { 514 case SNDRV_PCM_TRIGGER_START: 515 /* enable DMA loop & interrupts */ 516 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT); 517 ramc |= AD_DS_RAMC_ADEN; 518 /* 1 to clear CHSS bit */ 519 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS); 520 break; 521 case SNDRV_PCM_TRIGGER_STOP: 522 ramc &= ~AD_DS_RAMC_ADEN; 523 break; 524 default: 525 return -EINVAL; 526 } 527 528 chip->ramc.reg = ramc; 529 ad1889_writew(chip, AD_DS_RAMC, ramc); 530 ad1889_readw(chip, AD_DS_RAMC); /* flush */ 531 532 /* reset the chip when STOP - will disable IRQs */ 533 if (cmd == SNDRV_PCM_TRIGGER_STOP) 534 ad1889_channel_reset(chip, AD_CHAN_ADC); 535 536 return 0; 537 } 538 539 /* Called in atomic context with IRQ disabled */ 540 static snd_pcm_uframes_t 541 snd_ad1889_playback_pointer(struct snd_pcm_substream *ss) 542 { 543 size_t ptr = 0; 544 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 545 546 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) 547 return 0; 548 549 ptr = ad1889_readl(chip, AD_DMA_WAVCA); 550 ptr -= chip->wave.addr; 551 552 if (snd_BUG_ON(ptr >= chip->wave.size)) 553 return 0; 554 555 return bytes_to_frames(ss->runtime, ptr); 556 } 557 558 /* Called in atomic context with IRQ disabled */ 559 static snd_pcm_uframes_t 560 snd_ad1889_capture_pointer(struct snd_pcm_substream *ss) 561 { 562 size_t ptr = 0; 563 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 564 565 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN))) 566 return 0; 567 568 ptr = ad1889_readl(chip, AD_DMA_ADCCA); 569 ptr -= chip->ramc.addr; 570 571 if (snd_BUG_ON(ptr >= chip->ramc.size)) 572 return 0; 573 574 return bytes_to_frames(ss->runtime, ptr); 575 } 576 577 static struct snd_pcm_ops snd_ad1889_playback_ops = { 578 .open = snd_ad1889_playback_open, 579 .close = snd_ad1889_playback_close, 580 .ioctl = snd_pcm_lib_ioctl, 581 .hw_params = snd_ad1889_hw_params, 582 .hw_free = snd_ad1889_hw_free, 583 .prepare = snd_ad1889_playback_prepare, 584 .trigger = snd_ad1889_playback_trigger, 585 .pointer = snd_ad1889_playback_pointer, 586 }; 587 588 static struct snd_pcm_ops snd_ad1889_capture_ops = { 589 .open = snd_ad1889_capture_open, 590 .close = snd_ad1889_capture_close, 591 .ioctl = snd_pcm_lib_ioctl, 592 .hw_params = snd_ad1889_hw_params, 593 .hw_free = snd_ad1889_hw_free, 594 .prepare = snd_ad1889_capture_prepare, 595 .trigger = snd_ad1889_capture_trigger, 596 .pointer = snd_ad1889_capture_pointer, 597 }; 598 599 static irqreturn_t 600 snd_ad1889_interrupt(int irq, void *dev_id) 601 { 602 unsigned long st; 603 struct snd_ad1889 *chip = dev_id; 604 605 st = ad1889_readl(chip, AD_DMA_DISR); 606 607 /* clear ISR */ 608 ad1889_writel(chip, AD_DMA_DISR, st); 609 610 st &= AD_INTR_MASK; 611 612 if (unlikely(!st)) 613 return IRQ_NONE; 614 615 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI)) 616 ad1889_debug("Unexpected master or target abort interrupt!\n"); 617 618 if ((st & AD_DMA_DISR_WAVI) && chip->psubs) 619 snd_pcm_period_elapsed(chip->psubs); 620 if ((st & AD_DMA_DISR_ADCI) && chip->csubs) 621 snd_pcm_period_elapsed(chip->csubs); 622 623 return IRQ_HANDLED; 624 } 625 626 static int __devinit 627 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device, struct snd_pcm **rpcm) 628 { 629 int err; 630 struct snd_pcm *pcm; 631 632 if (rpcm) 633 *rpcm = NULL; 634 635 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm); 636 if (err < 0) 637 return err; 638 639 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 640 &snd_ad1889_playback_ops); 641 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 642 &snd_ad1889_capture_ops); 643 644 pcm->private_data = chip; 645 pcm->info_flags = 0; 646 strcpy(pcm->name, chip->card->shortname); 647 648 chip->pcm = pcm; 649 chip->psubs = NULL; 650 chip->csubs = NULL; 651 652 err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 653 snd_dma_pci_data(chip->pci), 654 BUFFER_BYTES_MAX / 2, 655 BUFFER_BYTES_MAX); 656 657 if (err < 0) { 658 snd_printk(KERN_ERR PFX "buffer allocation error: %d\n", err); 659 return err; 660 } 661 662 if (rpcm) 663 *rpcm = pcm; 664 665 return 0; 666 } 667 668 static void 669 snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 670 { 671 struct snd_ad1889 *chip = entry->private_data; 672 u16 reg; 673 int tmp; 674 675 reg = ad1889_readw(chip, AD_DS_WSMC); 676 snd_iprintf(buffer, "Wave output: %s\n", 677 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled"); 678 snd_iprintf(buffer, "Wave Channels: %s\n", 679 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 680 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n", 681 (reg & AD_DS_WSMC_WA16) ? 16 : 8); 682 683 /* WARQ is at offset 12 */ 684 tmp = (reg & AD_DS_WSMC_WARQ) ? 685 (((reg & AD_DS_WSMC_WARQ >> 12) & 0x01) ? 12 : 18) : 4; 686 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 687 688 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp, 689 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 690 691 692 snd_iprintf(buffer, "Synthesis output: %s\n", 693 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled"); 694 695 /* SYRQ is at offset 4 */ 696 tmp = (reg & AD_DS_WSMC_SYRQ) ? 697 (((reg & AD_DS_WSMC_SYRQ >> 4) & 0x01) ? 12 : 18) : 4; 698 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 699 700 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp, 701 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 702 703 reg = ad1889_readw(chip, AD_DS_RAMC); 704 snd_iprintf(buffer, "ADC input: %s\n", 705 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled"); 706 snd_iprintf(buffer, "ADC Channels: %s\n", 707 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 708 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n", 709 (reg & AD_DS_RAMC_AD16) ? 16 : 8); 710 711 /* ACRQ is at offset 4 */ 712 tmp = (reg & AD_DS_RAMC_ACRQ) ? 713 (((reg & AD_DS_RAMC_ACRQ >> 4) & 0x01) ? 12 : 18) : 4; 714 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 715 716 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp, 717 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 718 719 snd_iprintf(buffer, "Resampler input: %s\n", 720 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled"); 721 722 /* RERQ is at offset 12 */ 723 tmp = (reg & AD_DS_RAMC_RERQ) ? 724 (((reg & AD_DS_RAMC_RERQ >> 12) & 0x01) ? 12 : 18) : 4; 725 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 726 727 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp, 728 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 729 730 731 /* doc says LSB represents -1.5dB, but the max value (-94.5dB) 732 suggests that LSB is -3dB, which is more coherent with the logarithmic 733 nature of the dB scale */ 734 reg = ad1889_readw(chip, AD_DS_WADA); 735 snd_iprintf(buffer, "Left: %s, -%d dB\n", 736 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute", 737 ((reg & AD_DS_WADA_LWAA) >> 8) * 3); 738 reg = ad1889_readw(chip, AD_DS_WADA); 739 snd_iprintf(buffer, "Right: %s, -%d dB\n", 740 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute", 741 ((reg & AD_DS_WADA_RWAA) >> 8) * 3); 742 743 reg = ad1889_readw(chip, AD_DS_WAS); 744 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg); 745 reg = ad1889_readw(chip, AD_DS_RES); 746 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg); 747 } 748 749 static void __devinit 750 snd_ad1889_proc_init(struct snd_ad1889 *chip) 751 { 752 struct snd_info_entry *entry; 753 754 if (!snd_card_proc_new(chip->card, chip->card->driver, &entry)) 755 snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read); 756 } 757 758 static struct ac97_quirk ac97_quirks[] = { 759 { 760 .subvendor = 0x11d4, /* AD */ 761 .subdevice = 0x1889, /* AD1889 */ 762 .codec_id = AC97_ID_AD1819, 763 .name = "AD1889", 764 .type = AC97_TUNE_HP_ONLY 765 }, 766 { } /* terminator */ 767 }; 768 769 static void __devinit 770 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip) 771 { 772 u16 reg; 773 774 reg = ad1889_readw(chip, AD_AC97_ACIC); 775 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */ 776 ad1889_writew(chip, AD_AC97_ACIC, reg); 777 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 778 udelay(10); 779 /* Interface Enable */ 780 reg |= AD_AC97_ACIC_ACIE; 781 ad1889_writew(chip, AD_AC97_ACIC, reg); 782 783 snd_ad1889_ac97_ready(chip); 784 785 /* Audio Stream Output | Variable Sample Rate Mode */ 786 reg = ad1889_readw(chip, AD_AC97_ACIC); 787 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM; 788 ad1889_writew(chip, AD_AC97_ACIC, reg); 789 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 790 791 } 792 793 static void 794 snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus) 795 { 796 struct snd_ad1889 *chip = bus->private_data; 797 chip->ac97_bus = NULL; 798 } 799 800 static void 801 snd_ad1889_ac97_free(struct snd_ac97 *ac97) 802 { 803 struct snd_ad1889 *chip = ac97->private_data; 804 chip->ac97 = NULL; 805 } 806 807 static int __devinit 808 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override) 809 { 810 int err; 811 struct snd_ac97_template ac97; 812 static struct snd_ac97_bus_ops ops = { 813 .write = snd_ad1889_ac97_write, 814 .read = snd_ad1889_ac97_read, 815 }; 816 817 /* doing that here, it works. */ 818 snd_ad1889_ac97_xinit(chip); 819 820 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); 821 if (err < 0) 822 return err; 823 824 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free; 825 826 memset(&ac97, 0, sizeof(ac97)); 827 ac97.private_data = chip; 828 ac97.private_free = snd_ad1889_ac97_free; 829 ac97.pci = chip->pci; 830 831 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); 832 if (err < 0) 833 return err; 834 835 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); 836 837 return 0; 838 } 839 840 static int 841 snd_ad1889_free(struct snd_ad1889 *chip) 842 { 843 if (chip->irq < 0) 844 goto skip_hw; 845 846 spin_lock_irq(&chip->lock); 847 848 ad1889_mute(chip); 849 850 /* Turn off interrupt on count and zero DMA registers */ 851 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC); 852 853 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */ 854 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI); 855 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */ 856 857 spin_unlock_irq(&chip->lock); 858 859 if (chip->irq >= 0) 860 free_irq(chip->irq, chip); 861 862 skip_hw: 863 if (chip->iobase) 864 iounmap(chip->iobase); 865 866 pci_release_regions(chip->pci); 867 pci_disable_device(chip->pci); 868 869 kfree(chip); 870 return 0; 871 } 872 873 static int 874 snd_ad1889_dev_free(struct snd_device *device) 875 { 876 struct snd_ad1889 *chip = device->device_data; 877 return snd_ad1889_free(chip); 878 } 879 880 static int __devinit 881 snd_ad1889_init(struct snd_ad1889 *chip) 882 { 883 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */ 884 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */ 885 886 mdelay(10); 887 888 /* enable Master and Target abort interrupts */ 889 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE); 890 891 return 0; 892 } 893 894 static int __devinit 895 snd_ad1889_create(struct snd_card *card, 896 struct pci_dev *pci, 897 struct snd_ad1889 **rchip) 898 { 899 int err; 900 901 struct snd_ad1889 *chip; 902 static struct snd_device_ops ops = { 903 .dev_free = snd_ad1889_dev_free, 904 }; 905 906 *rchip = NULL; 907 908 if ((err = pci_enable_device(pci)) < 0) 909 return err; 910 911 /* check PCI availability (32bit DMA) */ 912 if (pci_set_dma_mask(pci, DMA_BIT_MASK(32)) < 0 || 913 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32)) < 0) { 914 printk(KERN_ERR PFX "error setting 32-bit DMA mask.\n"); 915 pci_disable_device(pci); 916 return -ENXIO; 917 } 918 919 /* allocate chip specific data with zero-filled memory */ 920 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) { 921 pci_disable_device(pci); 922 return -ENOMEM; 923 } 924 925 chip->card = card; 926 card->private_data = chip; 927 chip->pci = pci; 928 chip->irq = -1; 929 930 /* (1) PCI resource allocation */ 931 if ((err = pci_request_regions(pci, card->driver)) < 0) 932 goto free_and_ret; 933 934 chip->bar = pci_resource_start(pci, 0); 935 chip->iobase = pci_ioremap_bar(pci, 0); 936 if (chip->iobase == NULL) { 937 printk(KERN_ERR PFX "unable to reserve region.\n"); 938 err = -EBUSY; 939 goto free_and_ret; 940 } 941 942 pci_set_master(pci); 943 944 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */ 945 946 if (request_irq(pci->irq, snd_ad1889_interrupt, 947 IRQF_SHARED, card->driver, chip)) { 948 printk(KERN_ERR PFX "cannot obtain IRQ %d\n", pci->irq); 949 snd_ad1889_free(chip); 950 return -EBUSY; 951 } 952 953 chip->irq = pci->irq; 954 synchronize_irq(chip->irq); 955 956 /* (2) initialization of the chip hardware */ 957 if ((err = snd_ad1889_init(chip)) < 0) { 958 snd_ad1889_free(chip); 959 return err; 960 } 961 962 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 963 snd_ad1889_free(chip); 964 return err; 965 } 966 967 snd_card_set_dev(card, &pci->dev); 968 969 *rchip = chip; 970 971 return 0; 972 973 free_and_ret: 974 kfree(chip); 975 pci_disable_device(pci); 976 977 return err; 978 } 979 980 static int __devinit 981 snd_ad1889_probe(struct pci_dev *pci, 982 const struct pci_device_id *pci_id) 983 { 984 int err; 985 static int devno; 986 struct snd_card *card; 987 struct snd_ad1889 *chip; 988 989 /* (1) */ 990 if (devno >= SNDRV_CARDS) 991 return -ENODEV; 992 if (!enable[devno]) { 993 devno++; 994 return -ENOENT; 995 } 996 997 /* (2) */ 998 err = snd_card_create(index[devno], id[devno], THIS_MODULE, 0, &card); 999 /* XXX REVISIT: we can probably allocate chip in this call */ 1000 if (err < 0) 1001 return err; 1002 1003 strcpy(card->driver, "AD1889"); 1004 strcpy(card->shortname, "Analog Devices AD1889"); 1005 1006 /* (3) */ 1007 err = snd_ad1889_create(card, pci, &chip); 1008 if (err < 0) 1009 goto free_and_ret; 1010 1011 /* (4) */ 1012 sprintf(card->longname, "%s at 0x%lx irq %i", 1013 card->shortname, chip->bar, chip->irq); 1014 1015 /* (5) */ 1016 /* register AC97 mixer */ 1017 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]); 1018 if (err < 0) 1019 goto free_and_ret; 1020 1021 err = snd_ad1889_pcm_init(chip, 0, NULL); 1022 if (err < 0) 1023 goto free_and_ret; 1024 1025 /* register proc interface */ 1026 snd_ad1889_proc_init(chip); 1027 1028 /* (6) */ 1029 err = snd_card_register(card); 1030 if (err < 0) 1031 goto free_and_ret; 1032 1033 /* (7) */ 1034 pci_set_drvdata(pci, card); 1035 1036 devno++; 1037 return 0; 1038 1039 free_and_ret: 1040 snd_card_free(card); 1041 return err; 1042 } 1043 1044 static void __devexit 1045 snd_ad1889_remove(struct pci_dev *pci) 1046 { 1047 snd_card_free(pci_get_drvdata(pci)); 1048 pci_set_drvdata(pci, NULL); 1049 } 1050 1051 static struct pci_device_id snd_ad1889_ids[] = { 1052 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) }, 1053 { 0, }, 1054 }; 1055 MODULE_DEVICE_TABLE(pci, snd_ad1889_ids); 1056 1057 static struct pci_driver ad1889_pci_driver = { 1058 .name = "AD1889 Audio", 1059 .id_table = snd_ad1889_ids, 1060 .probe = snd_ad1889_probe, 1061 .remove = __devexit_p(snd_ad1889_remove), 1062 }; 1063 1064 static int __init 1065 alsa_ad1889_init(void) 1066 { 1067 return pci_register_driver(&ad1889_pci_driver); 1068 } 1069 1070 static void __exit 1071 alsa_ad1889_fini(void) 1072 { 1073 pci_unregister_driver(&ad1889_pci_driver); 1074 } 1075 1076 module_init(alsa_ad1889_init); 1077 module_exit(alsa_ad1889_fini); 1078