1 /* 2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 3 * Universal interface for Audio Codec '97 4 * 5 * For more details look to AC '97 component specification revision 2.2 6 * by Intel Corporation (http://developer.intel.com) and to datasheets 7 * for specific codecs. 8 * 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 26 #include <sound/driver.h> 27 #include <linux/delay.h> 28 #include <linux/init.h> 29 #include <linux/slab.h> 30 #include <sound/core.h> 31 #include <sound/pcm.h> 32 #include <sound/control.h> 33 #include <sound/ac97_codec.h> 34 #include <sound/asoundef.h> 35 #include "ac97_patch.h" 36 #include "ac97_id.h" 37 #include "ac97_local.h" 38 39 /* 40 * PCM support 41 */ 42 43 static unsigned char rate_reg_tables[2][4][9] = { 44 { 45 /* standard rates */ 46 { 47 /* 3&4 front, 7&8 rear, 6&9 center/lfe */ 48 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */ 49 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */ 50 0xff, /* slot 5 */ 51 AC97_PCM_LFE_DAC_RATE, /* slot 6 */ 52 AC97_PCM_SURR_DAC_RATE, /* slot 7 */ 53 AC97_PCM_SURR_DAC_RATE, /* slot 8 */ 54 AC97_PCM_LFE_DAC_RATE, /* slot 9 */ 55 0xff, /* slot 10 */ 56 0xff, /* slot 11 */ 57 }, 58 { 59 /* 7&8 front, 6&9 rear, 10&11 center/lfe */ 60 0xff, /* slot 3 */ 61 0xff, /* slot 4 */ 62 0xff, /* slot 5 */ 63 AC97_PCM_SURR_DAC_RATE, /* slot 6 */ 64 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */ 65 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */ 66 AC97_PCM_SURR_DAC_RATE, /* slot 9 */ 67 AC97_PCM_LFE_DAC_RATE, /* slot 10 */ 68 AC97_PCM_LFE_DAC_RATE, /* slot 11 */ 69 }, 70 { 71 /* 6&9 front, 10&11 rear, 3&4 center/lfe */ 72 AC97_PCM_LFE_DAC_RATE, /* slot 3 */ 73 AC97_PCM_LFE_DAC_RATE, /* slot 4 */ 74 0xff, /* slot 5 */ 75 AC97_PCM_FRONT_DAC_RATE, /* slot 6 */ 76 0xff, /* slot 7 */ 77 0xff, /* slot 8 */ 78 AC97_PCM_FRONT_DAC_RATE, /* slot 9 */ 79 AC97_PCM_SURR_DAC_RATE, /* slot 10 */ 80 AC97_PCM_SURR_DAC_RATE, /* slot 11 */ 81 }, 82 { 83 /* 10&11 front, 3&4 rear, 7&8 center/lfe */ 84 AC97_PCM_SURR_DAC_RATE, /* slot 3 */ 85 AC97_PCM_SURR_DAC_RATE, /* slot 4 */ 86 0xff, /* slot 5 */ 87 0xff, /* slot 6 */ 88 AC97_PCM_LFE_DAC_RATE, /* slot 7 */ 89 AC97_PCM_LFE_DAC_RATE, /* slot 8 */ 90 0xff, /* slot 9 */ 91 AC97_PCM_FRONT_DAC_RATE, /* slot 10 */ 92 AC97_PCM_FRONT_DAC_RATE, /* slot 11 */ 93 }, 94 }, 95 { 96 /* double rates */ 97 { 98 /* 3&4 front, 7&8 front (t+1) */ 99 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */ 100 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */ 101 0xff, /* slot 5 */ 102 0xff, /* slot 6 */ 103 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */ 104 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */ 105 0xff, /* slot 9 */ 106 0xff, /* slot 10 */ 107 0xff, /* slot 11 */ 108 }, 109 { 110 /* not specified in the specification */ 111 0xff, /* slot 3 */ 112 0xff, /* slot 4 */ 113 0xff, /* slot 5 */ 114 0xff, /* slot 6 */ 115 0xff, /* slot 7 */ 116 0xff, /* slot 8 */ 117 0xff, /* slot 9 */ 118 0xff, /* slot 10 */ 119 0xff, /* slot 11 */ 120 }, 121 { 122 0xff, /* slot 3 */ 123 0xff, /* slot 4 */ 124 0xff, /* slot 5 */ 125 0xff, /* slot 6 */ 126 0xff, /* slot 7 */ 127 0xff, /* slot 8 */ 128 0xff, /* slot 9 */ 129 0xff, /* slot 10 */ 130 0xff, /* slot 11 */ 131 }, 132 { 133 0xff, /* slot 3 */ 134 0xff, /* slot 4 */ 135 0xff, /* slot 5 */ 136 0xff, /* slot 6 */ 137 0xff, /* slot 7 */ 138 0xff, /* slot 8 */ 139 0xff, /* slot 9 */ 140 0xff, /* slot 10 */ 141 0xff, /* slot 11 */ 142 } 143 }}; 144 145 /* FIXME: more various mappings for ADC? */ 146 static unsigned char rate_cregs[9] = { 147 AC97_PCM_LR_ADC_RATE, /* 3 */ 148 AC97_PCM_LR_ADC_RATE, /* 4 */ 149 0xff, /* 5 */ 150 AC97_PCM_MIC_ADC_RATE, /* 6 */ 151 0xff, /* 7 */ 152 0xff, /* 8 */ 153 0xff, /* 9 */ 154 0xff, /* 10 */ 155 0xff, /* 11 */ 156 }; 157 158 static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx, 159 unsigned short slot, int dbl) 160 { 161 if (slot < 3) 162 return 0xff; 163 if (slot > 11) 164 return 0xff; 165 if (pcm->spdif) 166 return AC97_SPDIF; /* pseudo register */ 167 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK) 168 return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3]; 169 else 170 return rate_cregs[slot - 3]; 171 } 172 173 static int set_spdif_rate(ac97_t *ac97, unsigned short rate) 174 { 175 unsigned short old, bits, reg, mask; 176 unsigned int sbits; 177 178 if (! (ac97->ext_id & AC97_EI_SPDIF)) 179 return -ENODEV; 180 181 /* TODO: double rate support */ 182 if (ac97->flags & AC97_CS_SPDIF) { 183 switch (rate) { 184 case 48000: bits = 0; break; 185 case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break; 186 default: /* invalid - disable output */ 187 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 188 return -EINVAL; 189 } 190 reg = AC97_CSR_SPDIF; 191 mask = 1 << AC97_SC_SPSR_SHIFT; 192 } else { 193 if (ac97->id == AC97_ID_CM9739 && rate != 48000) { 194 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 195 return -EINVAL; 196 } 197 switch (rate) { 198 case 44100: bits = AC97_SC_SPSR_44K; break; 199 case 48000: bits = AC97_SC_SPSR_48K; break; 200 case 32000: bits = AC97_SC_SPSR_32K; break; 201 default: /* invalid - disable output */ 202 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 203 return -EINVAL; 204 } 205 reg = AC97_SPDIF; 206 mask = AC97_SC_SPSR_MASK; 207 } 208 209 down(&ac97->reg_mutex); 210 old = snd_ac97_read(ac97, reg) & mask; 211 if (old != bits) { 212 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 213 snd_ac97_update_bits_nolock(ac97, reg, mask, bits); 214 /* update the internal spdif bits */ 215 sbits = ac97->spdif_status; 216 if (sbits & IEC958_AES0_PROFESSIONAL) { 217 sbits &= ~IEC958_AES0_PRO_FS; 218 switch (rate) { 219 case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break; 220 case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break; 221 case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break; 222 } 223 } else { 224 sbits &= ~(IEC958_AES3_CON_FS << 24); 225 switch (rate) { 226 case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break; 227 case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break; 228 case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break; 229 } 230 } 231 ac97->spdif_status = sbits; 232 } 233 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF); 234 up(&ac97->reg_mutex); 235 return 0; 236 } 237 238 /** 239 * snd_ac97_set_rate - change the rate of the given input/output. 240 * @ac97: the ac97 instance 241 * @reg: the register to change 242 * @rate: the sample rate to set 243 * 244 * Changes the rate of the given input/output on the codec. 245 * If the codec doesn't support VAR, the rate must be 48000 (except 246 * for SPDIF). 247 * 248 * The valid registers are AC97_PMC_MIC_ADC_RATE, 249 * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE. 250 * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted 251 * if the codec supports them. 252 * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF 253 * status bits. 254 * 255 * Returns zero if successful, or a negative error code on failure. 256 */ 257 int snd_ac97_set_rate(ac97_t *ac97, int reg, unsigned int rate) 258 { 259 int dbl; 260 unsigned int tmp; 261 262 dbl = rate > 48000; 263 if (dbl) { 264 if (!(ac97->flags & AC97_DOUBLE_RATE)) 265 return -EINVAL; 266 if (reg != AC97_PCM_FRONT_DAC_RATE) 267 return -EINVAL; 268 } 269 270 switch (reg) { 271 case AC97_PCM_MIC_ADC_RATE: 272 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */ 273 if (rate != 48000) 274 return -EINVAL; 275 break; 276 case AC97_PCM_FRONT_DAC_RATE: 277 case AC97_PCM_LR_ADC_RATE: 278 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */ 279 if (rate != 48000 && rate != 96000) 280 return -EINVAL; 281 break; 282 case AC97_PCM_SURR_DAC_RATE: 283 if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC)) 284 return -EINVAL; 285 break; 286 case AC97_PCM_LFE_DAC_RATE: 287 if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 288 return -EINVAL; 289 break; 290 case AC97_SPDIF: 291 /* special case */ 292 return set_spdif_rate(ac97, rate); 293 default: 294 return -EINVAL; 295 } 296 if (dbl) 297 rate /= 2; 298 tmp = (rate * ac97->bus->clock) / 48000; 299 if (tmp > 65535) 300 return -EINVAL; 301 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) 302 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, 303 AC97_EA_DRA, dbl ? AC97_EA_DRA : 0); 304 snd_ac97_update(ac97, reg, tmp & 0xffff); 305 snd_ac97_read(ac97, reg); 306 return 0; 307 } 308 309 static unsigned short get_pslots(ac97_t *ac97, unsigned char *rate_table, unsigned short *spdif_slots) 310 { 311 if (!ac97_is_audio(ac97)) 312 return 0; 313 if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) { 314 unsigned short slots = 0; 315 if (ac97_is_rev22(ac97)) { 316 /* Note: it's simply emulation of AMAP behaviour */ 317 u16 es; 318 es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK; 319 switch (ac97->addr) { 320 case 1: 321 case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break; 322 case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break; 323 } 324 snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es); 325 } 326 switch (ac97->addr) { 327 case 0: 328 slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 329 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 330 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 331 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC) 332 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 333 if (ac97->ext_id & AC97_EI_SPDIF) { 334 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 335 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT); 336 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 337 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 338 else 339 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 340 } 341 *rate_table = 0; 342 break; 343 case 1: 344 case 2: 345 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 346 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 347 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 348 if (ac97->ext_id & AC97_EI_SPDIF) { 349 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 350 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 351 else 352 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 353 } 354 *rate_table = 1; 355 break; 356 case 3: 357 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 358 if (ac97->ext_id & AC97_EI_SPDIF) 359 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 360 *rate_table = 2; 361 break; 362 } 363 return slots; 364 } else { 365 unsigned short slots; 366 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 367 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 368 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 369 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC) 370 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 371 if (ac97->ext_id & AC97_EI_SPDIF) { 372 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 373 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT); 374 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 375 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 376 else 377 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 378 } 379 *rate_table = 0; 380 return slots; 381 } 382 } 383 384 static unsigned short get_cslots(ac97_t *ac97) 385 { 386 unsigned short slots; 387 388 if (!ac97_is_audio(ac97)) 389 return 0; 390 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 391 slots |= (1<<AC97_SLOT_MIC); 392 return slots; 393 } 394 395 static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl) 396 { 397 int i, idx; 398 unsigned int rates = ~0; 399 unsigned char reg; 400 401 for (i = 3; i < 12; i++) { 402 if (!(slots & (1 << i))) 403 continue; 404 reg = get_slot_reg(pcm, cidx, i, dbl); 405 switch (reg) { 406 case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break; 407 case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break; 408 case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break; 409 case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break; 410 case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break; 411 default: idx = AC97_RATES_SPDIF; break; 412 } 413 rates &= pcm->r[dbl].codec[cidx]->rates[idx]; 414 } 415 if (!dbl) 416 rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | 417 SNDRV_PCM_RATE_96000); 418 return rates; 419 } 420 421 /** 422 * snd_ac97_pcm_assign - assign AC97 slots to given PCM streams 423 * @bus: the ac97 bus instance 424 * @pcms_count: count of PCMs to be assigned 425 * @pcms: PCMs to be assigned 426 * 427 * It assigns available AC97 slots for given PCMs. If none or only 428 * some slots are available, pcm->xxx.slots and pcm->xxx.rslots[] members 429 * are reduced and might be zero. 430 */ 431 int snd_ac97_pcm_assign(ac97_bus_t *bus, 432 unsigned short pcms_count, 433 const struct ac97_pcm *pcms) 434 { 435 int i, j, k; 436 const struct ac97_pcm *pcm; 437 struct ac97_pcm *rpcms, *rpcm; 438 unsigned short avail_slots[2][4]; 439 unsigned char rate_table[2][4]; 440 unsigned short tmp, slots; 441 unsigned short spdif_slots[4]; 442 unsigned int rates; 443 ac97_t *codec; 444 445 rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL); 446 if (rpcms == NULL) 447 return -ENOMEM; 448 memset(avail_slots, 0, sizeof(avail_slots)); 449 memset(rate_table, 0, sizeof(rate_table)); 450 memset(spdif_slots, 0, sizeof(spdif_slots)); 451 for (i = 0; i < 4; i++) { 452 codec = bus->codec[i]; 453 if (!codec) 454 continue; 455 avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]); 456 avail_slots[1][i] = get_cslots(codec); 457 if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) { 458 for (j = 0; j < i; j++) { 459 if (bus->codec[j]) 460 avail_slots[1][i] &= ~avail_slots[1][j]; 461 } 462 } 463 } 464 /* first step - exclusive devices */ 465 for (i = 0; i < pcms_count; i++) { 466 pcm = &pcms[i]; 467 rpcm = &rpcms[i]; 468 /* low-level driver thinks that it's more clever */ 469 if (pcm->copy_flag) { 470 *rpcm = *pcm; 471 continue; 472 } 473 rpcm->stream = pcm->stream; 474 rpcm->exclusive = pcm->exclusive; 475 rpcm->spdif = pcm->spdif; 476 rpcm->private_value = pcm->private_value; 477 rpcm->bus = bus; 478 rpcm->rates = ~0; 479 slots = pcm->r[0].slots; 480 for (j = 0; j < 4 && slots; j++) { 481 if (!bus->codec[j]) 482 continue; 483 rates = ~0; 484 if (pcm->spdif && pcm->stream == 0) 485 tmp = spdif_slots[j]; 486 else 487 tmp = avail_slots[pcm->stream][j]; 488 if (pcm->exclusive) { 489 /* exclusive access */ 490 tmp &= slots; 491 for (k = 0; k < i; k++) { 492 if (rpcm->stream == rpcms[k].stream) 493 tmp &= ~rpcms[k].r[0].rslots[j]; 494 } 495 } else { 496 /* non-exclusive access */ 497 tmp &= pcm->r[0].slots; 498 } 499 if (tmp) { 500 rpcm->r[0].rslots[j] = tmp; 501 rpcm->r[0].codec[j] = bus->codec[j]; 502 rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j]; 503 if (bus->no_vra) 504 rates = SNDRV_PCM_RATE_48000; 505 else 506 rates = get_rates(rpcm, j, tmp, 0); 507 if (pcm->exclusive) 508 avail_slots[pcm->stream][j] &= ~tmp; 509 } 510 slots &= ~tmp; 511 rpcm->r[0].slots |= tmp; 512 rpcm->rates &= rates; 513 } 514 /* for double rate, we check the first codec only */ 515 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK && 516 bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) && 517 rate_table[pcm->stream][0] == 0) { 518 tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) | 519 (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0); 520 if ((tmp & pcm->r[1].slots) == tmp) { 521 rpcm->r[1].slots = tmp; 522 rpcm->r[1].rslots[0] = tmp; 523 rpcm->r[1].rate_table[0] = 0; 524 rpcm->r[1].codec[0] = bus->codec[0]; 525 if (pcm->exclusive) 526 avail_slots[pcm->stream][0] &= ~tmp; 527 if (bus->no_vra) 528 rates = SNDRV_PCM_RATE_96000; 529 else 530 rates = get_rates(rpcm, 0, tmp, 1); 531 rpcm->rates |= rates; 532 } 533 } 534 if (rpcm->rates == ~0) 535 rpcm->rates = 0; /* not used */ 536 } 537 bus->pcms_count = pcms_count; 538 bus->pcms = rpcms; 539 return 0; 540 } 541 542 /** 543 * snd_ac97_pcm_open - opens the given AC97 pcm 544 * @pcm: the ac97 pcm instance 545 * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz 546 * @cfg: output stream characteristics 547 * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm 548 * 549 * It locks the specified slots and sets the given rate to AC97 registers. 550 */ 551 int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate, 552 enum ac97_pcm_cfg cfg, unsigned short slots) 553 { 554 ac97_bus_t *bus; 555 int i, cidx, r, ok_flag; 556 unsigned int reg_ok[4] = {0,0,0,0}; 557 unsigned char reg; 558 int err = 0; 559 560 r = rate > 48000; 561 bus = pcm->bus; 562 if (cfg == AC97_PCM_CFG_SPDIF) { 563 int err; 564 for (cidx = 0; cidx < 4; cidx++) 565 if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) { 566 err = set_spdif_rate(bus->codec[cidx], rate); 567 if (err < 0) 568 return err; 569 } 570 } 571 spin_lock_irq(&pcm->bus->bus_lock); 572 for (i = 3; i < 12; i++) { 573 if (!(slots & (1 << i))) 574 continue; 575 ok_flag = 0; 576 for (cidx = 0; cidx < 4; cidx++) { 577 if (bus->used_slots[pcm->stream][cidx] & (1 << i)) { 578 spin_unlock_irq(&pcm->bus->bus_lock); 579 err = -EBUSY; 580 goto error; 581 } 582 if (pcm->r[r].rslots[cidx] & (1 << i)) { 583 bus->used_slots[pcm->stream][cidx] |= (1 << i); 584 ok_flag++; 585 } 586 } 587 if (!ok_flag) { 588 spin_unlock_irq(&pcm->bus->bus_lock); 589 snd_printk(KERN_ERR "cannot find configuration for AC97 slot %i\n", i); 590 err = -EAGAIN; 591 goto error; 592 } 593 } 594 spin_unlock_irq(&pcm->bus->bus_lock); 595 for (i = 3; i < 12; i++) { 596 if (!(slots & (1 << i))) 597 continue; 598 for (cidx = 0; cidx < 4; cidx++) { 599 if (pcm->r[r].rslots[cidx] & (1 << i)) { 600 reg = get_slot_reg(pcm, cidx, i, r); 601 if (reg == 0xff) { 602 snd_printk(KERN_ERR "invalid AC97 slot %i?\n", i); 603 continue; 604 } 605 if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE))) 606 continue; 607 //printk(KERN_DEBUG "setting ac97 reg 0x%x to rate %d\n", reg, rate); 608 err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate); 609 if (err < 0) 610 snd_printk(KERN_ERR "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n", cidx, reg, rate, err); 611 else 612 reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE)); 613 } 614 } 615 } 616 pcm->aslots = slots; 617 return 0; 618 619 error: 620 pcm->aslots = slots; 621 snd_ac97_pcm_close(pcm); 622 return err; 623 } 624 625 /** 626 * snd_ac97_pcm_close - closes the given AC97 pcm 627 * @pcm: the ac97 pcm instance 628 * 629 * It frees the locked AC97 slots. 630 */ 631 int snd_ac97_pcm_close(struct ac97_pcm *pcm) 632 { 633 ac97_bus_t *bus; 634 unsigned short slots = pcm->aslots; 635 int i, cidx; 636 637 bus = pcm->bus; 638 spin_lock_irq(&pcm->bus->bus_lock); 639 for (i = 3; i < 12; i++) { 640 if (!(slots & (1 << i))) 641 continue; 642 for (cidx = 0; cidx < 4; cidx++) 643 bus->used_slots[pcm->stream][cidx] &= ~(1 << i); 644 } 645 pcm->aslots = 0; 646 spin_unlock_irq(&pcm->bus->bus_lock); 647 return 0; 648 } 649 650 static int double_rate_hw_constraint_rate(snd_pcm_hw_params_t *params, 651 snd_pcm_hw_rule_t *rule) 652 { 653 snd_interval_t *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 654 if (channels->min > 2) { 655 static const snd_interval_t single_rates = { 656 .min = 1, 657 .max = 48000, 658 }; 659 snd_interval_t *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 660 return snd_interval_refine(rate, &single_rates); 661 } 662 return 0; 663 } 664 665 static int double_rate_hw_constraint_channels(snd_pcm_hw_params_t *params, 666 snd_pcm_hw_rule_t *rule) 667 { 668 snd_interval_t *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 669 if (rate->min > 48000) { 670 static const snd_interval_t double_rate_channels = { 671 .min = 2, 672 .max = 2, 673 }; 674 snd_interval_t *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 675 return snd_interval_refine(channels, &double_rate_channels); 676 } 677 return 0; 678 } 679 680 /** 681 * snd_ac97_pcm_double_rate_rules - set double rate constraints 682 * @runtime: the runtime of the ac97 front playback pcm 683 * 684 * Installs the hardware constraint rules to prevent using double rates and 685 * more than two channels at the same time. 686 */ 687 int snd_ac97_pcm_double_rate_rules(snd_pcm_runtime_t *runtime) 688 { 689 int err; 690 691 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 692 double_rate_hw_constraint_rate, NULL, 693 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 694 if (err < 0) 695 return err; 696 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 697 double_rate_hw_constraint_channels, NULL, 698 SNDRV_PCM_HW_PARAM_RATE, -1); 699 return err; 700 } 701