1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * Routines for control of 16-bit SoundBlaster cards and clones 5 * Note: This is very ugly hardware which uses one 8-bit DMA channel and 6 * second 16-bit DMA channel. Unfortunately 8-bit DMA channel can't 7 * transfer 16-bit samples and 16-bit DMA channels can't transfer 8 * 8-bit samples. This make full duplex more complicated than 9 * can be... People, don't buy these soundcards for full 16-bit 10 * duplex!!! 11 * Note: 16-bit wide is assigned to first direction which made request. 12 * With full duplex - playback is preferred with abstract layer. 13 * 14 * Note: Some chip revisions have hardware bug. Changing capture 15 * channel from full-duplex 8bit DMA to 16bit DMA will block 16 * 16bit DMA transfers from DSP chip (capture) until 8bit transfer 17 * to DSP chip (playback) starts. This bug can be avoided with 18 * "16bit DMA Allocation" setting set to Playback or Capture. 19 */ 20 21 #include <linux/io.h> 22 #include <asm/dma.h> 23 #include <linux/init.h> 24 #include <linux/time.h> 25 #include <linux/module.h> 26 #include <sound/core.h> 27 #include <sound/sb.h> 28 #include <sound/sb16_csp.h> 29 #include <sound/mpu401.h> 30 #include <sound/control.h> 31 #include <sound/info.h> 32 33 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 34 MODULE_DESCRIPTION("Routines for control of 16-bit SoundBlaster cards and clones"); 35 MODULE_LICENSE("GPL"); 36 37 #define runtime_format_bits(runtime) \ 38 ((unsigned int)pcm_format_to_bits((runtime)->format)) 39 40 #ifdef CONFIG_SND_SB16_CSP 41 static void snd_sb16_csp_playback_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime) 42 { 43 if (chip->hardware == SB_HW_16CSP) { 44 struct snd_sb_csp *csp = chip->csp; 45 46 if (csp->running & SNDRV_SB_CSP_ST_LOADED) { 47 /* manually loaded codec */ 48 if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) && 49 (runtime_format_bits(runtime) == csp->acc_format)) { 50 /* Supported runtime PCM format for playback */ 51 if (csp->ops.csp_use(csp) == 0) { 52 /* If CSP was successfully acquired */ 53 goto __start_CSP; 54 } 55 } else if ((csp->mode & SNDRV_SB_CSP_MODE_QSOUND) && (csp->q_enabled)) { 56 /* QSound decoder is loaded and enabled */ 57 if (runtime_format_bits(runtime) & (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | 58 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE)) { 59 /* Only for simple PCM formats */ 60 if (csp->ops.csp_use(csp) == 0) { 61 /* If CSP was successfully acquired */ 62 goto __start_CSP; 63 } 64 } 65 } 66 } else if (csp->ops.csp_use(csp) == 0) { 67 /* Acquire CSP and try to autoload hardware codec */ 68 if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_WRITE)) { 69 /* Unsupported format, release CSP */ 70 csp->ops.csp_unuse(csp); 71 } else { 72 __start_CSP: 73 /* Try to start CSP */ 74 if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_PLAYBACK_16) ? 75 SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT, 76 (runtime->channels > 1) ? 77 SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) { 78 /* Failed, release CSP */ 79 csp->ops.csp_unuse(csp); 80 } else { 81 /* Success, CSP acquired and running */ 82 chip->open = SNDRV_SB_CSP_MODE_DSP_WRITE; 83 } 84 } 85 } 86 } 87 } 88 89 static void snd_sb16_csp_capture_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime) 90 { 91 if (chip->hardware == SB_HW_16CSP) { 92 struct snd_sb_csp *csp = chip->csp; 93 94 if (csp->running & SNDRV_SB_CSP_ST_LOADED) { 95 /* manually loaded codec */ 96 if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) && 97 (runtime_format_bits(runtime) == csp->acc_format)) { 98 /* Supported runtime PCM format for capture */ 99 if (csp->ops.csp_use(csp) == 0) { 100 /* If CSP was successfully acquired */ 101 goto __start_CSP; 102 } 103 } 104 } else if (csp->ops.csp_use(csp) == 0) { 105 /* Acquire CSP and try to autoload hardware codec */ 106 if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_READ)) { 107 /* Unsupported format, release CSP */ 108 csp->ops.csp_unuse(csp); 109 } else { 110 __start_CSP: 111 /* Try to start CSP */ 112 if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_CAPTURE_16) ? 113 SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT, 114 (runtime->channels > 1) ? 115 SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) { 116 /* Failed, release CSP */ 117 csp->ops.csp_unuse(csp); 118 } else { 119 /* Success, CSP acquired and running */ 120 chip->open = SNDRV_SB_CSP_MODE_DSP_READ; 121 } 122 } 123 } 124 } 125 } 126 127 static void snd_sb16_csp_update(struct snd_sb *chip) 128 { 129 if (chip->hardware == SB_HW_16CSP) { 130 struct snd_sb_csp *csp = chip->csp; 131 132 if (csp->qpos_changed) { 133 spin_lock(&chip->reg_lock); 134 csp->ops.csp_qsound_transfer (csp); 135 spin_unlock(&chip->reg_lock); 136 } 137 } 138 } 139 140 static void snd_sb16_csp_playback_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime) 141 { 142 /* CSP decoders (QSound excluded) support only 16bit transfers */ 143 if (chip->hardware == SB_HW_16CSP) { 144 struct snd_sb_csp *csp = chip->csp; 145 146 if (csp->running & SNDRV_SB_CSP_ST_LOADED) { 147 /* manually loaded codec */ 148 if (csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) { 149 runtime->hw.formats |= csp->acc_format; 150 } 151 } else { 152 /* autoloaded codecs */ 153 runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | 154 SNDRV_PCM_FMTBIT_IMA_ADPCM; 155 } 156 } 157 } 158 159 static void snd_sb16_csp_playback_close(struct snd_sb *chip) 160 { 161 if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_WRITE)) { 162 struct snd_sb_csp *csp = chip->csp; 163 164 if (csp->ops.csp_stop(csp) == 0) { 165 csp->ops.csp_unuse(csp); 166 chip->open = 0; 167 } 168 } 169 } 170 171 static void snd_sb16_csp_capture_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime) 172 { 173 /* CSP coders support only 16bit transfers */ 174 if (chip->hardware == SB_HW_16CSP) { 175 struct snd_sb_csp *csp = chip->csp; 176 177 if (csp->running & SNDRV_SB_CSP_ST_LOADED) { 178 /* manually loaded codec */ 179 if (csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) { 180 runtime->hw.formats |= csp->acc_format; 181 } 182 } else { 183 /* autoloaded codecs */ 184 runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | 185 SNDRV_PCM_FMTBIT_IMA_ADPCM; 186 } 187 } 188 } 189 190 static void snd_sb16_csp_capture_close(struct snd_sb *chip) 191 { 192 if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_READ)) { 193 struct snd_sb_csp *csp = chip->csp; 194 195 if (csp->ops.csp_stop(csp) == 0) { 196 csp->ops.csp_unuse(csp); 197 chip->open = 0; 198 } 199 } 200 } 201 #else 202 #define snd_sb16_csp_playback_prepare(chip, runtime) /*nop*/ 203 #define snd_sb16_csp_capture_prepare(chip, runtime) /*nop*/ 204 #define snd_sb16_csp_update(chip) /*nop*/ 205 #define snd_sb16_csp_playback_open(chip, runtime) /*nop*/ 206 #define snd_sb16_csp_playback_close(chip) /*nop*/ 207 #define snd_sb16_csp_capture_open(chip, runtime) /*nop*/ 208 #define snd_sb16_csp_capture_close(chip) /*nop*/ 209 #endif 210 211 212 static void snd_sb16_setup_rate(struct snd_sb *chip, 213 unsigned short rate, 214 int channel) 215 { 216 unsigned long flags; 217 218 spin_lock_irqsave(&chip->reg_lock, flags); 219 if (chip->mode & (channel == SNDRV_PCM_STREAM_PLAYBACK ? SB_MODE_PLAYBACK_16 : SB_MODE_CAPTURE_16)) 220 snd_sb_ack_16bit(chip); 221 else 222 snd_sb_ack_8bit(chip); 223 if (!(chip->mode & SB_RATE_LOCK)) { 224 chip->locked_rate = rate; 225 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_IN); 226 snd_sbdsp_command(chip, rate >> 8); 227 snd_sbdsp_command(chip, rate & 0xff); 228 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT); 229 snd_sbdsp_command(chip, rate >> 8); 230 snd_sbdsp_command(chip, rate & 0xff); 231 } 232 spin_unlock_irqrestore(&chip->reg_lock, flags); 233 } 234 235 static int snd_sb16_hw_params(struct snd_pcm_substream *substream, 236 struct snd_pcm_hw_params *hw_params) 237 { 238 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 239 } 240 241 static int snd_sb16_hw_free(struct snd_pcm_substream *substream) 242 { 243 snd_pcm_lib_free_pages(substream); 244 return 0; 245 } 246 247 static int snd_sb16_playback_prepare(struct snd_pcm_substream *substream) 248 { 249 unsigned long flags; 250 struct snd_sb *chip = snd_pcm_substream_chip(substream); 251 struct snd_pcm_runtime *runtime = substream->runtime; 252 unsigned char format; 253 unsigned int size, count, dma; 254 255 snd_sb16_csp_playback_prepare(chip, runtime); 256 if (snd_pcm_format_unsigned(runtime->format) > 0) { 257 format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO; 258 } else { 259 format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO; 260 } 261 262 snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_PLAYBACK); 263 size = chip->p_dma_size = snd_pcm_lib_buffer_bytes(substream); 264 dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16; 265 snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT); 266 267 count = snd_pcm_lib_period_bytes(substream); 268 spin_lock_irqsave(&chip->reg_lock, flags); 269 if (chip->mode & SB_MODE_PLAYBACK_16) { 270 count >>= 1; 271 count--; 272 snd_sbdsp_command(chip, SB_DSP4_OUT16_AI); 273 snd_sbdsp_command(chip, format); 274 snd_sbdsp_command(chip, count & 0xff); 275 snd_sbdsp_command(chip, count >> 8); 276 snd_sbdsp_command(chip, SB_DSP_DMA16_OFF); 277 } else { 278 count--; 279 snd_sbdsp_command(chip, SB_DSP4_OUT8_AI); 280 snd_sbdsp_command(chip, format); 281 snd_sbdsp_command(chip, count & 0xff); 282 snd_sbdsp_command(chip, count >> 8); 283 snd_sbdsp_command(chip, SB_DSP_DMA8_OFF); 284 } 285 spin_unlock_irqrestore(&chip->reg_lock, flags); 286 return 0; 287 } 288 289 static int snd_sb16_playback_trigger(struct snd_pcm_substream *substream, 290 int cmd) 291 { 292 struct snd_sb *chip = snd_pcm_substream_chip(substream); 293 int result = 0; 294 295 spin_lock(&chip->reg_lock); 296 switch (cmd) { 297 case SNDRV_PCM_TRIGGER_START: 298 case SNDRV_PCM_TRIGGER_RESUME: 299 chip->mode |= SB_RATE_LOCK_PLAYBACK; 300 snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON); 301 break; 302 case SNDRV_PCM_TRIGGER_STOP: 303 case SNDRV_PCM_TRIGGER_SUSPEND: 304 snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF); 305 /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */ 306 if (chip->mode & SB_RATE_LOCK_CAPTURE) 307 snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON); 308 chip->mode &= ~SB_RATE_LOCK_PLAYBACK; 309 break; 310 default: 311 result = -EINVAL; 312 } 313 spin_unlock(&chip->reg_lock); 314 return result; 315 } 316 317 static int snd_sb16_capture_prepare(struct snd_pcm_substream *substream) 318 { 319 unsigned long flags; 320 struct snd_sb *chip = snd_pcm_substream_chip(substream); 321 struct snd_pcm_runtime *runtime = substream->runtime; 322 unsigned char format; 323 unsigned int size, count, dma; 324 325 snd_sb16_csp_capture_prepare(chip, runtime); 326 if (snd_pcm_format_unsigned(runtime->format) > 0) { 327 format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO; 328 } else { 329 format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO; 330 } 331 snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_CAPTURE); 332 size = chip->c_dma_size = snd_pcm_lib_buffer_bytes(substream); 333 dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16; 334 snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT); 335 336 count = snd_pcm_lib_period_bytes(substream); 337 spin_lock_irqsave(&chip->reg_lock, flags); 338 if (chip->mode & SB_MODE_CAPTURE_16) { 339 count >>= 1; 340 count--; 341 snd_sbdsp_command(chip, SB_DSP4_IN16_AI); 342 snd_sbdsp_command(chip, format); 343 snd_sbdsp_command(chip, count & 0xff); 344 snd_sbdsp_command(chip, count >> 8); 345 snd_sbdsp_command(chip, SB_DSP_DMA16_OFF); 346 } else { 347 count--; 348 snd_sbdsp_command(chip, SB_DSP4_IN8_AI); 349 snd_sbdsp_command(chip, format); 350 snd_sbdsp_command(chip, count & 0xff); 351 snd_sbdsp_command(chip, count >> 8); 352 snd_sbdsp_command(chip, SB_DSP_DMA8_OFF); 353 } 354 spin_unlock_irqrestore(&chip->reg_lock, flags); 355 return 0; 356 } 357 358 static int snd_sb16_capture_trigger(struct snd_pcm_substream *substream, 359 int cmd) 360 { 361 struct snd_sb *chip = snd_pcm_substream_chip(substream); 362 int result = 0; 363 364 spin_lock(&chip->reg_lock); 365 switch (cmd) { 366 case SNDRV_PCM_TRIGGER_START: 367 case SNDRV_PCM_TRIGGER_RESUME: 368 chip->mode |= SB_RATE_LOCK_CAPTURE; 369 snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON); 370 break; 371 case SNDRV_PCM_TRIGGER_STOP: 372 case SNDRV_PCM_TRIGGER_SUSPEND: 373 snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF); 374 /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */ 375 if (chip->mode & SB_RATE_LOCK_PLAYBACK) 376 snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON); 377 chip->mode &= ~SB_RATE_LOCK_CAPTURE; 378 break; 379 default: 380 result = -EINVAL; 381 } 382 spin_unlock(&chip->reg_lock); 383 return result; 384 } 385 386 irqreturn_t snd_sb16dsp_interrupt(int irq, void *dev_id) 387 { 388 struct snd_sb *chip = dev_id; 389 unsigned char status; 390 int ok; 391 392 spin_lock(&chip->mixer_lock); 393 status = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS); 394 spin_unlock(&chip->mixer_lock); 395 if ((status & SB_IRQTYPE_MPUIN) && chip->rmidi_callback) 396 chip->rmidi_callback(irq, chip->rmidi->private_data); 397 if (status & SB_IRQTYPE_8BIT) { 398 ok = 0; 399 if (chip->mode & SB_MODE_PLAYBACK_8) { 400 snd_pcm_period_elapsed(chip->playback_substream); 401 snd_sb16_csp_update(chip); 402 ok++; 403 } 404 if (chip->mode & SB_MODE_CAPTURE_8) { 405 snd_pcm_period_elapsed(chip->capture_substream); 406 ok++; 407 } 408 spin_lock(&chip->reg_lock); 409 if (!ok) 410 snd_sbdsp_command(chip, SB_DSP_DMA8_OFF); 411 snd_sb_ack_8bit(chip); 412 spin_unlock(&chip->reg_lock); 413 } 414 if (status & SB_IRQTYPE_16BIT) { 415 ok = 0; 416 if (chip->mode & SB_MODE_PLAYBACK_16) { 417 snd_pcm_period_elapsed(chip->playback_substream); 418 snd_sb16_csp_update(chip); 419 ok++; 420 } 421 if (chip->mode & SB_MODE_CAPTURE_16) { 422 snd_pcm_period_elapsed(chip->capture_substream); 423 ok++; 424 } 425 spin_lock(&chip->reg_lock); 426 if (!ok) 427 snd_sbdsp_command(chip, SB_DSP_DMA16_OFF); 428 snd_sb_ack_16bit(chip); 429 spin_unlock(&chip->reg_lock); 430 } 431 return IRQ_HANDLED; 432 } 433 434 /* 435 436 */ 437 438 static snd_pcm_uframes_t snd_sb16_playback_pointer(struct snd_pcm_substream *substream) 439 { 440 struct snd_sb *chip = snd_pcm_substream_chip(substream); 441 unsigned int dma; 442 size_t ptr; 443 444 dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16; 445 ptr = snd_dma_pointer(dma, chip->p_dma_size); 446 return bytes_to_frames(substream->runtime, ptr); 447 } 448 449 static snd_pcm_uframes_t snd_sb16_capture_pointer(struct snd_pcm_substream *substream) 450 { 451 struct snd_sb *chip = snd_pcm_substream_chip(substream); 452 unsigned int dma; 453 size_t ptr; 454 455 dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16; 456 ptr = snd_dma_pointer(dma, chip->c_dma_size); 457 return bytes_to_frames(substream->runtime, ptr); 458 } 459 460 /* 461 462 */ 463 464 static const struct snd_pcm_hardware snd_sb16_playback = 465 { 466 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 467 SNDRV_PCM_INFO_MMAP_VALID), 468 .formats = 0, 469 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100, 470 .rate_min = 4000, 471 .rate_max = 44100, 472 .channels_min = 1, 473 .channels_max = 2, 474 .buffer_bytes_max = (128*1024), 475 .period_bytes_min = 64, 476 .period_bytes_max = (128*1024), 477 .periods_min = 1, 478 .periods_max = 1024, 479 .fifo_size = 0, 480 }; 481 482 static const struct snd_pcm_hardware snd_sb16_capture = 483 { 484 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 485 SNDRV_PCM_INFO_MMAP_VALID), 486 .formats = 0, 487 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100, 488 .rate_min = 4000, 489 .rate_max = 44100, 490 .channels_min = 1, 491 .channels_max = 2, 492 .buffer_bytes_max = (128*1024), 493 .period_bytes_min = 64, 494 .period_bytes_max = (128*1024), 495 .periods_min = 1, 496 .periods_max = 1024, 497 .fifo_size = 0, 498 }; 499 500 /* 501 * open/close 502 */ 503 504 static int snd_sb16_playback_open(struct snd_pcm_substream *substream) 505 { 506 unsigned long flags; 507 struct snd_sb *chip = snd_pcm_substream_chip(substream); 508 struct snd_pcm_runtime *runtime = substream->runtime; 509 510 spin_lock_irqsave(&chip->open_lock, flags); 511 if (chip->mode & SB_MODE_PLAYBACK) { 512 spin_unlock_irqrestore(&chip->open_lock, flags); 513 return -EAGAIN; 514 } 515 runtime->hw = snd_sb16_playback; 516 517 /* skip if 16 bit DMA was reserved for capture */ 518 if (chip->force_mode16 & SB_MODE_CAPTURE_16) 519 goto __skip_16bit; 520 521 if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_CAPTURE_16)) { 522 chip->mode |= SB_MODE_PLAYBACK_16; 523 runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE; 524 /* Vibra16X hack */ 525 if (chip->dma16 <= 3) { 526 runtime->hw.buffer_bytes_max = 527 runtime->hw.period_bytes_max = 64 * 1024; 528 } else { 529 snd_sb16_csp_playback_open(chip, runtime); 530 } 531 goto __open_ok; 532 } 533 534 __skip_16bit: 535 if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_CAPTURE_8)) { 536 chip->mode |= SB_MODE_PLAYBACK_8; 537 /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */ 538 if (chip->dma16 < 0) { 539 runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE; 540 chip->mode |= SB_MODE_PLAYBACK_16; 541 } else { 542 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8; 543 } 544 runtime->hw.buffer_bytes_max = 545 runtime->hw.period_bytes_max = 64 * 1024; 546 goto __open_ok; 547 } 548 spin_unlock_irqrestore(&chip->open_lock, flags); 549 return -EAGAIN; 550 551 __open_ok: 552 if (chip->hardware == SB_HW_ALS100) 553 runtime->hw.rate_max = 48000; 554 if (chip->hardware == SB_HW_CS5530) { 555 runtime->hw.buffer_bytes_max = 32 * 1024; 556 runtime->hw.periods_min = 2; 557 runtime->hw.rate_min = 44100; 558 } 559 if (chip->mode & SB_RATE_LOCK) 560 runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate; 561 chip->playback_substream = substream; 562 spin_unlock_irqrestore(&chip->open_lock, flags); 563 return 0; 564 } 565 566 static int snd_sb16_playback_close(struct snd_pcm_substream *substream) 567 { 568 unsigned long flags; 569 struct snd_sb *chip = snd_pcm_substream_chip(substream); 570 571 snd_sb16_csp_playback_close(chip); 572 spin_lock_irqsave(&chip->open_lock, flags); 573 chip->playback_substream = NULL; 574 chip->mode &= ~SB_MODE_PLAYBACK; 575 spin_unlock_irqrestore(&chip->open_lock, flags); 576 return 0; 577 } 578 579 static int snd_sb16_capture_open(struct snd_pcm_substream *substream) 580 { 581 unsigned long flags; 582 struct snd_sb *chip = snd_pcm_substream_chip(substream); 583 struct snd_pcm_runtime *runtime = substream->runtime; 584 585 spin_lock_irqsave(&chip->open_lock, flags); 586 if (chip->mode & SB_MODE_CAPTURE) { 587 spin_unlock_irqrestore(&chip->open_lock, flags); 588 return -EAGAIN; 589 } 590 runtime->hw = snd_sb16_capture; 591 592 /* skip if 16 bit DMA was reserved for playback */ 593 if (chip->force_mode16 & SB_MODE_PLAYBACK_16) 594 goto __skip_16bit; 595 596 if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_16)) { 597 chip->mode |= SB_MODE_CAPTURE_16; 598 runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE; 599 /* Vibra16X hack */ 600 if (chip->dma16 <= 3) { 601 runtime->hw.buffer_bytes_max = 602 runtime->hw.period_bytes_max = 64 * 1024; 603 } else { 604 snd_sb16_csp_capture_open(chip, runtime); 605 } 606 goto __open_ok; 607 } 608 609 __skip_16bit: 610 if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_8)) { 611 chip->mode |= SB_MODE_CAPTURE_8; 612 /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */ 613 if (chip->dma16 < 0) { 614 runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE; 615 chip->mode |= SB_MODE_CAPTURE_16; 616 } else { 617 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8; 618 } 619 runtime->hw.buffer_bytes_max = 620 runtime->hw.period_bytes_max = 64 * 1024; 621 goto __open_ok; 622 } 623 spin_unlock_irqrestore(&chip->open_lock, flags); 624 return -EAGAIN; 625 626 __open_ok: 627 if (chip->hardware == SB_HW_ALS100) 628 runtime->hw.rate_max = 48000; 629 if (chip->hardware == SB_HW_CS5530) { 630 runtime->hw.buffer_bytes_max = 32 * 1024; 631 runtime->hw.periods_min = 2; 632 runtime->hw.rate_min = 44100; 633 } 634 if (chip->mode & SB_RATE_LOCK) 635 runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate; 636 chip->capture_substream = substream; 637 spin_unlock_irqrestore(&chip->open_lock, flags); 638 return 0; 639 } 640 641 static int snd_sb16_capture_close(struct snd_pcm_substream *substream) 642 { 643 unsigned long flags; 644 struct snd_sb *chip = snd_pcm_substream_chip(substream); 645 646 snd_sb16_csp_capture_close(chip); 647 spin_lock_irqsave(&chip->open_lock, flags); 648 chip->capture_substream = NULL; 649 chip->mode &= ~SB_MODE_CAPTURE; 650 spin_unlock_irqrestore(&chip->open_lock, flags); 651 return 0; 652 } 653 654 /* 655 * DMA control interface 656 */ 657 658 static int snd_sb16_set_dma_mode(struct snd_sb *chip, int what) 659 { 660 if (chip->dma8 < 0 || chip->dma16 < 0) { 661 if (snd_BUG_ON(what)) 662 return -EINVAL; 663 return 0; 664 } 665 if (what == 0) { 666 chip->force_mode16 = 0; 667 } else if (what == 1) { 668 chip->force_mode16 = SB_MODE_PLAYBACK_16; 669 } else if (what == 2) { 670 chip->force_mode16 = SB_MODE_CAPTURE_16; 671 } else { 672 return -EINVAL; 673 } 674 return 0; 675 } 676 677 static int snd_sb16_get_dma_mode(struct snd_sb *chip) 678 { 679 if (chip->dma8 < 0 || chip->dma16 < 0) 680 return 0; 681 switch (chip->force_mode16) { 682 case SB_MODE_PLAYBACK_16: 683 return 1; 684 case SB_MODE_CAPTURE_16: 685 return 2; 686 default: 687 return 0; 688 } 689 } 690 691 static int snd_sb16_dma_control_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 692 { 693 static const char * const texts[3] = { 694 "Auto", "Playback", "Capture" 695 }; 696 697 return snd_ctl_enum_info(uinfo, 1, 3, texts); 698 } 699 700 static int snd_sb16_dma_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 701 { 702 struct snd_sb *chip = snd_kcontrol_chip(kcontrol); 703 unsigned long flags; 704 705 spin_lock_irqsave(&chip->reg_lock, flags); 706 ucontrol->value.enumerated.item[0] = snd_sb16_get_dma_mode(chip); 707 spin_unlock_irqrestore(&chip->reg_lock, flags); 708 return 0; 709 } 710 711 static int snd_sb16_dma_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 712 { 713 struct snd_sb *chip = snd_kcontrol_chip(kcontrol); 714 unsigned long flags; 715 unsigned char nval, oval; 716 int change; 717 718 if ((nval = ucontrol->value.enumerated.item[0]) > 2) 719 return -EINVAL; 720 spin_lock_irqsave(&chip->reg_lock, flags); 721 oval = snd_sb16_get_dma_mode(chip); 722 change = nval != oval; 723 snd_sb16_set_dma_mode(chip, nval); 724 spin_unlock_irqrestore(&chip->reg_lock, flags); 725 return change; 726 } 727 728 static const struct snd_kcontrol_new snd_sb16_dma_control = { 729 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 730 .name = "16-bit DMA Allocation", 731 .info = snd_sb16_dma_control_info, 732 .get = snd_sb16_dma_control_get, 733 .put = snd_sb16_dma_control_put 734 }; 735 736 /* 737 * Initialization part 738 */ 739 740 int snd_sb16dsp_configure(struct snd_sb * chip) 741 { 742 unsigned long flags; 743 unsigned char irqreg = 0, dmareg = 0, mpureg; 744 unsigned char realirq, realdma, realmpureg; 745 /* note: mpu register should be present only on SB16 Vibra soundcards */ 746 747 // printk(KERN_DEBUG "codec->irq=%i, codec->dma8=%i, codec->dma16=%i\n", chip->irq, chip->dma8, chip->dma16); 748 spin_lock_irqsave(&chip->mixer_lock, flags); 749 mpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP) & ~0x06; 750 spin_unlock_irqrestore(&chip->mixer_lock, flags); 751 switch (chip->irq) { 752 case 2: 753 case 9: 754 irqreg |= SB_IRQSETUP_IRQ9; 755 break; 756 case 5: 757 irqreg |= SB_IRQSETUP_IRQ5; 758 break; 759 case 7: 760 irqreg |= SB_IRQSETUP_IRQ7; 761 break; 762 case 10: 763 irqreg |= SB_IRQSETUP_IRQ10; 764 break; 765 default: 766 return -EINVAL; 767 } 768 if (chip->dma8 >= 0) { 769 switch (chip->dma8) { 770 case 0: 771 dmareg |= SB_DMASETUP_DMA0; 772 break; 773 case 1: 774 dmareg |= SB_DMASETUP_DMA1; 775 break; 776 case 3: 777 dmareg |= SB_DMASETUP_DMA3; 778 break; 779 default: 780 return -EINVAL; 781 } 782 } 783 if (chip->dma16 >= 0 && chip->dma16 != chip->dma8) { 784 switch (chip->dma16) { 785 case 5: 786 dmareg |= SB_DMASETUP_DMA5; 787 break; 788 case 6: 789 dmareg |= SB_DMASETUP_DMA6; 790 break; 791 case 7: 792 dmareg |= SB_DMASETUP_DMA7; 793 break; 794 default: 795 return -EINVAL; 796 } 797 } 798 switch (chip->mpu_port) { 799 case 0x300: 800 mpureg |= 0x04; 801 break; 802 case 0x330: 803 mpureg |= 0x00; 804 break; 805 default: 806 mpureg |= 0x02; /* disable MPU */ 807 } 808 spin_lock_irqsave(&chip->mixer_lock, flags); 809 810 snd_sbmixer_write(chip, SB_DSP4_IRQSETUP, irqreg); 811 realirq = snd_sbmixer_read(chip, SB_DSP4_IRQSETUP); 812 813 snd_sbmixer_write(chip, SB_DSP4_DMASETUP, dmareg); 814 realdma = snd_sbmixer_read(chip, SB_DSP4_DMASETUP); 815 816 snd_sbmixer_write(chip, SB_DSP4_MPUSETUP, mpureg); 817 realmpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP); 818 819 spin_unlock_irqrestore(&chip->mixer_lock, flags); 820 if ((~realirq) & irqreg || (~realdma) & dmareg) { 821 snd_printk(KERN_ERR "SB16 [0x%lx]: unable to set DMA & IRQ (PnP device?)\n", chip->port); 822 snd_printk(KERN_ERR "SB16 [0x%lx]: wanted: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, realirq, realdma, realmpureg); 823 snd_printk(KERN_ERR "SB16 [0x%lx]: got: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, irqreg, dmareg, mpureg); 824 return -ENODEV; 825 } 826 return 0; 827 } 828 829 static const struct snd_pcm_ops snd_sb16_playback_ops = { 830 .open = snd_sb16_playback_open, 831 .close = snd_sb16_playback_close, 832 .ioctl = snd_pcm_lib_ioctl, 833 .hw_params = snd_sb16_hw_params, 834 .hw_free = snd_sb16_hw_free, 835 .prepare = snd_sb16_playback_prepare, 836 .trigger = snd_sb16_playback_trigger, 837 .pointer = snd_sb16_playback_pointer, 838 }; 839 840 static const struct snd_pcm_ops snd_sb16_capture_ops = { 841 .open = snd_sb16_capture_open, 842 .close = snd_sb16_capture_close, 843 .ioctl = snd_pcm_lib_ioctl, 844 .hw_params = snd_sb16_hw_params, 845 .hw_free = snd_sb16_hw_free, 846 .prepare = snd_sb16_capture_prepare, 847 .trigger = snd_sb16_capture_trigger, 848 .pointer = snd_sb16_capture_pointer, 849 }; 850 851 int snd_sb16dsp_pcm(struct snd_sb *chip, int device) 852 { 853 struct snd_card *card = chip->card; 854 struct snd_pcm *pcm; 855 int err; 856 857 if ((err = snd_pcm_new(card, "SB16 DSP", device, 1, 1, &pcm)) < 0) 858 return err; 859 sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff); 860 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 861 pcm->private_data = chip; 862 chip->pcm = pcm; 863 864 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_sb16_playback_ops); 865 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_sb16_capture_ops); 866 867 if (chip->dma16 >= 0 && chip->dma8 != chip->dma16) { 868 err = snd_ctl_add(card, snd_ctl_new1( 869 &snd_sb16_dma_control, chip)); 870 if (err) 871 return err; 872 } else { 873 pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX; 874 } 875 876 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 877 card->dev, 878 64*1024, 128*1024); 879 return 0; 880 } 881 882 const struct snd_pcm_ops *snd_sb16dsp_get_pcm_ops(int direction) 883 { 884 return direction == SNDRV_PCM_STREAM_PLAYBACK ? 885 &snd_sb16_playback_ops : &snd_sb16_capture_ops; 886 } 887 888 EXPORT_SYMBOL(snd_sb16dsp_pcm); 889 EXPORT_SYMBOL(snd_sb16dsp_get_pcm_ops); 890 EXPORT_SYMBOL(snd_sb16dsp_configure); 891 EXPORT_SYMBOL(snd_sb16dsp_interrupt); 892