1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 ad1816a.c - lowlevel code for Analog Devices AD1816A chip. 4 Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it> 5 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/init.h> 10 #include <linux/interrupt.h> 11 #include <linux/slab.h> 12 #include <linux/ioport.h> 13 #include <linux/io.h> 14 #include <sound/core.h> 15 #include <sound/tlv.h> 16 #include <sound/ad1816a.h> 17 18 #include <asm/dma.h> 19 20 static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip) 21 { 22 int timeout; 23 24 for (timeout = 1000; timeout-- > 0; udelay(10)) 25 if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY) 26 return 0; 27 28 snd_printk(KERN_WARNING "chip busy.\n"); 29 return -EBUSY; 30 } 31 32 static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg) 33 { 34 snd_ad1816a_busy_wait(chip); 35 return inb(AD1816A_REG(reg)); 36 } 37 38 static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg, 39 unsigned char value) 40 { 41 snd_ad1816a_busy_wait(chip); 42 outb(value, AD1816A_REG(reg)); 43 } 44 45 static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg, 46 unsigned char mask, unsigned char value) 47 { 48 snd_ad1816a_out(chip, reg, 49 (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask)); 50 } 51 52 static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg) 53 { 54 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f); 55 return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) | 56 (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8); 57 } 58 59 static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg, 60 unsigned short value) 61 { 62 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f); 63 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff); 64 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff); 65 } 66 67 static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg, 68 unsigned short mask, unsigned short value) 69 { 70 snd_ad1816a_write(chip, reg, 71 (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask)); 72 } 73 74 75 static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip, 76 snd_pcm_format_t format, 77 int channels) 78 { 79 unsigned char retval = AD1816A_FMT_LINEAR_8; 80 81 switch (format) { 82 case SNDRV_PCM_FORMAT_MU_LAW: 83 retval = AD1816A_FMT_ULAW_8; 84 break; 85 case SNDRV_PCM_FORMAT_A_LAW: 86 retval = AD1816A_FMT_ALAW_8; 87 break; 88 case SNDRV_PCM_FORMAT_S16_LE: 89 retval = AD1816A_FMT_LINEAR_16_LIT; 90 break; 91 case SNDRV_PCM_FORMAT_S16_BE: 92 retval = AD1816A_FMT_LINEAR_16_BIG; 93 } 94 return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval; 95 } 96 97 static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode) 98 { 99 unsigned long flags; 100 101 spin_lock_irqsave(&chip->lock, flags); 102 103 if (chip->mode & mode) { 104 spin_unlock_irqrestore(&chip->lock, flags); 105 return -EAGAIN; 106 } 107 108 switch ((mode &= AD1816A_MODE_OPEN)) { 109 case AD1816A_MODE_PLAYBACK: 110 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 111 AD1816A_PLAYBACK_IRQ_PENDING, 0x00); 112 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 113 AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff); 114 break; 115 case AD1816A_MODE_CAPTURE: 116 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 117 AD1816A_CAPTURE_IRQ_PENDING, 0x00); 118 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 119 AD1816A_CAPTURE_IRQ_ENABLE, 0xffff); 120 break; 121 case AD1816A_MODE_TIMER: 122 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 123 AD1816A_TIMER_IRQ_PENDING, 0x00); 124 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 125 AD1816A_TIMER_IRQ_ENABLE, 0xffff); 126 } 127 chip->mode |= mode; 128 129 spin_unlock_irqrestore(&chip->lock, flags); 130 return 0; 131 } 132 133 static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode) 134 { 135 unsigned long flags; 136 137 spin_lock_irqsave(&chip->lock, flags); 138 139 switch ((mode &= AD1816A_MODE_OPEN)) { 140 case AD1816A_MODE_PLAYBACK: 141 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 142 AD1816A_PLAYBACK_IRQ_PENDING, 0x00); 143 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 144 AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000); 145 break; 146 case AD1816A_MODE_CAPTURE: 147 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 148 AD1816A_CAPTURE_IRQ_PENDING, 0x00); 149 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 150 AD1816A_CAPTURE_IRQ_ENABLE, 0x0000); 151 break; 152 case AD1816A_MODE_TIMER: 153 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 154 AD1816A_TIMER_IRQ_PENDING, 0x00); 155 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 156 AD1816A_TIMER_IRQ_ENABLE, 0x0000); 157 } 158 if (!((chip->mode &= ~mode) & AD1816A_MODE_OPEN)) 159 chip->mode = 0; 160 161 spin_unlock_irqrestore(&chip->lock, flags); 162 } 163 164 165 static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what, 166 int channel, int cmd, int iscapture) 167 { 168 int error = 0; 169 170 switch (cmd) { 171 case SNDRV_PCM_TRIGGER_START: 172 case SNDRV_PCM_TRIGGER_STOP: 173 spin_lock(&chip->lock); 174 cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00; 175 /* if (what & AD1816A_PLAYBACK_ENABLE) */ 176 /* That is not valid, because playback and capture enable 177 * are the same bit pattern, just to different addresses 178 */ 179 if (! iscapture) 180 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, 181 AD1816A_PLAYBACK_ENABLE, cmd); 182 else 183 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, 184 AD1816A_CAPTURE_ENABLE, cmd); 185 spin_unlock(&chip->lock); 186 break; 187 default: 188 snd_printk(KERN_WARNING "invalid trigger mode 0x%x.\n", what); 189 error = -EINVAL; 190 } 191 192 return error; 193 } 194 195 static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd) 196 { 197 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 198 return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE, 199 SNDRV_PCM_STREAM_PLAYBACK, cmd, 0); 200 } 201 202 static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd) 203 { 204 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 205 return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE, 206 SNDRV_PCM_STREAM_CAPTURE, cmd, 1); 207 } 208 209 static int snd_ad1816a_hw_params(struct snd_pcm_substream *substream, 210 struct snd_pcm_hw_params *hw_params) 211 { 212 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 213 } 214 215 static int snd_ad1816a_hw_free(struct snd_pcm_substream *substream) 216 { 217 return snd_pcm_lib_free_pages(substream); 218 } 219 220 static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream) 221 { 222 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 223 unsigned long flags; 224 struct snd_pcm_runtime *runtime = substream->runtime; 225 unsigned int size, rate; 226 227 spin_lock_irqsave(&chip->lock, flags); 228 229 chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream); 230 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, 231 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00); 232 233 snd_dma_program(chip->dma1, runtime->dma_addr, size, 234 DMA_MODE_WRITE | DMA_AUTOINIT); 235 236 rate = runtime->rate; 237 if (chip->clock_freq) 238 rate = (rate * 33000) / chip->clock_freq; 239 snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate); 240 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, 241 AD1816A_FMT_ALL | AD1816A_FMT_STEREO, 242 snd_ad1816a_get_format(chip, runtime->format, 243 runtime->channels)); 244 245 snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT, 246 snd_pcm_lib_period_bytes(substream) / 4 - 1); 247 248 spin_unlock_irqrestore(&chip->lock, flags); 249 return 0; 250 } 251 252 static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream) 253 { 254 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 255 unsigned long flags; 256 struct snd_pcm_runtime *runtime = substream->runtime; 257 unsigned int size, rate; 258 259 spin_lock_irqsave(&chip->lock, flags); 260 261 chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream); 262 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, 263 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00); 264 265 snd_dma_program(chip->dma2, runtime->dma_addr, size, 266 DMA_MODE_READ | DMA_AUTOINIT); 267 268 rate = runtime->rate; 269 if (chip->clock_freq) 270 rate = (rate * 33000) / chip->clock_freq; 271 snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate); 272 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, 273 AD1816A_FMT_ALL | AD1816A_FMT_STEREO, 274 snd_ad1816a_get_format(chip, runtime->format, 275 runtime->channels)); 276 277 snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT, 278 snd_pcm_lib_period_bytes(substream) / 4 - 1); 279 280 spin_unlock_irqrestore(&chip->lock, flags); 281 return 0; 282 } 283 284 285 static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream) 286 { 287 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 288 size_t ptr; 289 if (!(chip->mode & AD1816A_MODE_PLAYBACK)) 290 return 0; 291 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size); 292 return bytes_to_frames(substream->runtime, ptr); 293 } 294 295 static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream) 296 { 297 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 298 size_t ptr; 299 if (!(chip->mode & AD1816A_MODE_CAPTURE)) 300 return 0; 301 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size); 302 return bytes_to_frames(substream->runtime, ptr); 303 } 304 305 306 static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id) 307 { 308 struct snd_ad1816a *chip = dev_id; 309 unsigned char status; 310 311 spin_lock(&chip->lock); 312 status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS); 313 spin_unlock(&chip->lock); 314 315 if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream) 316 snd_pcm_period_elapsed(chip->playback_substream); 317 318 if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream) 319 snd_pcm_period_elapsed(chip->capture_substream); 320 321 if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer) 322 snd_timer_interrupt(chip->timer, chip->timer->sticks); 323 324 spin_lock(&chip->lock); 325 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00); 326 spin_unlock(&chip->lock); 327 return IRQ_HANDLED; 328 } 329 330 331 static const struct snd_pcm_hardware snd_ad1816a_playback = { 332 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 333 SNDRV_PCM_INFO_MMAP_VALID), 334 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | 335 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | 336 SNDRV_PCM_FMTBIT_S16_BE), 337 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 338 .rate_min = 4000, 339 .rate_max = 55200, 340 .channels_min = 1, 341 .channels_max = 2, 342 .buffer_bytes_max = (128*1024), 343 .period_bytes_min = 64, 344 .period_bytes_max = (128*1024), 345 .periods_min = 1, 346 .periods_max = 1024, 347 .fifo_size = 0, 348 }; 349 350 static const struct snd_pcm_hardware snd_ad1816a_capture = { 351 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 352 SNDRV_PCM_INFO_MMAP_VALID), 353 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | 354 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | 355 SNDRV_PCM_FMTBIT_S16_BE), 356 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 357 .rate_min = 4000, 358 .rate_max = 55200, 359 .channels_min = 1, 360 .channels_max = 2, 361 .buffer_bytes_max = (128*1024), 362 .period_bytes_min = 64, 363 .period_bytes_max = (128*1024), 364 .periods_min = 1, 365 .periods_max = 1024, 366 .fifo_size = 0, 367 }; 368 369 static int snd_ad1816a_timer_close(struct snd_timer *timer) 370 { 371 struct snd_ad1816a *chip = snd_timer_chip(timer); 372 snd_ad1816a_close(chip, AD1816A_MODE_TIMER); 373 return 0; 374 } 375 376 static int snd_ad1816a_timer_open(struct snd_timer *timer) 377 { 378 struct snd_ad1816a *chip = snd_timer_chip(timer); 379 snd_ad1816a_open(chip, AD1816A_MODE_TIMER); 380 return 0; 381 } 382 383 static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer) 384 { 385 if (snd_BUG_ON(!timer)) 386 return 0; 387 388 return 10000; 389 } 390 391 static int snd_ad1816a_timer_start(struct snd_timer *timer) 392 { 393 unsigned short bits; 394 unsigned long flags; 395 struct snd_ad1816a *chip = snd_timer_chip(timer); 396 spin_lock_irqsave(&chip->lock, flags); 397 bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE); 398 399 if (!(bits & AD1816A_TIMER_ENABLE)) { 400 snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT, 401 timer->sticks & 0xffff); 402 403 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 404 AD1816A_TIMER_ENABLE, 0xffff); 405 } 406 spin_unlock_irqrestore(&chip->lock, flags); 407 return 0; 408 } 409 410 static int snd_ad1816a_timer_stop(struct snd_timer *timer) 411 { 412 unsigned long flags; 413 struct snd_ad1816a *chip = snd_timer_chip(timer); 414 spin_lock_irqsave(&chip->lock, flags); 415 416 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 417 AD1816A_TIMER_ENABLE, 0x0000); 418 419 spin_unlock_irqrestore(&chip->lock, flags); 420 return 0; 421 } 422 423 static struct snd_timer_hardware snd_ad1816a_timer_table = { 424 .flags = SNDRV_TIMER_HW_AUTO, 425 .resolution = 10000, 426 .ticks = 65535, 427 .open = snd_ad1816a_timer_open, 428 .close = snd_ad1816a_timer_close, 429 .c_resolution = snd_ad1816a_timer_resolution, 430 .start = snd_ad1816a_timer_start, 431 .stop = snd_ad1816a_timer_stop, 432 }; 433 434 static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream) 435 { 436 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 437 struct snd_pcm_runtime *runtime = substream->runtime; 438 int error; 439 440 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK)) < 0) 441 return error; 442 runtime->hw = snd_ad1816a_playback; 443 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max); 444 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max); 445 chip->playback_substream = substream; 446 return 0; 447 } 448 449 static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream) 450 { 451 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 452 struct snd_pcm_runtime *runtime = substream->runtime; 453 int error; 454 455 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE)) < 0) 456 return error; 457 runtime->hw = snd_ad1816a_capture; 458 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max); 459 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max); 460 chip->capture_substream = substream; 461 return 0; 462 } 463 464 static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream) 465 { 466 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 467 468 chip->playback_substream = NULL; 469 snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK); 470 return 0; 471 } 472 473 static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream) 474 { 475 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 476 477 chip->capture_substream = NULL; 478 snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE); 479 return 0; 480 } 481 482 483 static void snd_ad1816a_init(struct snd_ad1816a *chip) 484 { 485 unsigned long flags; 486 487 spin_lock_irqsave(&chip->lock, flags); 488 489 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00); 490 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, 491 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00); 492 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, 493 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00); 494 snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000); 495 snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG, 496 AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff); 497 snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000); 498 snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000); 499 500 spin_unlock_irqrestore(&chip->lock, flags); 501 } 502 503 #ifdef CONFIG_PM 504 void snd_ad1816a_suspend(struct snd_ad1816a *chip) 505 { 506 int reg; 507 unsigned long flags; 508 509 spin_lock_irqsave(&chip->lock, flags); 510 for (reg = 0; reg < 48; reg++) 511 chip->image[reg] = snd_ad1816a_read(chip, reg); 512 spin_unlock_irqrestore(&chip->lock, flags); 513 } 514 515 void snd_ad1816a_resume(struct snd_ad1816a *chip) 516 { 517 int reg; 518 unsigned long flags; 519 520 snd_ad1816a_init(chip); 521 spin_lock_irqsave(&chip->lock, flags); 522 for (reg = 0; reg < 48; reg++) 523 snd_ad1816a_write(chip, reg, chip->image[reg]); 524 spin_unlock_irqrestore(&chip->lock, flags); 525 } 526 #endif 527 528 static int snd_ad1816a_probe(struct snd_ad1816a *chip) 529 { 530 unsigned long flags; 531 532 spin_lock_irqsave(&chip->lock, flags); 533 534 switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) { 535 case 0: 536 chip->hardware = AD1816A_HW_AD1815; 537 break; 538 case 1: 539 chip->hardware = AD1816A_HW_AD18MAX10; 540 break; 541 case 3: 542 chip->hardware = AD1816A_HW_AD1816A; 543 break; 544 default: 545 chip->hardware = AD1816A_HW_AUTO; 546 } 547 548 spin_unlock_irqrestore(&chip->lock, flags); 549 return 0; 550 } 551 552 static int snd_ad1816a_free(struct snd_ad1816a *chip) 553 { 554 release_and_free_resource(chip->res_port); 555 if (chip->irq >= 0) 556 free_irq(chip->irq, (void *) chip); 557 if (chip->dma1 >= 0) { 558 snd_dma_disable(chip->dma1); 559 free_dma(chip->dma1); 560 } 561 if (chip->dma2 >= 0) { 562 snd_dma_disable(chip->dma2); 563 free_dma(chip->dma2); 564 } 565 return 0; 566 } 567 568 static int snd_ad1816a_dev_free(struct snd_device *device) 569 { 570 struct snd_ad1816a *chip = device->device_data; 571 return snd_ad1816a_free(chip); 572 } 573 574 static const char *snd_ad1816a_chip_id(struct snd_ad1816a *chip) 575 { 576 switch (chip->hardware) { 577 case AD1816A_HW_AD1816A: return "AD1816A"; 578 case AD1816A_HW_AD1815: return "AD1815"; 579 case AD1816A_HW_AD18MAX10: return "AD18max10"; 580 default: 581 snd_printk(KERN_WARNING "Unknown chip version %d:%d.\n", 582 chip->version, chip->hardware); 583 return "AD1816A - unknown"; 584 } 585 } 586 587 int snd_ad1816a_create(struct snd_card *card, 588 unsigned long port, int irq, int dma1, int dma2, 589 struct snd_ad1816a *chip) 590 { 591 static struct snd_device_ops ops = { 592 .dev_free = snd_ad1816a_dev_free, 593 }; 594 int error; 595 596 chip->irq = -1; 597 chip->dma1 = -1; 598 chip->dma2 = -1; 599 600 if ((chip->res_port = request_region(port, 16, "AD1816A")) == NULL) { 601 snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port); 602 snd_ad1816a_free(chip); 603 return -EBUSY; 604 } 605 if (request_irq(irq, snd_ad1816a_interrupt, 0, "AD1816A", (void *) chip)) { 606 snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq); 607 snd_ad1816a_free(chip); 608 return -EBUSY; 609 } 610 chip->irq = irq; 611 if (request_dma(dma1, "AD1816A - 1")) { 612 snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1); 613 snd_ad1816a_free(chip); 614 return -EBUSY; 615 } 616 chip->dma1 = dma1; 617 if (request_dma(dma2, "AD1816A - 2")) { 618 snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2); 619 snd_ad1816a_free(chip); 620 return -EBUSY; 621 } 622 chip->dma2 = dma2; 623 624 chip->card = card; 625 chip->port = port; 626 spin_lock_init(&chip->lock); 627 628 if ((error = snd_ad1816a_probe(chip))) { 629 snd_ad1816a_free(chip); 630 return error; 631 } 632 633 snd_ad1816a_init(chip); 634 635 /* Register device */ 636 if ((error = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 637 snd_ad1816a_free(chip); 638 return error; 639 } 640 641 return 0; 642 } 643 644 static const struct snd_pcm_ops snd_ad1816a_playback_ops = { 645 .open = snd_ad1816a_playback_open, 646 .close = snd_ad1816a_playback_close, 647 .ioctl = snd_pcm_lib_ioctl, 648 .hw_params = snd_ad1816a_hw_params, 649 .hw_free = snd_ad1816a_hw_free, 650 .prepare = snd_ad1816a_playback_prepare, 651 .trigger = snd_ad1816a_playback_trigger, 652 .pointer = snd_ad1816a_playback_pointer, 653 }; 654 655 static const struct snd_pcm_ops snd_ad1816a_capture_ops = { 656 .open = snd_ad1816a_capture_open, 657 .close = snd_ad1816a_capture_close, 658 .ioctl = snd_pcm_lib_ioctl, 659 .hw_params = snd_ad1816a_hw_params, 660 .hw_free = snd_ad1816a_hw_free, 661 .prepare = snd_ad1816a_capture_prepare, 662 .trigger = snd_ad1816a_capture_trigger, 663 .pointer = snd_ad1816a_capture_pointer, 664 }; 665 666 int snd_ad1816a_pcm(struct snd_ad1816a *chip, int device) 667 { 668 int error; 669 struct snd_pcm *pcm; 670 671 if ((error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm))) 672 return error; 673 674 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops); 675 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops); 676 677 pcm->private_data = chip; 678 pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0; 679 680 strcpy(pcm->name, snd_ad1816a_chip_id(chip)); 681 snd_ad1816a_init(chip); 682 683 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 684 chip->card->dev, 685 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024); 686 687 chip->pcm = pcm; 688 return 0; 689 } 690 691 int snd_ad1816a_timer(struct snd_ad1816a *chip, int device) 692 { 693 struct snd_timer *timer; 694 struct snd_timer_id tid; 695 int error; 696 697 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 698 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 699 tid.card = chip->card->number; 700 tid.device = device; 701 tid.subdevice = 0; 702 if ((error = snd_timer_new(chip->card, "AD1816A", &tid, &timer)) < 0) 703 return error; 704 strcpy(timer->name, snd_ad1816a_chip_id(chip)); 705 timer->private_data = chip; 706 chip->timer = timer; 707 timer->hw = snd_ad1816a_timer_table; 708 return 0; 709 } 710 711 /* 712 * 713 */ 714 715 static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 716 { 717 static const char * const texts[8] = { 718 "Line", "Mix", "CD", "Synth", "Video", 719 "Mic", "Phone", 720 }; 721 722 return snd_ctl_enum_info(uinfo, 2, 7, texts); 723 } 724 725 static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 726 { 727 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 728 unsigned long flags; 729 unsigned short val; 730 731 spin_lock_irqsave(&chip->lock, flags); 732 val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL); 733 spin_unlock_irqrestore(&chip->lock, flags); 734 ucontrol->value.enumerated.item[0] = (val >> 12) & 7; 735 ucontrol->value.enumerated.item[1] = (val >> 4) & 7; 736 return 0; 737 } 738 739 static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 740 { 741 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 742 unsigned long flags; 743 unsigned short val; 744 int change; 745 746 if (ucontrol->value.enumerated.item[0] > 6 || 747 ucontrol->value.enumerated.item[1] > 6) 748 return -EINVAL; 749 val = (ucontrol->value.enumerated.item[0] << 12) | 750 (ucontrol->value.enumerated.item[1] << 4); 751 spin_lock_irqsave(&chip->lock, flags); 752 change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val; 753 snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val); 754 spin_unlock_irqrestore(&chip->lock, flags); 755 return change; 756 } 757 758 #define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv) \ 759 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 760 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ 761 .name = xname, .info = snd_ad1816a_info_single, \ 762 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \ 763 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \ 764 .tlv = { .p = (xtlv) } } 765 #define AD1816A_SINGLE(xname, reg, shift, mask, invert) \ 766 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \ 767 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \ 768 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } 769 770 static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 771 { 772 int mask = (kcontrol->private_value >> 16) & 0xff; 773 774 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 775 uinfo->count = 1; 776 uinfo->value.integer.min = 0; 777 uinfo->value.integer.max = mask; 778 return 0; 779 } 780 781 static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 782 { 783 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 784 unsigned long flags; 785 int reg = kcontrol->private_value & 0xff; 786 int shift = (kcontrol->private_value >> 8) & 0xff; 787 int mask = (kcontrol->private_value >> 16) & 0xff; 788 int invert = (kcontrol->private_value >> 24) & 0xff; 789 790 spin_lock_irqsave(&chip->lock, flags); 791 ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask; 792 spin_unlock_irqrestore(&chip->lock, flags); 793 if (invert) 794 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 795 return 0; 796 } 797 798 static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 799 { 800 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 801 unsigned long flags; 802 int reg = kcontrol->private_value & 0xff; 803 int shift = (kcontrol->private_value >> 8) & 0xff; 804 int mask = (kcontrol->private_value >> 16) & 0xff; 805 int invert = (kcontrol->private_value >> 24) & 0xff; 806 int change; 807 unsigned short old_val, val; 808 809 val = (ucontrol->value.integer.value[0] & mask); 810 if (invert) 811 val = mask - val; 812 val <<= shift; 813 spin_lock_irqsave(&chip->lock, flags); 814 old_val = snd_ad1816a_read(chip, reg); 815 val = (old_val & ~(mask << shift)) | val; 816 change = val != old_val; 817 snd_ad1816a_write(chip, reg, val); 818 spin_unlock_irqrestore(&chip->lock, flags); 819 return change; 820 } 821 822 #define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \ 823 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 824 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ 825 .name = xname, .info = snd_ad1816a_info_double, \ 826 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \ 827 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \ 828 .tlv = { .p = (xtlv) } } 829 830 #define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ 831 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \ 832 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \ 833 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) } 834 835 static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 836 { 837 int mask = (kcontrol->private_value >> 16) & 0xff; 838 839 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 840 uinfo->count = 2; 841 uinfo->value.integer.min = 0; 842 uinfo->value.integer.max = mask; 843 return 0; 844 } 845 846 static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 847 { 848 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 849 unsigned long flags; 850 int reg = kcontrol->private_value & 0xff; 851 int shift_left = (kcontrol->private_value >> 8) & 0x0f; 852 int shift_right = (kcontrol->private_value >> 12) & 0x0f; 853 int mask = (kcontrol->private_value >> 16) & 0xff; 854 int invert = (kcontrol->private_value >> 24) & 0xff; 855 unsigned short val; 856 857 spin_lock_irqsave(&chip->lock, flags); 858 val = snd_ad1816a_read(chip, reg); 859 ucontrol->value.integer.value[0] = (val >> shift_left) & mask; 860 ucontrol->value.integer.value[1] = (val >> shift_right) & mask; 861 spin_unlock_irqrestore(&chip->lock, flags); 862 if (invert) { 863 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 864 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; 865 } 866 return 0; 867 } 868 869 static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 870 { 871 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 872 unsigned long flags; 873 int reg = kcontrol->private_value & 0xff; 874 int shift_left = (kcontrol->private_value >> 8) & 0x0f; 875 int shift_right = (kcontrol->private_value >> 12) & 0x0f; 876 int mask = (kcontrol->private_value >> 16) & 0xff; 877 int invert = (kcontrol->private_value >> 24) & 0xff; 878 int change; 879 unsigned short old_val, val1, val2; 880 881 val1 = ucontrol->value.integer.value[0] & mask; 882 val2 = ucontrol->value.integer.value[1] & mask; 883 if (invert) { 884 val1 = mask - val1; 885 val2 = mask - val2; 886 } 887 val1 <<= shift_left; 888 val2 <<= shift_right; 889 spin_lock_irqsave(&chip->lock, flags); 890 old_val = snd_ad1816a_read(chip, reg); 891 val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; 892 change = val1 != old_val; 893 snd_ad1816a_write(chip, reg, val1); 894 spin_unlock_irqrestore(&chip->lock, flags); 895 return change; 896 } 897 898 static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0); 899 static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0); 900 static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0); 901 static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0); 902 static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0); 903 904 static struct snd_kcontrol_new snd_ad1816a_controls[] = { 905 AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1), 906 AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1, 907 db_scale_5bit), 908 AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1), 909 AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1, 910 db_scale_6bit), 911 AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1), 912 AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1, 913 db_scale_5bit_12db_max), 914 AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1), 915 AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1, 916 db_scale_5bit_12db_max), 917 AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1), 918 AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1, 919 db_scale_5bit_12db_max), 920 AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1), 921 AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1, 922 db_scale_6bit), 923 AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1), 924 AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1, 925 db_scale_5bit_12db_max), 926 AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0), 927 AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1), 928 AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1, 929 db_scale_5bit_12db_max), 930 AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1), 931 AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1, 932 db_scale_4bit), 933 AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1), 934 AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1, 935 db_scale_5bit), 936 { 937 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 938 .name = "Capture Source", 939 .info = snd_ad1816a_info_mux, 940 .get = snd_ad1816a_get_mux, 941 .put = snd_ad1816a_put_mux, 942 }, 943 AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1), 944 AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0, 945 db_scale_rec_gain), 946 AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1), 947 AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0), 948 }; 949 950 int snd_ad1816a_mixer(struct snd_ad1816a *chip) 951 { 952 struct snd_card *card; 953 unsigned int idx; 954 int err; 955 956 if (snd_BUG_ON(!chip || !chip->card)) 957 return -EINVAL; 958 959 card = chip->card; 960 961 strcpy(card->mixername, snd_ad1816a_chip_id(chip)); 962 963 for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) { 964 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip))) < 0) 965 return err; 966 } 967 return 0; 968 } 969