1 /* 2 ad1816a.c - lowlevel code for Analog Devices AD1816A chip. 3 Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the Free Software 17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 */ 19 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/interrupt.h> 23 #include <linux/slab.h> 24 #include <linux/ioport.h> 25 #include <linux/io.h> 26 #include <sound/core.h> 27 #include <sound/tlv.h> 28 #include <sound/ad1816a.h> 29 30 #include <asm/dma.h> 31 32 static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip) 33 { 34 int timeout; 35 36 for (timeout = 1000; timeout-- > 0; udelay(10)) 37 if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY) 38 return 0; 39 40 snd_printk(KERN_WARNING "chip busy.\n"); 41 return -EBUSY; 42 } 43 44 static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg) 45 { 46 snd_ad1816a_busy_wait(chip); 47 return inb(AD1816A_REG(reg)); 48 } 49 50 static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg, 51 unsigned char value) 52 { 53 snd_ad1816a_busy_wait(chip); 54 outb(value, AD1816A_REG(reg)); 55 } 56 57 static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg, 58 unsigned char mask, unsigned char value) 59 { 60 snd_ad1816a_out(chip, reg, 61 (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask)); 62 } 63 64 static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg) 65 { 66 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f); 67 return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) | 68 (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8); 69 } 70 71 static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg, 72 unsigned short value) 73 { 74 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f); 75 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff); 76 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff); 77 } 78 79 static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg, 80 unsigned short mask, unsigned short value) 81 { 82 snd_ad1816a_write(chip, reg, 83 (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask)); 84 } 85 86 87 static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip, 88 snd_pcm_format_t format, 89 int channels) 90 { 91 unsigned char retval = AD1816A_FMT_LINEAR_8; 92 93 switch (format) { 94 case SNDRV_PCM_FORMAT_MU_LAW: 95 retval = AD1816A_FMT_ULAW_8; 96 break; 97 case SNDRV_PCM_FORMAT_A_LAW: 98 retval = AD1816A_FMT_ALAW_8; 99 break; 100 case SNDRV_PCM_FORMAT_S16_LE: 101 retval = AD1816A_FMT_LINEAR_16_LIT; 102 break; 103 case SNDRV_PCM_FORMAT_S16_BE: 104 retval = AD1816A_FMT_LINEAR_16_BIG; 105 } 106 return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval; 107 } 108 109 static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode) 110 { 111 unsigned long flags; 112 113 spin_lock_irqsave(&chip->lock, flags); 114 115 if (chip->mode & mode) { 116 spin_unlock_irqrestore(&chip->lock, flags); 117 return -EAGAIN; 118 } 119 120 switch ((mode &= AD1816A_MODE_OPEN)) { 121 case AD1816A_MODE_PLAYBACK: 122 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 123 AD1816A_PLAYBACK_IRQ_PENDING, 0x00); 124 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 125 AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff); 126 break; 127 case AD1816A_MODE_CAPTURE: 128 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 129 AD1816A_CAPTURE_IRQ_PENDING, 0x00); 130 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 131 AD1816A_CAPTURE_IRQ_ENABLE, 0xffff); 132 break; 133 case AD1816A_MODE_TIMER: 134 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 135 AD1816A_TIMER_IRQ_PENDING, 0x00); 136 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 137 AD1816A_TIMER_IRQ_ENABLE, 0xffff); 138 } 139 chip->mode |= mode; 140 141 spin_unlock_irqrestore(&chip->lock, flags); 142 return 0; 143 } 144 145 static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode) 146 { 147 unsigned long flags; 148 149 spin_lock_irqsave(&chip->lock, flags); 150 151 switch ((mode &= AD1816A_MODE_OPEN)) { 152 case AD1816A_MODE_PLAYBACK: 153 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 154 AD1816A_PLAYBACK_IRQ_PENDING, 0x00); 155 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 156 AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000); 157 break; 158 case AD1816A_MODE_CAPTURE: 159 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 160 AD1816A_CAPTURE_IRQ_PENDING, 0x00); 161 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 162 AD1816A_CAPTURE_IRQ_ENABLE, 0x0000); 163 break; 164 case AD1816A_MODE_TIMER: 165 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS, 166 AD1816A_TIMER_IRQ_PENDING, 0x00); 167 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 168 AD1816A_TIMER_IRQ_ENABLE, 0x0000); 169 } 170 if (!((chip->mode &= ~mode) & AD1816A_MODE_OPEN)) 171 chip->mode = 0; 172 173 spin_unlock_irqrestore(&chip->lock, flags); 174 } 175 176 177 static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what, 178 int channel, int cmd, int iscapture) 179 { 180 int error = 0; 181 182 switch (cmd) { 183 case SNDRV_PCM_TRIGGER_START: 184 case SNDRV_PCM_TRIGGER_STOP: 185 spin_lock(&chip->lock); 186 cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00; 187 /* if (what & AD1816A_PLAYBACK_ENABLE) */ 188 /* That is not valid, because playback and capture enable 189 * are the same bit pattern, just to different addresses 190 */ 191 if (! iscapture) 192 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, 193 AD1816A_PLAYBACK_ENABLE, cmd); 194 else 195 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, 196 AD1816A_CAPTURE_ENABLE, cmd); 197 spin_unlock(&chip->lock); 198 break; 199 default: 200 snd_printk(KERN_WARNING "invalid trigger mode 0x%x.\n", what); 201 error = -EINVAL; 202 } 203 204 return error; 205 } 206 207 static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd) 208 { 209 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 210 return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE, 211 SNDRV_PCM_STREAM_PLAYBACK, cmd, 0); 212 } 213 214 static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd) 215 { 216 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 217 return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE, 218 SNDRV_PCM_STREAM_CAPTURE, cmd, 1); 219 } 220 221 static int snd_ad1816a_hw_params(struct snd_pcm_substream *substream, 222 struct snd_pcm_hw_params *hw_params) 223 { 224 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 225 } 226 227 static int snd_ad1816a_hw_free(struct snd_pcm_substream *substream) 228 { 229 return snd_pcm_lib_free_pages(substream); 230 } 231 232 static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream) 233 { 234 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 235 unsigned long flags; 236 struct snd_pcm_runtime *runtime = substream->runtime; 237 unsigned int size, rate; 238 239 spin_lock_irqsave(&chip->lock, flags); 240 241 chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream); 242 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, 243 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00); 244 245 snd_dma_program(chip->dma1, runtime->dma_addr, size, 246 DMA_MODE_WRITE | DMA_AUTOINIT); 247 248 rate = runtime->rate; 249 if (chip->clock_freq) 250 rate = (rate * 33000) / chip->clock_freq; 251 snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate); 252 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, 253 AD1816A_FMT_ALL | AD1816A_FMT_STEREO, 254 snd_ad1816a_get_format(chip, runtime->format, 255 runtime->channels)); 256 257 snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT, 258 snd_pcm_lib_period_bytes(substream) / 4 - 1); 259 260 spin_unlock_irqrestore(&chip->lock, flags); 261 return 0; 262 } 263 264 static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream) 265 { 266 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 267 unsigned long flags; 268 struct snd_pcm_runtime *runtime = substream->runtime; 269 unsigned int size, rate; 270 271 spin_lock_irqsave(&chip->lock, flags); 272 273 chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream); 274 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, 275 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00); 276 277 snd_dma_program(chip->dma2, runtime->dma_addr, size, 278 DMA_MODE_READ | DMA_AUTOINIT); 279 280 rate = runtime->rate; 281 if (chip->clock_freq) 282 rate = (rate * 33000) / chip->clock_freq; 283 snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate); 284 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, 285 AD1816A_FMT_ALL | AD1816A_FMT_STEREO, 286 snd_ad1816a_get_format(chip, runtime->format, 287 runtime->channels)); 288 289 snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT, 290 snd_pcm_lib_period_bytes(substream) / 4 - 1); 291 292 spin_unlock_irqrestore(&chip->lock, flags); 293 return 0; 294 } 295 296 297 static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream) 298 { 299 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 300 size_t ptr; 301 if (!(chip->mode & AD1816A_MODE_PLAYBACK)) 302 return 0; 303 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size); 304 return bytes_to_frames(substream->runtime, ptr); 305 } 306 307 static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream) 308 { 309 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 310 size_t ptr; 311 if (!(chip->mode & AD1816A_MODE_CAPTURE)) 312 return 0; 313 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size); 314 return bytes_to_frames(substream->runtime, ptr); 315 } 316 317 318 static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id) 319 { 320 struct snd_ad1816a *chip = dev_id; 321 unsigned char status; 322 323 spin_lock(&chip->lock); 324 status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS); 325 spin_unlock(&chip->lock); 326 327 if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream) 328 snd_pcm_period_elapsed(chip->playback_substream); 329 330 if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream) 331 snd_pcm_period_elapsed(chip->capture_substream); 332 333 if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer) 334 snd_timer_interrupt(chip->timer, chip->timer->sticks); 335 336 spin_lock(&chip->lock); 337 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00); 338 spin_unlock(&chip->lock); 339 return IRQ_HANDLED; 340 } 341 342 343 static const struct snd_pcm_hardware snd_ad1816a_playback = { 344 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 345 SNDRV_PCM_INFO_MMAP_VALID), 346 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | 347 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | 348 SNDRV_PCM_FMTBIT_S16_BE), 349 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 350 .rate_min = 4000, 351 .rate_max = 55200, 352 .channels_min = 1, 353 .channels_max = 2, 354 .buffer_bytes_max = (128*1024), 355 .period_bytes_min = 64, 356 .period_bytes_max = (128*1024), 357 .periods_min = 1, 358 .periods_max = 1024, 359 .fifo_size = 0, 360 }; 361 362 static const struct snd_pcm_hardware snd_ad1816a_capture = { 363 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 364 SNDRV_PCM_INFO_MMAP_VALID), 365 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | 366 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | 367 SNDRV_PCM_FMTBIT_S16_BE), 368 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 369 .rate_min = 4000, 370 .rate_max = 55200, 371 .channels_min = 1, 372 .channels_max = 2, 373 .buffer_bytes_max = (128*1024), 374 .period_bytes_min = 64, 375 .period_bytes_max = (128*1024), 376 .periods_min = 1, 377 .periods_max = 1024, 378 .fifo_size = 0, 379 }; 380 381 static int snd_ad1816a_timer_close(struct snd_timer *timer) 382 { 383 struct snd_ad1816a *chip = snd_timer_chip(timer); 384 snd_ad1816a_close(chip, AD1816A_MODE_TIMER); 385 return 0; 386 } 387 388 static int snd_ad1816a_timer_open(struct snd_timer *timer) 389 { 390 struct snd_ad1816a *chip = snd_timer_chip(timer); 391 snd_ad1816a_open(chip, AD1816A_MODE_TIMER); 392 return 0; 393 } 394 395 static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer) 396 { 397 if (snd_BUG_ON(!timer)) 398 return 0; 399 400 return 10000; 401 } 402 403 static int snd_ad1816a_timer_start(struct snd_timer *timer) 404 { 405 unsigned short bits; 406 unsigned long flags; 407 struct snd_ad1816a *chip = snd_timer_chip(timer); 408 spin_lock_irqsave(&chip->lock, flags); 409 bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE); 410 411 if (!(bits & AD1816A_TIMER_ENABLE)) { 412 snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT, 413 timer->sticks & 0xffff); 414 415 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 416 AD1816A_TIMER_ENABLE, 0xffff); 417 } 418 spin_unlock_irqrestore(&chip->lock, flags); 419 return 0; 420 } 421 422 static int snd_ad1816a_timer_stop(struct snd_timer *timer) 423 { 424 unsigned long flags; 425 struct snd_ad1816a *chip = snd_timer_chip(timer); 426 spin_lock_irqsave(&chip->lock, flags); 427 428 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE, 429 AD1816A_TIMER_ENABLE, 0x0000); 430 431 spin_unlock_irqrestore(&chip->lock, flags); 432 return 0; 433 } 434 435 static struct snd_timer_hardware snd_ad1816a_timer_table = { 436 .flags = SNDRV_TIMER_HW_AUTO, 437 .resolution = 10000, 438 .ticks = 65535, 439 .open = snd_ad1816a_timer_open, 440 .close = snd_ad1816a_timer_close, 441 .c_resolution = snd_ad1816a_timer_resolution, 442 .start = snd_ad1816a_timer_start, 443 .stop = snd_ad1816a_timer_stop, 444 }; 445 446 static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream) 447 { 448 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 449 struct snd_pcm_runtime *runtime = substream->runtime; 450 int error; 451 452 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK)) < 0) 453 return error; 454 runtime->hw = snd_ad1816a_playback; 455 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max); 456 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max); 457 chip->playback_substream = substream; 458 return 0; 459 } 460 461 static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream) 462 { 463 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 464 struct snd_pcm_runtime *runtime = substream->runtime; 465 int error; 466 467 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE)) < 0) 468 return error; 469 runtime->hw = snd_ad1816a_capture; 470 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max); 471 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max); 472 chip->capture_substream = substream; 473 return 0; 474 } 475 476 static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream) 477 { 478 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 479 480 chip->playback_substream = NULL; 481 snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK); 482 return 0; 483 } 484 485 static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream) 486 { 487 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream); 488 489 chip->capture_substream = NULL; 490 snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE); 491 return 0; 492 } 493 494 495 static void snd_ad1816a_init(struct snd_ad1816a *chip) 496 { 497 unsigned long flags; 498 499 spin_lock_irqsave(&chip->lock, flags); 500 501 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00); 502 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG, 503 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00); 504 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG, 505 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00); 506 snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000); 507 snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG, 508 AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff); 509 snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000); 510 snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000); 511 512 spin_unlock_irqrestore(&chip->lock, flags); 513 } 514 515 #ifdef CONFIG_PM 516 void snd_ad1816a_suspend(struct snd_ad1816a *chip) 517 { 518 int reg; 519 unsigned long flags; 520 521 snd_pcm_suspend_all(chip->pcm); 522 spin_lock_irqsave(&chip->lock, flags); 523 for (reg = 0; reg < 48; reg++) 524 chip->image[reg] = snd_ad1816a_read(chip, reg); 525 spin_unlock_irqrestore(&chip->lock, flags); 526 } 527 528 void snd_ad1816a_resume(struct snd_ad1816a *chip) 529 { 530 int reg; 531 unsigned long flags; 532 533 snd_ad1816a_init(chip); 534 spin_lock_irqsave(&chip->lock, flags); 535 for (reg = 0; reg < 48; reg++) 536 snd_ad1816a_write(chip, reg, chip->image[reg]); 537 spin_unlock_irqrestore(&chip->lock, flags); 538 } 539 #endif 540 541 static int snd_ad1816a_probe(struct snd_ad1816a *chip) 542 { 543 unsigned long flags; 544 545 spin_lock_irqsave(&chip->lock, flags); 546 547 switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) { 548 case 0: 549 chip->hardware = AD1816A_HW_AD1815; 550 break; 551 case 1: 552 chip->hardware = AD1816A_HW_AD18MAX10; 553 break; 554 case 3: 555 chip->hardware = AD1816A_HW_AD1816A; 556 break; 557 default: 558 chip->hardware = AD1816A_HW_AUTO; 559 } 560 561 spin_unlock_irqrestore(&chip->lock, flags); 562 return 0; 563 } 564 565 static int snd_ad1816a_free(struct snd_ad1816a *chip) 566 { 567 release_and_free_resource(chip->res_port); 568 if (chip->irq >= 0) 569 free_irq(chip->irq, (void *) chip); 570 if (chip->dma1 >= 0) { 571 snd_dma_disable(chip->dma1); 572 free_dma(chip->dma1); 573 } 574 if (chip->dma2 >= 0) { 575 snd_dma_disable(chip->dma2); 576 free_dma(chip->dma2); 577 } 578 return 0; 579 } 580 581 static int snd_ad1816a_dev_free(struct snd_device *device) 582 { 583 struct snd_ad1816a *chip = device->device_data; 584 return snd_ad1816a_free(chip); 585 } 586 587 static const char *snd_ad1816a_chip_id(struct snd_ad1816a *chip) 588 { 589 switch (chip->hardware) { 590 case AD1816A_HW_AD1816A: return "AD1816A"; 591 case AD1816A_HW_AD1815: return "AD1815"; 592 case AD1816A_HW_AD18MAX10: return "AD18max10"; 593 default: 594 snd_printk(KERN_WARNING "Unknown chip version %d:%d.\n", 595 chip->version, chip->hardware); 596 return "AD1816A - unknown"; 597 } 598 } 599 600 int snd_ad1816a_create(struct snd_card *card, 601 unsigned long port, int irq, int dma1, int dma2, 602 struct snd_ad1816a *chip) 603 { 604 static struct snd_device_ops ops = { 605 .dev_free = snd_ad1816a_dev_free, 606 }; 607 int error; 608 609 chip->irq = -1; 610 chip->dma1 = -1; 611 chip->dma2 = -1; 612 613 if ((chip->res_port = request_region(port, 16, "AD1816A")) == NULL) { 614 snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port); 615 snd_ad1816a_free(chip); 616 return -EBUSY; 617 } 618 if (request_irq(irq, snd_ad1816a_interrupt, 0, "AD1816A", (void *) chip)) { 619 snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq); 620 snd_ad1816a_free(chip); 621 return -EBUSY; 622 } 623 chip->irq = irq; 624 if (request_dma(dma1, "AD1816A - 1")) { 625 snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1); 626 snd_ad1816a_free(chip); 627 return -EBUSY; 628 } 629 chip->dma1 = dma1; 630 if (request_dma(dma2, "AD1816A - 2")) { 631 snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2); 632 snd_ad1816a_free(chip); 633 return -EBUSY; 634 } 635 chip->dma2 = dma2; 636 637 chip->card = card; 638 chip->port = port; 639 spin_lock_init(&chip->lock); 640 641 if ((error = snd_ad1816a_probe(chip))) { 642 snd_ad1816a_free(chip); 643 return error; 644 } 645 646 snd_ad1816a_init(chip); 647 648 /* Register device */ 649 if ((error = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 650 snd_ad1816a_free(chip); 651 return error; 652 } 653 654 return 0; 655 } 656 657 static const struct snd_pcm_ops snd_ad1816a_playback_ops = { 658 .open = snd_ad1816a_playback_open, 659 .close = snd_ad1816a_playback_close, 660 .ioctl = snd_pcm_lib_ioctl, 661 .hw_params = snd_ad1816a_hw_params, 662 .hw_free = snd_ad1816a_hw_free, 663 .prepare = snd_ad1816a_playback_prepare, 664 .trigger = snd_ad1816a_playback_trigger, 665 .pointer = snd_ad1816a_playback_pointer, 666 }; 667 668 static const struct snd_pcm_ops snd_ad1816a_capture_ops = { 669 .open = snd_ad1816a_capture_open, 670 .close = snd_ad1816a_capture_close, 671 .ioctl = snd_pcm_lib_ioctl, 672 .hw_params = snd_ad1816a_hw_params, 673 .hw_free = snd_ad1816a_hw_free, 674 .prepare = snd_ad1816a_capture_prepare, 675 .trigger = snd_ad1816a_capture_trigger, 676 .pointer = snd_ad1816a_capture_pointer, 677 }; 678 679 int snd_ad1816a_pcm(struct snd_ad1816a *chip, int device) 680 { 681 int error; 682 struct snd_pcm *pcm; 683 684 if ((error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm))) 685 return error; 686 687 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops); 688 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops); 689 690 pcm->private_data = chip; 691 pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0; 692 693 strcpy(pcm->name, snd_ad1816a_chip_id(chip)); 694 snd_ad1816a_init(chip); 695 696 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 697 snd_dma_isa_data(), 698 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024); 699 700 chip->pcm = pcm; 701 return 0; 702 } 703 704 int snd_ad1816a_timer(struct snd_ad1816a *chip, int device) 705 { 706 struct snd_timer *timer; 707 struct snd_timer_id tid; 708 int error; 709 710 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 711 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 712 tid.card = chip->card->number; 713 tid.device = device; 714 tid.subdevice = 0; 715 if ((error = snd_timer_new(chip->card, "AD1816A", &tid, &timer)) < 0) 716 return error; 717 strcpy(timer->name, snd_ad1816a_chip_id(chip)); 718 timer->private_data = chip; 719 chip->timer = timer; 720 timer->hw = snd_ad1816a_timer_table; 721 return 0; 722 } 723 724 /* 725 * 726 */ 727 728 static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 729 { 730 static const char * const texts[8] = { 731 "Line", "Mix", "CD", "Synth", "Video", 732 "Mic", "Phone", 733 }; 734 735 return snd_ctl_enum_info(uinfo, 2, 7, texts); 736 } 737 738 static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 739 { 740 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 741 unsigned long flags; 742 unsigned short val; 743 744 spin_lock_irqsave(&chip->lock, flags); 745 val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL); 746 spin_unlock_irqrestore(&chip->lock, flags); 747 ucontrol->value.enumerated.item[0] = (val >> 12) & 7; 748 ucontrol->value.enumerated.item[1] = (val >> 4) & 7; 749 return 0; 750 } 751 752 static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 753 { 754 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 755 unsigned long flags; 756 unsigned short val; 757 int change; 758 759 if (ucontrol->value.enumerated.item[0] > 6 || 760 ucontrol->value.enumerated.item[1] > 6) 761 return -EINVAL; 762 val = (ucontrol->value.enumerated.item[0] << 12) | 763 (ucontrol->value.enumerated.item[1] << 4); 764 spin_lock_irqsave(&chip->lock, flags); 765 change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val; 766 snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val); 767 spin_unlock_irqrestore(&chip->lock, flags); 768 return change; 769 } 770 771 #define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv) \ 772 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 773 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ 774 .name = xname, .info = snd_ad1816a_info_single, \ 775 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \ 776 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \ 777 .tlv = { .p = (xtlv) } } 778 #define AD1816A_SINGLE(xname, reg, shift, mask, invert) \ 779 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \ 780 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \ 781 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } 782 783 static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 784 { 785 int mask = (kcontrol->private_value >> 16) & 0xff; 786 787 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 788 uinfo->count = 1; 789 uinfo->value.integer.min = 0; 790 uinfo->value.integer.max = mask; 791 return 0; 792 } 793 794 static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 795 { 796 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 797 unsigned long flags; 798 int reg = kcontrol->private_value & 0xff; 799 int shift = (kcontrol->private_value >> 8) & 0xff; 800 int mask = (kcontrol->private_value >> 16) & 0xff; 801 int invert = (kcontrol->private_value >> 24) & 0xff; 802 803 spin_lock_irqsave(&chip->lock, flags); 804 ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask; 805 spin_unlock_irqrestore(&chip->lock, flags); 806 if (invert) 807 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 808 return 0; 809 } 810 811 static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 812 { 813 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 814 unsigned long flags; 815 int reg = kcontrol->private_value & 0xff; 816 int shift = (kcontrol->private_value >> 8) & 0xff; 817 int mask = (kcontrol->private_value >> 16) & 0xff; 818 int invert = (kcontrol->private_value >> 24) & 0xff; 819 int change; 820 unsigned short old_val, val; 821 822 val = (ucontrol->value.integer.value[0] & mask); 823 if (invert) 824 val = mask - val; 825 val <<= shift; 826 spin_lock_irqsave(&chip->lock, flags); 827 old_val = snd_ad1816a_read(chip, reg); 828 val = (old_val & ~(mask << shift)) | val; 829 change = val != old_val; 830 snd_ad1816a_write(chip, reg, val); 831 spin_unlock_irqrestore(&chip->lock, flags); 832 return change; 833 } 834 835 #define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \ 836 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 837 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ 838 .name = xname, .info = snd_ad1816a_info_double, \ 839 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \ 840 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \ 841 .tlv = { .p = (xtlv) } } 842 843 #define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ 844 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \ 845 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \ 846 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) } 847 848 static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 849 { 850 int mask = (kcontrol->private_value >> 16) & 0xff; 851 852 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 853 uinfo->count = 2; 854 uinfo->value.integer.min = 0; 855 uinfo->value.integer.max = mask; 856 return 0; 857 } 858 859 static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 860 { 861 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 862 unsigned long flags; 863 int reg = kcontrol->private_value & 0xff; 864 int shift_left = (kcontrol->private_value >> 8) & 0x0f; 865 int shift_right = (kcontrol->private_value >> 12) & 0x0f; 866 int mask = (kcontrol->private_value >> 16) & 0xff; 867 int invert = (kcontrol->private_value >> 24) & 0xff; 868 unsigned short val; 869 870 spin_lock_irqsave(&chip->lock, flags); 871 val = snd_ad1816a_read(chip, reg); 872 ucontrol->value.integer.value[0] = (val >> shift_left) & mask; 873 ucontrol->value.integer.value[1] = (val >> shift_right) & mask; 874 spin_unlock_irqrestore(&chip->lock, flags); 875 if (invert) { 876 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 877 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; 878 } 879 return 0; 880 } 881 882 static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 883 { 884 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol); 885 unsigned long flags; 886 int reg = kcontrol->private_value & 0xff; 887 int shift_left = (kcontrol->private_value >> 8) & 0x0f; 888 int shift_right = (kcontrol->private_value >> 12) & 0x0f; 889 int mask = (kcontrol->private_value >> 16) & 0xff; 890 int invert = (kcontrol->private_value >> 24) & 0xff; 891 int change; 892 unsigned short old_val, val1, val2; 893 894 val1 = ucontrol->value.integer.value[0] & mask; 895 val2 = ucontrol->value.integer.value[1] & mask; 896 if (invert) { 897 val1 = mask - val1; 898 val2 = mask - val2; 899 } 900 val1 <<= shift_left; 901 val2 <<= shift_right; 902 spin_lock_irqsave(&chip->lock, flags); 903 old_val = snd_ad1816a_read(chip, reg); 904 val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; 905 change = val1 != old_val; 906 snd_ad1816a_write(chip, reg, val1); 907 spin_unlock_irqrestore(&chip->lock, flags); 908 return change; 909 } 910 911 static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0); 912 static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0); 913 static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0); 914 static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0); 915 static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0); 916 917 static struct snd_kcontrol_new snd_ad1816a_controls[] = { 918 AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1), 919 AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1, 920 db_scale_5bit), 921 AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1), 922 AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1, 923 db_scale_6bit), 924 AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1), 925 AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1, 926 db_scale_5bit_12db_max), 927 AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1), 928 AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1, 929 db_scale_5bit_12db_max), 930 AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1), 931 AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1, 932 db_scale_5bit_12db_max), 933 AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1), 934 AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1, 935 db_scale_6bit), 936 AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1), 937 AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1, 938 db_scale_5bit_12db_max), 939 AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0), 940 AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1), 941 AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1, 942 db_scale_5bit_12db_max), 943 AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1), 944 AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1, 945 db_scale_4bit), 946 AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1), 947 AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1, 948 db_scale_5bit), 949 { 950 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 951 .name = "Capture Source", 952 .info = snd_ad1816a_info_mux, 953 .get = snd_ad1816a_get_mux, 954 .put = snd_ad1816a_put_mux, 955 }, 956 AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1), 957 AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0, 958 db_scale_rec_gain), 959 AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1), 960 AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0), 961 }; 962 963 int snd_ad1816a_mixer(struct snd_ad1816a *chip) 964 { 965 struct snd_card *card; 966 unsigned int idx; 967 int err; 968 969 if (snd_BUG_ON(!chip || !chip->card)) 970 return -EINVAL; 971 972 card = chip->card; 973 974 strcpy(card->mixername, snd_ad1816a_chip_id(chip)); 975 976 for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) { 977 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip))) < 0) 978 return err; 979 } 980 return 0; 981 } 982