1 /* 2 * Routines for control of the AK4117 via 4-wire serial interface 3 * IEC958 (S/PDIF) receiver by Asahi Kasei 4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 5 * 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23 #include <linux/slab.h> 24 #include <linux/delay.h> 25 #include <linux/module.h> 26 #include <sound/core.h> 27 #include <sound/control.h> 28 #include <sound/pcm.h> 29 #include <sound/ak4117.h> 30 #include <sound/asoundef.h> 31 32 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 33 MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei"); 34 MODULE_LICENSE("GPL"); 35 36 #define AK4117_ADDR 0x00 /* fixed address */ 37 38 static void snd_ak4117_timer(unsigned long data); 39 40 static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val) 41 { 42 ak4117->write(ak4117->private_data, reg, val); 43 if (reg < sizeof(ak4117->regmap)) 44 ak4117->regmap[reg] = val; 45 } 46 47 static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg) 48 { 49 return ak4117->read(ak4117->private_data, reg); 50 } 51 52 #if 0 53 static void reg_dump(struct ak4117 *ak4117) 54 { 55 int i; 56 57 printk(KERN_DEBUG "AK4117 REG DUMP:\n"); 58 for (i = 0; i < 0x1b; i++) 59 printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0); 60 } 61 #endif 62 63 static void snd_ak4117_free(struct ak4117 *chip) 64 { 65 del_timer_sync(&chip->timer); 66 kfree(chip); 67 } 68 69 static int snd_ak4117_dev_free(struct snd_device *device) 70 { 71 struct ak4117 *chip = device->device_data; 72 snd_ak4117_free(chip); 73 return 0; 74 } 75 76 int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write, 77 const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117) 78 { 79 struct ak4117 *chip; 80 int err = 0; 81 unsigned char reg; 82 static struct snd_device_ops ops = { 83 .dev_free = snd_ak4117_dev_free, 84 }; 85 86 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 87 if (chip == NULL) 88 return -ENOMEM; 89 spin_lock_init(&chip->lock); 90 chip->card = card; 91 chip->read = read; 92 chip->write = write; 93 chip->private_data = private_data; 94 setup_timer(&chip->timer, snd_ak4117_timer, (unsigned long)chip); 95 96 for (reg = 0; reg < 5; reg++) 97 chip->regmap[reg] = pgm[reg]; 98 snd_ak4117_reinit(chip); 99 100 chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC); 101 chip->rcs1 = reg_read(chip, AK4117_REG_RCS1); 102 chip->rcs2 = reg_read(chip, AK4117_REG_RCS2); 103 104 if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0) 105 goto __fail; 106 107 if (r_ak4117) 108 *r_ak4117 = chip; 109 return 0; 110 111 __fail: 112 snd_ak4117_free(chip); 113 return err < 0 ? err : -EIO; 114 } 115 116 void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val) 117 { 118 if (reg >= 5) 119 return; 120 reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); 121 } 122 123 void snd_ak4117_reinit(struct ak4117 *chip) 124 { 125 unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg; 126 127 del_timer(&chip->timer); 128 chip->init = 1; 129 /* bring the chip to reset state and powerdown state */ 130 reg_write(chip, AK4117_REG_PWRDN, 0); 131 udelay(200); 132 /* release reset, but leave powerdown */ 133 reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN); 134 udelay(200); 135 for (reg = 1; reg < 5; reg++) 136 reg_write(chip, reg, chip->regmap[reg]); 137 /* release powerdown, everything is initialized now */ 138 reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN); 139 chip->init = 0; 140 mod_timer(&chip->timer, 1 + jiffies); 141 } 142 143 static unsigned int external_rate(unsigned char rcs1) 144 { 145 switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) { 146 case AK4117_FS_32000HZ: return 32000; 147 case AK4117_FS_44100HZ: return 44100; 148 case AK4117_FS_48000HZ: return 48000; 149 case AK4117_FS_88200HZ: return 88200; 150 case AK4117_FS_96000HZ: return 96000; 151 case AK4117_FS_176400HZ: return 176400; 152 case AK4117_FS_192000HZ: return 192000; 153 default: return 0; 154 } 155 } 156 157 static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol, 158 struct snd_ctl_elem_info *uinfo) 159 { 160 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 161 uinfo->count = 1; 162 uinfo->value.integer.min = 0; 163 uinfo->value.integer.max = LONG_MAX; 164 return 0; 165 } 166 167 static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol, 168 struct snd_ctl_elem_value *ucontrol) 169 { 170 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 171 long *ptr; 172 173 spin_lock_irq(&chip->lock); 174 ptr = (long *)(((char *)chip) + kcontrol->private_value); 175 ucontrol->value.integer.value[0] = *ptr; 176 *ptr = 0; 177 spin_unlock_irq(&chip->lock); 178 return 0; 179 } 180 181 #define snd_ak4117_in_bit_info snd_ctl_boolean_mono_info 182 183 static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol, 184 struct snd_ctl_elem_value *ucontrol) 185 { 186 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 187 unsigned char reg = kcontrol->private_value & 0xff; 188 unsigned char bit = (kcontrol->private_value >> 8) & 0xff; 189 unsigned char inv = (kcontrol->private_value >> 31) & 1; 190 191 ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; 192 return 0; 193 } 194 195 static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol, 196 struct snd_ctl_elem_info *uinfo) 197 { 198 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 199 uinfo->count = 1; 200 uinfo->value.integer.min = 0; 201 uinfo->value.integer.max = 1; 202 return 0; 203 } 204 205 static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol, 206 struct snd_ctl_elem_value *ucontrol) 207 { 208 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 209 210 ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0; 211 return 0; 212 } 213 214 static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol, 215 struct snd_ctl_elem_value *ucontrol) 216 { 217 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 218 int change; 219 u8 old_val; 220 221 spin_lock_irq(&chip->lock); 222 old_val = chip->regmap[AK4117_REG_IO]; 223 change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0); 224 if (change) 225 reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0)); 226 spin_unlock_irq(&chip->lock); 227 return change; 228 } 229 230 static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol, 231 struct snd_ctl_elem_info *uinfo) 232 { 233 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 234 uinfo->count = 1; 235 uinfo->value.integer.min = 0; 236 uinfo->value.integer.max = 192000; 237 return 0; 238 } 239 240 static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol, 241 struct snd_ctl_elem_value *ucontrol) 242 { 243 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 244 245 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1)); 246 return 0; 247 } 248 249 static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 250 { 251 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 252 uinfo->count = 1; 253 return 0; 254 } 255 256 static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol, 257 struct snd_ctl_elem_value *ucontrol) 258 { 259 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 260 unsigned i; 261 262 for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++) 263 ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i); 264 return 0; 265 } 266 267 static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 268 { 269 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 270 uinfo->count = 1; 271 return 0; 272 } 273 274 static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol, 275 struct snd_ctl_elem_value *ucontrol) 276 { 277 memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE); 278 return 0; 279 } 280 281 static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 282 { 283 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 284 uinfo->value.integer.min = 0; 285 uinfo->value.integer.max = 0xffff; 286 uinfo->count = 4; 287 return 0; 288 } 289 290 static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol, 291 struct snd_ctl_elem_value *ucontrol) 292 { 293 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 294 unsigned short tmp; 295 296 ucontrol->value.integer.value[0] = 0xf8f2; 297 ucontrol->value.integer.value[1] = 0x4e1f; 298 tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8); 299 ucontrol->value.integer.value[2] = tmp; 300 tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8); 301 ucontrol->value.integer.value[3] = tmp; 302 return 0; 303 } 304 305 static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 306 { 307 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 308 uinfo->count = AK4117_REG_QSUB_SIZE; 309 return 0; 310 } 311 312 static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol, 313 struct snd_ctl_elem_value *ucontrol) 314 { 315 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 316 unsigned i; 317 318 for (i = 0; i < AK4117_REG_QSUB_SIZE; i++) 319 ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i); 320 return 0; 321 } 322 323 /* Don't forget to change AK4117_CONTROLS define!!! */ 324 static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = { 325 { 326 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 327 .name = "IEC958 Parity Errors", 328 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 329 .info = snd_ak4117_in_error_info, 330 .get = snd_ak4117_in_error_get, 331 .private_value = offsetof(struct ak4117, parity_errors), 332 }, 333 { 334 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 335 .name = "IEC958 V-Bit Errors", 336 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 337 .info = snd_ak4117_in_error_info, 338 .get = snd_ak4117_in_error_get, 339 .private_value = offsetof(struct ak4117, v_bit_errors), 340 }, 341 { 342 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 343 .name = "IEC958 C-CRC Errors", 344 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 345 .info = snd_ak4117_in_error_info, 346 .get = snd_ak4117_in_error_get, 347 .private_value = offsetof(struct ak4117, ccrc_errors), 348 }, 349 { 350 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 351 .name = "IEC958 Q-CRC Errors", 352 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 353 .info = snd_ak4117_in_error_info, 354 .get = snd_ak4117_in_error_get, 355 .private_value = offsetof(struct ak4117, qcrc_errors), 356 }, 357 { 358 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 359 .name = "IEC958 External Rate", 360 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 361 .info = snd_ak4117_rate_info, 362 .get = snd_ak4117_rate_get, 363 }, 364 { 365 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 366 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK), 367 .access = SNDRV_CTL_ELEM_ACCESS_READ, 368 .info = snd_ak4117_spdif_mask_info, 369 .get = snd_ak4117_spdif_mask_get, 370 }, 371 { 372 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 373 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT), 374 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 375 .info = snd_ak4117_spdif_info, 376 .get = snd_ak4117_spdif_get, 377 }, 378 { 379 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 380 .name = "IEC958 Preamble Capture Default", 381 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 382 .info = snd_ak4117_spdif_pinfo, 383 .get = snd_ak4117_spdif_pget, 384 }, 385 { 386 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 387 .name = "IEC958 Q-subcode Capture Default", 388 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 389 .info = snd_ak4117_spdif_qinfo, 390 .get = snd_ak4117_spdif_qget, 391 }, 392 { 393 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 394 .name = "IEC958 Audio", 395 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 396 .info = snd_ak4117_in_bit_info, 397 .get = snd_ak4117_in_bit_get, 398 .private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0, 399 }, 400 { 401 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 402 .name = "IEC958 Non-PCM Bitstream", 403 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 404 .info = snd_ak4117_in_bit_info, 405 .get = snd_ak4117_in_bit_get, 406 .private_value = (5<<8) | AK4117_REG_RCS1, 407 }, 408 { 409 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 410 .name = "IEC958 DTS Bitstream", 411 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 412 .info = snd_ak4117_in_bit_info, 413 .get = snd_ak4117_in_bit_get, 414 .private_value = (6<<8) | AK4117_REG_RCS1, 415 }, 416 { 417 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 418 .name = "AK4117 Input Select", 419 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE, 420 .info = snd_ak4117_rx_info, 421 .get = snd_ak4117_rx_get, 422 .put = snd_ak4117_rx_put, 423 } 424 }; 425 426 int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream) 427 { 428 struct snd_kcontrol *kctl; 429 unsigned int idx; 430 int err; 431 432 if (snd_BUG_ON(!cap_substream)) 433 return -EINVAL; 434 ak4117->substream = cap_substream; 435 for (idx = 0; idx < AK4117_CONTROLS; idx++) { 436 kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117); 437 if (kctl == NULL) 438 return -ENOMEM; 439 kctl->id.device = cap_substream->pcm->device; 440 kctl->id.subdevice = cap_substream->number; 441 err = snd_ctl_add(ak4117->card, kctl); 442 if (err < 0) 443 return err; 444 ak4117->kctls[idx] = kctl; 445 } 446 return 0; 447 } 448 449 int snd_ak4117_external_rate(struct ak4117 *ak4117) 450 { 451 unsigned char rcs1; 452 453 rcs1 = reg_read(ak4117, AK4117_REG_RCS1); 454 return external_rate(rcs1); 455 } 456 457 int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags) 458 { 459 struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL; 460 unsigned long _flags; 461 int res = 0; 462 unsigned char rcs0, rcs1, rcs2; 463 unsigned char c0, c1; 464 465 rcs1 = reg_read(ak4117, AK4117_REG_RCS1); 466 if (flags & AK4117_CHECK_NO_STAT) 467 goto __rate; 468 rcs0 = reg_read(ak4117, AK4117_REG_RCS0); 469 rcs2 = reg_read(ak4117, AK4117_REG_RCS2); 470 // printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2); 471 spin_lock_irqsave(&ak4117->lock, _flags); 472 if (rcs0 & AK4117_PAR) 473 ak4117->parity_errors++; 474 if (rcs0 & AK4117_V) 475 ak4117->v_bit_errors++; 476 if (rcs2 & AK4117_CCRC) 477 ak4117->ccrc_errors++; 478 if (rcs2 & AK4117_QCRC) 479 ak4117->qcrc_errors++; 480 c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^ 481 (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)); 482 c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^ 483 (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)); 484 ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC); 485 ak4117->rcs1 = rcs1; 486 ak4117->rcs2 = rcs2; 487 spin_unlock_irqrestore(&ak4117->lock, _flags); 488 489 if (rcs0 & AK4117_PAR) 490 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id); 491 if (rcs0 & AK4117_V) 492 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id); 493 if (rcs2 & AK4117_CCRC) 494 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id); 495 if (rcs2 & AK4117_QCRC) 496 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id); 497 498 /* rate change */ 499 if (c1 & 0x0f) 500 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id); 501 502 if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT)) 503 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id); 504 if (c0 & AK4117_QINT) 505 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id); 506 507 if (c0 & AK4117_AUDION) 508 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id); 509 if (c1 & AK4117_NPCM) 510 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id); 511 if (c1 & AK4117_DTSCD) 512 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id); 513 514 if (ak4117->change_callback && (c0 | c1) != 0) 515 ak4117->change_callback(ak4117, c0, c1); 516 517 __rate: 518 /* compare rate */ 519 res = external_rate(rcs1); 520 if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) { 521 snd_pcm_stream_lock_irqsave(ak4117->substream, _flags); 522 if (snd_pcm_running(ak4117->substream)) { 523 // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res); 524 snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING); 525 wake_up(&runtime->sleep); 526 res = 1; 527 } 528 snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags); 529 } 530 return res; 531 } 532 533 static void snd_ak4117_timer(unsigned long data) 534 { 535 struct ak4117 *chip = (struct ak4117 *)data; 536 537 if (chip->init) 538 return; 539 snd_ak4117_check_rate_and_errors(chip, 0); 540 mod_timer(&chip->timer, 1 + jiffies); 541 } 542 543 EXPORT_SYMBOL(snd_ak4117_create); 544 EXPORT_SYMBOL(snd_ak4117_reg_write); 545 EXPORT_SYMBOL(snd_ak4117_reinit); 546 EXPORT_SYMBOL(snd_ak4117_build); 547 EXPORT_SYMBOL(snd_ak4117_external_rate); 548 EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors); 549