1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Routines for control of the AK4114 via I2C and 4-wire serial interface 4 * IEC958 (S/PDIF) receiver by Asahi Kasei 5 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 6 */ 7 8 #include <linux/slab.h> 9 #include <linux/delay.h> 10 #include <linux/module.h> 11 #include <sound/core.h> 12 #include <sound/control.h> 13 #include <sound/pcm.h> 14 #include <sound/ak4114.h> 15 #include <sound/asoundef.h> 16 #include <sound/info.h> 17 18 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 19 MODULE_DESCRIPTION("AK4114 IEC958 (S/PDIF) receiver by Asahi Kasei"); 20 MODULE_LICENSE("GPL"); 21 22 #define AK4114_ADDR 0x00 /* fixed address */ 23 24 static void ak4114_stats(struct work_struct *work); 25 static void ak4114_init_regs(struct ak4114 *chip); 26 27 static void reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char val) 28 { 29 ak4114->write(ak4114->private_data, reg, val); 30 if (reg <= AK4114_REG_INT1_MASK) 31 ak4114->regmap[reg] = val; 32 else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4) 33 ak4114->txcsb[reg-AK4114_REG_TXCSB0] = val; 34 } 35 36 static inline unsigned char reg_read(struct ak4114 *ak4114, unsigned char reg) 37 { 38 return ak4114->read(ak4114->private_data, reg); 39 } 40 41 #if 0 42 static void reg_dump(struct ak4114 *ak4114) 43 { 44 int i; 45 46 printk(KERN_DEBUG "AK4114 REG DUMP:\n"); 47 for (i = 0; i < 0x20; i++) 48 printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < ARRAY_SIZE(ak4114->regmap) ? ak4114->regmap[i] : 0); 49 } 50 #endif 51 52 static void snd_ak4114_free(struct ak4114 *chip) 53 { 54 atomic_inc(&chip->wq_processing); /* don't schedule new work */ 55 cancel_delayed_work_sync(&chip->work); 56 kfree(chip); 57 } 58 59 static int snd_ak4114_dev_free(struct snd_device *device) 60 { 61 struct ak4114 *chip = device->device_data; 62 snd_ak4114_free(chip); 63 return 0; 64 } 65 66 int snd_ak4114_create(struct snd_card *card, 67 ak4114_read_t *read, ak4114_write_t *write, 68 const unsigned char pgm[6], const unsigned char txcsb[5], 69 void *private_data, struct ak4114 **r_ak4114) 70 { 71 struct ak4114 *chip; 72 int err = 0; 73 unsigned char reg; 74 static struct snd_device_ops ops = { 75 .dev_free = snd_ak4114_dev_free, 76 }; 77 78 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 79 if (chip == NULL) 80 return -ENOMEM; 81 spin_lock_init(&chip->lock); 82 chip->card = card; 83 chip->read = read; 84 chip->write = write; 85 chip->private_data = private_data; 86 INIT_DELAYED_WORK(&chip->work, ak4114_stats); 87 atomic_set(&chip->wq_processing, 0); 88 mutex_init(&chip->reinit_mutex); 89 90 for (reg = 0; reg < 6; reg++) 91 chip->regmap[reg] = pgm[reg]; 92 for (reg = 0; reg < 5; reg++) 93 chip->txcsb[reg] = txcsb[reg]; 94 95 ak4114_init_regs(chip); 96 97 chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT); 98 chip->rcs1 = reg_read(chip, AK4114_REG_RCS1); 99 100 if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0) 101 goto __fail; 102 103 if (r_ak4114) 104 *r_ak4114 = chip; 105 return 0; 106 107 __fail: 108 snd_ak4114_free(chip); 109 return err; 110 } 111 EXPORT_SYMBOL(snd_ak4114_create); 112 113 void snd_ak4114_reg_write(struct ak4114 *chip, unsigned char reg, unsigned char mask, unsigned char val) 114 { 115 if (reg <= AK4114_REG_INT1_MASK) 116 reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); 117 else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4) 118 reg_write(chip, reg, 119 (chip->txcsb[reg-AK4114_REG_TXCSB0] & ~mask) | val); 120 } 121 EXPORT_SYMBOL(snd_ak4114_reg_write); 122 123 static void ak4114_init_regs(struct ak4114 *chip) 124 { 125 unsigned char old = chip->regmap[AK4114_REG_PWRDN], reg; 126 127 /* bring the chip to reset state and powerdown state */ 128 reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN)); 129 udelay(200); 130 /* release reset, but leave powerdown */ 131 reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN); 132 udelay(200); 133 for (reg = 1; reg < 6; reg++) 134 reg_write(chip, reg, chip->regmap[reg]); 135 for (reg = 0; reg < 5; reg++) 136 reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]); 137 /* release powerdown, everything is initialized now */ 138 reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN); 139 } 140 141 void snd_ak4114_reinit(struct ak4114 *chip) 142 { 143 if (atomic_inc_return(&chip->wq_processing) == 1) 144 cancel_delayed_work_sync(&chip->work); 145 mutex_lock(&chip->reinit_mutex); 146 ak4114_init_regs(chip); 147 mutex_unlock(&chip->reinit_mutex); 148 /* bring up statistics / event queing */ 149 if (atomic_dec_and_test(&chip->wq_processing)) 150 schedule_delayed_work(&chip->work, HZ / 10); 151 } 152 EXPORT_SYMBOL(snd_ak4114_reinit); 153 154 static unsigned int external_rate(unsigned char rcs1) 155 { 156 switch (rcs1 & (AK4114_FS0|AK4114_FS1|AK4114_FS2|AK4114_FS3)) { 157 case AK4114_FS_32000HZ: return 32000; 158 case AK4114_FS_44100HZ: return 44100; 159 case AK4114_FS_48000HZ: return 48000; 160 case AK4114_FS_88200HZ: return 88200; 161 case AK4114_FS_96000HZ: return 96000; 162 case AK4114_FS_176400HZ: return 176400; 163 case AK4114_FS_192000HZ: return 192000; 164 default: return 0; 165 } 166 } 167 168 static int snd_ak4114_in_error_info(struct snd_kcontrol *kcontrol, 169 struct snd_ctl_elem_info *uinfo) 170 { 171 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 172 uinfo->count = 1; 173 uinfo->value.integer.min = 0; 174 uinfo->value.integer.max = LONG_MAX; 175 return 0; 176 } 177 178 static int snd_ak4114_in_error_get(struct snd_kcontrol *kcontrol, 179 struct snd_ctl_elem_value *ucontrol) 180 { 181 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); 182 183 spin_lock_irq(&chip->lock); 184 ucontrol->value.integer.value[0] = 185 chip->errors[kcontrol->private_value]; 186 chip->errors[kcontrol->private_value] = 0; 187 spin_unlock_irq(&chip->lock); 188 return 0; 189 } 190 191 #define snd_ak4114_in_bit_info snd_ctl_boolean_mono_info 192 193 static int snd_ak4114_in_bit_get(struct snd_kcontrol *kcontrol, 194 struct snd_ctl_elem_value *ucontrol) 195 { 196 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); 197 unsigned char reg = kcontrol->private_value & 0xff; 198 unsigned char bit = (kcontrol->private_value >> 8) & 0xff; 199 unsigned char inv = (kcontrol->private_value >> 31) & 1; 200 201 ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; 202 return 0; 203 } 204 205 static int snd_ak4114_rate_info(struct snd_kcontrol *kcontrol, 206 struct snd_ctl_elem_info *uinfo) 207 { 208 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 209 uinfo->count = 1; 210 uinfo->value.integer.min = 0; 211 uinfo->value.integer.max = 192000; 212 return 0; 213 } 214 215 static int snd_ak4114_rate_get(struct snd_kcontrol *kcontrol, 216 struct snd_ctl_elem_value *ucontrol) 217 { 218 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); 219 220 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1)); 221 return 0; 222 } 223 224 static int snd_ak4114_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 225 { 226 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 227 uinfo->count = 1; 228 return 0; 229 } 230 231 static int snd_ak4114_spdif_get(struct snd_kcontrol *kcontrol, 232 struct snd_ctl_elem_value *ucontrol) 233 { 234 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); 235 unsigned i; 236 237 for (i = 0; i < AK4114_REG_RXCSB_SIZE; i++) 238 ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i); 239 return 0; 240 } 241 242 static int snd_ak4114_spdif_playback_get(struct snd_kcontrol *kcontrol, 243 struct snd_ctl_elem_value *ucontrol) 244 { 245 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); 246 unsigned i; 247 248 for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++) 249 ucontrol->value.iec958.status[i] = chip->txcsb[i]; 250 return 0; 251 } 252 253 static int snd_ak4114_spdif_playback_put(struct snd_kcontrol *kcontrol, 254 struct snd_ctl_elem_value *ucontrol) 255 { 256 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); 257 unsigned i; 258 259 for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++) 260 reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]); 261 return 0; 262 } 263 264 static int snd_ak4114_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 265 { 266 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 267 uinfo->count = 1; 268 return 0; 269 } 270 271 static int snd_ak4114_spdif_mask_get(struct snd_kcontrol *kcontrol, 272 struct snd_ctl_elem_value *ucontrol) 273 { 274 memset(ucontrol->value.iec958.status, 0xff, AK4114_REG_RXCSB_SIZE); 275 return 0; 276 } 277 278 static int snd_ak4114_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 279 { 280 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 281 uinfo->value.integer.min = 0; 282 uinfo->value.integer.max = 0xffff; 283 uinfo->count = 4; 284 return 0; 285 } 286 287 static int snd_ak4114_spdif_pget(struct snd_kcontrol *kcontrol, 288 struct snd_ctl_elem_value *ucontrol) 289 { 290 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); 291 unsigned short tmp; 292 293 ucontrol->value.integer.value[0] = 0xf8f2; 294 ucontrol->value.integer.value[1] = 0x4e1f; 295 tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8); 296 ucontrol->value.integer.value[2] = tmp; 297 tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8); 298 ucontrol->value.integer.value[3] = tmp; 299 return 0; 300 } 301 302 static int snd_ak4114_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 303 { 304 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 305 uinfo->count = AK4114_REG_QSUB_SIZE; 306 return 0; 307 } 308 309 static int snd_ak4114_spdif_qget(struct snd_kcontrol *kcontrol, 310 struct snd_ctl_elem_value *ucontrol) 311 { 312 struct ak4114 *chip = snd_kcontrol_chip(kcontrol); 313 unsigned i; 314 315 for (i = 0; i < AK4114_REG_QSUB_SIZE; i++) 316 ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i); 317 return 0; 318 } 319 320 /* Don't forget to change AK4114_CONTROLS define!!! */ 321 static struct snd_kcontrol_new snd_ak4114_iec958_controls[] = { 322 { 323 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 324 .name = "IEC958 Parity Errors", 325 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 326 .info = snd_ak4114_in_error_info, 327 .get = snd_ak4114_in_error_get, 328 .private_value = AK4114_PARITY_ERRORS, 329 }, 330 { 331 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 332 .name = "IEC958 V-Bit Errors", 333 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 334 .info = snd_ak4114_in_error_info, 335 .get = snd_ak4114_in_error_get, 336 .private_value = AK4114_V_BIT_ERRORS, 337 }, 338 { 339 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 340 .name = "IEC958 C-CRC Errors", 341 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 342 .info = snd_ak4114_in_error_info, 343 .get = snd_ak4114_in_error_get, 344 .private_value = AK4114_CCRC_ERRORS, 345 }, 346 { 347 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 348 .name = "IEC958 Q-CRC Errors", 349 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 350 .info = snd_ak4114_in_error_info, 351 .get = snd_ak4114_in_error_get, 352 .private_value = AK4114_QCRC_ERRORS, 353 }, 354 { 355 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 356 .name = "IEC958 External Rate", 357 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 358 .info = snd_ak4114_rate_info, 359 .get = snd_ak4114_rate_get, 360 }, 361 { 362 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 363 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), 364 .access = SNDRV_CTL_ELEM_ACCESS_READ, 365 .info = snd_ak4114_spdif_mask_info, 366 .get = snd_ak4114_spdif_mask_get, 367 }, 368 { 369 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 370 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 371 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 372 .info = snd_ak4114_spdif_info, 373 .get = snd_ak4114_spdif_playback_get, 374 .put = snd_ak4114_spdif_playback_put, 375 }, 376 { 377 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 378 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK), 379 .access = SNDRV_CTL_ELEM_ACCESS_READ, 380 .info = snd_ak4114_spdif_mask_info, 381 .get = snd_ak4114_spdif_mask_get, 382 }, 383 { 384 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 385 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT), 386 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 387 .info = snd_ak4114_spdif_info, 388 .get = snd_ak4114_spdif_get, 389 }, 390 { 391 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 392 .name = "IEC958 Preamble Capture Default", 393 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 394 .info = snd_ak4114_spdif_pinfo, 395 .get = snd_ak4114_spdif_pget, 396 }, 397 { 398 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 399 .name = "IEC958 Q-subcode Capture Default", 400 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 401 .info = snd_ak4114_spdif_qinfo, 402 .get = snd_ak4114_spdif_qget, 403 }, 404 { 405 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 406 .name = "IEC958 Audio", 407 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 408 .info = snd_ak4114_in_bit_info, 409 .get = snd_ak4114_in_bit_get, 410 .private_value = (1<<31) | (1<<8) | AK4114_REG_RCS0, 411 }, 412 { 413 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 414 .name = "IEC958 Non-PCM Bitstream", 415 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 416 .info = snd_ak4114_in_bit_info, 417 .get = snd_ak4114_in_bit_get, 418 .private_value = (6<<8) | AK4114_REG_RCS0, 419 }, 420 { 421 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 422 .name = "IEC958 DTS Bitstream", 423 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 424 .info = snd_ak4114_in_bit_info, 425 .get = snd_ak4114_in_bit_get, 426 .private_value = (3<<8) | AK4114_REG_RCS0, 427 }, 428 { 429 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 430 .name = "IEC958 PPL Lock Status", 431 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 432 .info = snd_ak4114_in_bit_info, 433 .get = snd_ak4114_in_bit_get, 434 .private_value = (1<<31) | (4<<8) | AK4114_REG_RCS0, 435 } 436 }; 437 438 439 static void snd_ak4114_proc_regs_read(struct snd_info_entry *entry, 440 struct snd_info_buffer *buffer) 441 { 442 struct ak4114 *ak4114 = entry->private_data; 443 int reg, val; 444 /* all ak4114 registers 0x00 - 0x1f */ 445 for (reg = 0; reg < 0x20; reg++) { 446 val = reg_read(ak4114, reg); 447 snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val); 448 } 449 } 450 451 static void snd_ak4114_proc_init(struct ak4114 *ak4114) 452 { 453 snd_card_ro_proc_new(ak4114->card, "ak4114", ak4114, 454 snd_ak4114_proc_regs_read); 455 } 456 457 int snd_ak4114_build(struct ak4114 *ak4114, 458 struct snd_pcm_substream *ply_substream, 459 struct snd_pcm_substream *cap_substream) 460 { 461 struct snd_kcontrol *kctl; 462 unsigned int idx; 463 int err; 464 465 if (snd_BUG_ON(!cap_substream)) 466 return -EINVAL; 467 ak4114->playback_substream = ply_substream; 468 ak4114->capture_substream = cap_substream; 469 for (idx = 0; idx < AK4114_CONTROLS; idx++) { 470 kctl = snd_ctl_new1(&snd_ak4114_iec958_controls[idx], ak4114); 471 if (kctl == NULL) 472 return -ENOMEM; 473 if (strstr(kctl->id.name, "Playback")) { 474 if (ply_substream == NULL) { 475 snd_ctl_free_one(kctl); 476 ak4114->kctls[idx] = NULL; 477 continue; 478 } 479 kctl->id.device = ply_substream->pcm->device; 480 kctl->id.subdevice = ply_substream->number; 481 } else { 482 kctl->id.device = cap_substream->pcm->device; 483 kctl->id.subdevice = cap_substream->number; 484 } 485 err = snd_ctl_add(ak4114->card, kctl); 486 if (err < 0) 487 return err; 488 ak4114->kctls[idx] = kctl; 489 } 490 snd_ak4114_proc_init(ak4114); 491 /* trigger workq */ 492 schedule_delayed_work(&ak4114->work, HZ / 10); 493 return 0; 494 } 495 EXPORT_SYMBOL(snd_ak4114_build); 496 497 /* notify kcontrols if any parameters are changed */ 498 static void ak4114_notify(struct ak4114 *ak4114, 499 unsigned char rcs0, unsigned char rcs1, 500 unsigned char c0, unsigned char c1) 501 { 502 if (!ak4114->kctls[0]) 503 return; 504 505 if (rcs0 & AK4114_PAR) 506 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 507 &ak4114->kctls[0]->id); 508 if (rcs0 & AK4114_V) 509 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 510 &ak4114->kctls[1]->id); 511 if (rcs1 & AK4114_CCRC) 512 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 513 &ak4114->kctls[2]->id); 514 if (rcs1 & AK4114_QCRC) 515 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 516 &ak4114->kctls[3]->id); 517 518 /* rate change */ 519 if (c1 & 0xf0) 520 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 521 &ak4114->kctls[4]->id); 522 523 if ((c0 & AK4114_PEM) | (c0 & AK4114_CINT)) 524 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 525 &ak4114->kctls[9]->id); 526 if (c0 & AK4114_QINT) 527 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 528 &ak4114->kctls[10]->id); 529 530 if (c0 & AK4114_AUDION) 531 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 532 &ak4114->kctls[11]->id); 533 if (c0 & AK4114_AUTO) 534 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 535 &ak4114->kctls[12]->id); 536 if (c0 & AK4114_DTSCD) 537 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 538 &ak4114->kctls[13]->id); 539 if (c0 & AK4114_UNLCK) 540 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, 541 &ak4114->kctls[14]->id); 542 } 543 544 int snd_ak4114_external_rate(struct ak4114 *ak4114) 545 { 546 unsigned char rcs1; 547 548 rcs1 = reg_read(ak4114, AK4114_REG_RCS1); 549 return external_rate(rcs1); 550 } 551 EXPORT_SYMBOL(snd_ak4114_external_rate); 552 553 int snd_ak4114_check_rate_and_errors(struct ak4114 *ak4114, unsigned int flags) 554 { 555 struct snd_pcm_runtime *runtime = ak4114->capture_substream ? ak4114->capture_substream->runtime : NULL; 556 unsigned long _flags; 557 int res = 0; 558 unsigned char rcs0, rcs1; 559 unsigned char c0, c1; 560 561 rcs1 = reg_read(ak4114, AK4114_REG_RCS1); 562 if (flags & AK4114_CHECK_NO_STAT) 563 goto __rate; 564 rcs0 = reg_read(ak4114, AK4114_REG_RCS0); 565 spin_lock_irqsave(&ak4114->lock, _flags); 566 if (rcs0 & AK4114_PAR) 567 ak4114->errors[AK4114_PARITY_ERRORS]++; 568 if (rcs1 & AK4114_V) 569 ak4114->errors[AK4114_V_BIT_ERRORS]++; 570 if (rcs1 & AK4114_CCRC) 571 ak4114->errors[AK4114_CCRC_ERRORS]++; 572 if (rcs1 & AK4114_QCRC) 573 ak4114->errors[AK4114_QCRC_ERRORS]++; 574 c0 = (ak4114->rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)) ^ 575 (rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)); 576 c1 = (ak4114->rcs1 & 0xf0) ^ (rcs1 & 0xf0); 577 ak4114->rcs0 = rcs0 & ~(AK4114_QINT | AK4114_CINT); 578 ak4114->rcs1 = rcs1; 579 spin_unlock_irqrestore(&ak4114->lock, _flags); 580 581 ak4114_notify(ak4114, rcs0, rcs1, c0, c1); 582 if (ak4114->change_callback && (c0 | c1) != 0) 583 ak4114->change_callback(ak4114, c0, c1); 584 585 __rate: 586 /* compare rate */ 587 res = external_rate(rcs1); 588 if (!(flags & AK4114_CHECK_NO_RATE) && runtime && runtime->rate != res) { 589 snd_pcm_stream_lock_irqsave(ak4114->capture_substream, _flags); 590 if (snd_pcm_running(ak4114->capture_substream)) { 591 // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res); 592 snd_pcm_stop(ak4114->capture_substream, SNDRV_PCM_STATE_DRAINING); 593 res = 1; 594 } 595 snd_pcm_stream_unlock_irqrestore(ak4114->capture_substream, _flags); 596 } 597 return res; 598 } 599 EXPORT_SYMBOL(snd_ak4114_check_rate_and_errors); 600 601 static void ak4114_stats(struct work_struct *work) 602 { 603 struct ak4114 *chip = container_of(work, struct ak4114, work.work); 604 605 if (atomic_inc_return(&chip->wq_processing) == 1) 606 snd_ak4114_check_rate_and_errors(chip, chip->check_flags); 607 if (atomic_dec_and_test(&chip->wq_processing)) 608 schedule_delayed_work(&chip->work, HZ / 10); 609 } 610 611 #ifdef CONFIG_PM 612 void snd_ak4114_suspend(struct ak4114 *chip) 613 { 614 atomic_inc(&chip->wq_processing); /* don't schedule new work */ 615 cancel_delayed_work_sync(&chip->work); 616 } 617 EXPORT_SYMBOL(snd_ak4114_suspend); 618 619 void snd_ak4114_resume(struct ak4114 *chip) 620 { 621 atomic_dec(&chip->wq_processing); 622 snd_ak4114_reinit(chip); 623 } 624 EXPORT_SYMBOL(snd_ak4114_resume); 625 #endif 626