1 /* 2 * Routines for control of the AK4113 via I2C/4-wire serial interface 3 * IEC958 (S/PDIF) receiver by Asahi Kasei 4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 5 * Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com> 6 * 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 * 22 */ 23 24 #include <linux/slab.h> 25 #include <linux/delay.h> 26 #include <linux/module.h> 27 #include <sound/core.h> 28 #include <sound/control.h> 29 #include <sound/pcm.h> 30 #include <sound/ak4113.h> 31 #include <sound/asoundef.h> 32 #include <sound/info.h> 33 34 MODULE_AUTHOR("Pavel Hofman <pavel.hofman@ivitera.com>"); 35 MODULE_DESCRIPTION("AK4113 IEC958 (S/PDIF) receiver by Asahi Kasei"); 36 MODULE_LICENSE("GPL"); 37 38 #define AK4113_ADDR 0x00 /* fixed address */ 39 40 static void ak4113_stats(struct work_struct *work); 41 static void ak4113_init_regs(struct ak4113 *chip); 42 43 44 static void reg_write(struct ak4113 *ak4113, unsigned char reg, 45 unsigned char val) 46 { 47 ak4113->write(ak4113->private_data, reg, val); 48 if (reg < sizeof(ak4113->regmap)) 49 ak4113->regmap[reg] = val; 50 } 51 52 static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg) 53 { 54 return ak4113->read(ak4113->private_data, reg); 55 } 56 57 static void snd_ak4113_free(struct ak4113 *chip) 58 { 59 atomic_inc(&chip->wq_processing); /* don't schedule new work */ 60 cancel_delayed_work_sync(&chip->work); 61 kfree(chip); 62 } 63 64 static int snd_ak4113_dev_free(struct snd_device *device) 65 { 66 struct ak4113 *chip = device->device_data; 67 snd_ak4113_free(chip); 68 return 0; 69 } 70 71 int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read, 72 ak4113_write_t *write, const unsigned char *pgm, 73 void *private_data, struct ak4113 **r_ak4113) 74 { 75 struct ak4113 *chip; 76 int err; 77 unsigned char reg; 78 static struct snd_device_ops ops = { 79 .dev_free = snd_ak4113_dev_free, 80 }; 81 82 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 83 if (chip == NULL) 84 return -ENOMEM; 85 spin_lock_init(&chip->lock); 86 chip->card = card; 87 chip->read = read; 88 chip->write = write; 89 chip->private_data = private_data; 90 INIT_DELAYED_WORK(&chip->work, ak4113_stats); 91 atomic_set(&chip->wq_processing, 0); 92 mutex_init(&chip->reinit_mutex); 93 94 for (reg = 0; reg < AK4113_WRITABLE_REGS ; reg++) 95 chip->regmap[reg] = pgm[reg]; 96 ak4113_init_regs(chip); 97 98 chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT | 99 AK4113_CINT | AK4113_STC); 100 chip->rcs1 = reg_read(chip, AK4113_REG_RCS1); 101 chip->rcs2 = reg_read(chip, AK4113_REG_RCS2); 102 err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops); 103 if (err < 0) 104 goto __fail; 105 106 if (r_ak4113) 107 *r_ak4113 = chip; 108 return 0; 109 110 __fail: 111 snd_ak4113_free(chip); 112 return err; 113 } 114 EXPORT_SYMBOL_GPL(snd_ak4113_create); 115 116 void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg, 117 unsigned char mask, unsigned char val) 118 { 119 if (reg >= AK4113_WRITABLE_REGS) 120 return; 121 reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); 122 } 123 EXPORT_SYMBOL_GPL(snd_ak4113_reg_write); 124 125 static void ak4113_init_regs(struct ak4113 *chip) 126 { 127 unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg; 128 129 /* bring the chip to reset state and powerdown state */ 130 reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN)); 131 udelay(200); 132 /* release reset, but leave powerdown */ 133 reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN); 134 udelay(200); 135 for (reg = 1; reg < AK4113_WRITABLE_REGS; reg++) 136 reg_write(chip, reg, chip->regmap[reg]); 137 /* release powerdown, everything is initialized now */ 138 reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN); 139 } 140 141 void snd_ak4113_reinit(struct ak4113 *chip) 142 { 143 if (atomic_inc_return(&chip->wq_processing) == 1) 144 cancel_delayed_work_sync(&chip->work); 145 mutex_lock(&chip->reinit_mutex); 146 ak4113_init_regs(chip); 147 mutex_unlock(&chip->reinit_mutex); 148 /* bring up statistics / event queing */ 149 if (atomic_dec_and_test(&chip->wq_processing)) 150 schedule_delayed_work(&chip->work, HZ / 10); 151 } 152 EXPORT_SYMBOL_GPL(snd_ak4113_reinit); 153 154 static unsigned int external_rate(unsigned char rcs1) 155 { 156 switch (rcs1 & (AK4113_FS0|AK4113_FS1|AK4113_FS2|AK4113_FS3)) { 157 case AK4113_FS_8000HZ: 158 return 8000; 159 case AK4113_FS_11025HZ: 160 return 11025; 161 case AK4113_FS_16000HZ: 162 return 16000; 163 case AK4113_FS_22050HZ: 164 return 22050; 165 case AK4113_FS_24000HZ: 166 return 24000; 167 case AK4113_FS_32000HZ: 168 return 32000; 169 case AK4113_FS_44100HZ: 170 return 44100; 171 case AK4113_FS_48000HZ: 172 return 48000; 173 case AK4113_FS_64000HZ: 174 return 64000; 175 case AK4113_FS_88200HZ: 176 return 88200; 177 case AK4113_FS_96000HZ: 178 return 96000; 179 case AK4113_FS_176400HZ: 180 return 176400; 181 case AK4113_FS_192000HZ: 182 return 192000; 183 default: 184 return 0; 185 } 186 } 187 188 static int snd_ak4113_in_error_info(struct snd_kcontrol *kcontrol, 189 struct snd_ctl_elem_info *uinfo) 190 { 191 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 192 uinfo->count = 1; 193 uinfo->value.integer.min = 0; 194 uinfo->value.integer.max = LONG_MAX; 195 return 0; 196 } 197 198 static int snd_ak4113_in_error_get(struct snd_kcontrol *kcontrol, 199 struct snd_ctl_elem_value *ucontrol) 200 { 201 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); 202 long *ptr; 203 204 spin_lock_irq(&chip->lock); 205 ptr = (long *)(((char *)chip) + kcontrol->private_value); 206 ucontrol->value.integer.value[0] = *ptr; 207 *ptr = 0; 208 spin_unlock_irq(&chip->lock); 209 return 0; 210 } 211 212 #define snd_ak4113_in_bit_info snd_ctl_boolean_mono_info 213 214 static int snd_ak4113_in_bit_get(struct snd_kcontrol *kcontrol, 215 struct snd_ctl_elem_value *ucontrol) 216 { 217 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); 218 unsigned char reg = kcontrol->private_value & 0xff; 219 unsigned char bit = (kcontrol->private_value >> 8) & 0xff; 220 unsigned char inv = (kcontrol->private_value >> 31) & 1; 221 222 ucontrol->value.integer.value[0] = 223 ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; 224 return 0; 225 } 226 227 static int snd_ak4113_rx_info(struct snd_kcontrol *kcontrol, 228 struct snd_ctl_elem_info *uinfo) 229 { 230 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 231 uinfo->count = 1; 232 uinfo->value.integer.min = 0; 233 uinfo->value.integer.max = 5; 234 return 0; 235 } 236 237 static int snd_ak4113_rx_get(struct snd_kcontrol *kcontrol, 238 struct snd_ctl_elem_value *ucontrol) 239 { 240 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); 241 242 ucontrol->value.integer.value[0] = 243 (AK4113_IPS(chip->regmap[AK4113_REG_IO1])); 244 return 0; 245 } 246 247 static int snd_ak4113_rx_put(struct snd_kcontrol *kcontrol, 248 struct snd_ctl_elem_value *ucontrol) 249 { 250 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); 251 int change; 252 u8 old_val; 253 254 spin_lock_irq(&chip->lock); 255 old_val = chip->regmap[AK4113_REG_IO1]; 256 change = ucontrol->value.integer.value[0] != AK4113_IPS(old_val); 257 if (change) 258 reg_write(chip, AK4113_REG_IO1, 259 (old_val & (~AK4113_IPS(0xff))) | 260 (AK4113_IPS(ucontrol->value.integer.value[0]))); 261 spin_unlock_irq(&chip->lock); 262 return change; 263 } 264 265 static int snd_ak4113_rate_info(struct snd_kcontrol *kcontrol, 266 struct snd_ctl_elem_info *uinfo) 267 { 268 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 269 uinfo->count = 1; 270 uinfo->value.integer.min = 0; 271 uinfo->value.integer.max = 192000; 272 return 0; 273 } 274 275 static int snd_ak4113_rate_get(struct snd_kcontrol *kcontrol, 276 struct snd_ctl_elem_value *ucontrol) 277 { 278 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); 279 280 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, 281 AK4113_REG_RCS1)); 282 return 0; 283 } 284 285 static int snd_ak4113_spdif_info(struct snd_kcontrol *kcontrol, 286 struct snd_ctl_elem_info *uinfo) 287 { 288 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 289 uinfo->count = 1; 290 return 0; 291 } 292 293 static int snd_ak4113_spdif_get(struct snd_kcontrol *kcontrol, 294 struct snd_ctl_elem_value *ucontrol) 295 { 296 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); 297 unsigned i; 298 299 for (i = 0; i < AK4113_REG_RXCSB_SIZE; i++) 300 ucontrol->value.iec958.status[i] = reg_read(chip, 301 AK4113_REG_RXCSB0 + i); 302 return 0; 303 } 304 305 static int snd_ak4113_spdif_mask_info(struct snd_kcontrol *kcontrol, 306 struct snd_ctl_elem_info *uinfo) 307 { 308 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 309 uinfo->count = 1; 310 return 0; 311 } 312 313 static int snd_ak4113_spdif_mask_get(struct snd_kcontrol *kcontrol, 314 struct snd_ctl_elem_value *ucontrol) 315 { 316 memset(ucontrol->value.iec958.status, 0xff, AK4113_REG_RXCSB_SIZE); 317 return 0; 318 } 319 320 static int snd_ak4113_spdif_pinfo(struct snd_kcontrol *kcontrol, 321 struct snd_ctl_elem_info *uinfo) 322 { 323 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 324 uinfo->value.integer.min = 0; 325 uinfo->value.integer.max = 0xffff; 326 uinfo->count = 4; 327 return 0; 328 } 329 330 static int snd_ak4113_spdif_pget(struct snd_kcontrol *kcontrol, 331 struct snd_ctl_elem_value *ucontrol) 332 { 333 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); 334 unsigned short tmp; 335 336 ucontrol->value.integer.value[0] = 0xf8f2; 337 ucontrol->value.integer.value[1] = 0x4e1f; 338 tmp = reg_read(chip, AK4113_REG_Pc0) | 339 (reg_read(chip, AK4113_REG_Pc1) << 8); 340 ucontrol->value.integer.value[2] = tmp; 341 tmp = reg_read(chip, AK4113_REG_Pd0) | 342 (reg_read(chip, AK4113_REG_Pd1) << 8); 343 ucontrol->value.integer.value[3] = tmp; 344 return 0; 345 } 346 347 static int snd_ak4113_spdif_qinfo(struct snd_kcontrol *kcontrol, 348 struct snd_ctl_elem_info *uinfo) 349 { 350 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 351 uinfo->count = AK4113_REG_QSUB_SIZE; 352 return 0; 353 } 354 355 static int snd_ak4113_spdif_qget(struct snd_kcontrol *kcontrol, 356 struct snd_ctl_elem_value *ucontrol) 357 { 358 struct ak4113 *chip = snd_kcontrol_chip(kcontrol); 359 unsigned i; 360 361 for (i = 0; i < AK4113_REG_QSUB_SIZE; i++) 362 ucontrol->value.bytes.data[i] = reg_read(chip, 363 AK4113_REG_QSUB_ADDR + i); 364 return 0; 365 } 366 367 /* Don't forget to change AK4113_CONTROLS define!!! */ 368 static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = { 369 { 370 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 371 .name = "IEC958 Parity Errors", 372 .access = SNDRV_CTL_ELEM_ACCESS_READ | 373 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 374 .info = snd_ak4113_in_error_info, 375 .get = snd_ak4113_in_error_get, 376 .private_value = offsetof(struct ak4113, parity_errors), 377 }, 378 { 379 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 380 .name = "IEC958 V-Bit Errors", 381 .access = SNDRV_CTL_ELEM_ACCESS_READ | 382 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 383 .info = snd_ak4113_in_error_info, 384 .get = snd_ak4113_in_error_get, 385 .private_value = offsetof(struct ak4113, v_bit_errors), 386 }, 387 { 388 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 389 .name = "IEC958 C-CRC Errors", 390 .access = SNDRV_CTL_ELEM_ACCESS_READ | 391 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 392 .info = snd_ak4113_in_error_info, 393 .get = snd_ak4113_in_error_get, 394 .private_value = offsetof(struct ak4113, ccrc_errors), 395 }, 396 { 397 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 398 .name = "IEC958 Q-CRC Errors", 399 .access = SNDRV_CTL_ELEM_ACCESS_READ | 400 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 401 .info = snd_ak4113_in_error_info, 402 .get = snd_ak4113_in_error_get, 403 .private_value = offsetof(struct ak4113, qcrc_errors), 404 }, 405 { 406 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 407 .name = "IEC958 External Rate", 408 .access = SNDRV_CTL_ELEM_ACCESS_READ | 409 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 410 .info = snd_ak4113_rate_info, 411 .get = snd_ak4113_rate_get, 412 }, 413 { 414 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 415 .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK), 416 .access = SNDRV_CTL_ELEM_ACCESS_READ, 417 .info = snd_ak4113_spdif_mask_info, 418 .get = snd_ak4113_spdif_mask_get, 419 }, 420 { 421 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 422 .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT), 423 .access = SNDRV_CTL_ELEM_ACCESS_READ | 424 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 425 .info = snd_ak4113_spdif_info, 426 .get = snd_ak4113_spdif_get, 427 }, 428 { 429 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 430 .name = "IEC958 Preamble Capture Default", 431 .access = SNDRV_CTL_ELEM_ACCESS_READ | 432 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 433 .info = snd_ak4113_spdif_pinfo, 434 .get = snd_ak4113_spdif_pget, 435 }, 436 { 437 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 438 .name = "IEC958 Q-subcode Capture Default", 439 .access = SNDRV_CTL_ELEM_ACCESS_READ | 440 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 441 .info = snd_ak4113_spdif_qinfo, 442 .get = snd_ak4113_spdif_qget, 443 }, 444 { 445 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 446 .name = "IEC958 Audio", 447 .access = SNDRV_CTL_ELEM_ACCESS_READ | 448 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 449 .info = snd_ak4113_in_bit_info, 450 .get = snd_ak4113_in_bit_get, 451 .private_value = (1<<31) | (1<<8) | AK4113_REG_RCS0, 452 }, 453 { 454 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 455 .name = "IEC958 Non-PCM Bitstream", 456 .access = SNDRV_CTL_ELEM_ACCESS_READ | 457 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 458 .info = snd_ak4113_in_bit_info, 459 .get = snd_ak4113_in_bit_get, 460 .private_value = (0<<8) | AK4113_REG_RCS1, 461 }, 462 { 463 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 464 .name = "IEC958 DTS Bitstream", 465 .access = SNDRV_CTL_ELEM_ACCESS_READ | 466 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 467 .info = snd_ak4113_in_bit_info, 468 .get = snd_ak4113_in_bit_get, 469 .private_value = (1<<8) | AK4113_REG_RCS1, 470 }, 471 { 472 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 473 .name = "AK4113 Input Select", 474 .access = SNDRV_CTL_ELEM_ACCESS_READ | 475 SNDRV_CTL_ELEM_ACCESS_WRITE, 476 .info = snd_ak4113_rx_info, 477 .get = snd_ak4113_rx_get, 478 .put = snd_ak4113_rx_put, 479 } 480 }; 481 482 static void snd_ak4113_proc_regs_read(struct snd_info_entry *entry, 483 struct snd_info_buffer *buffer) 484 { 485 struct ak4113 *ak4113 = entry->private_data; 486 int reg, val; 487 /* all ak4113 registers 0x00 - 0x1c */ 488 for (reg = 0; reg < 0x1d; reg++) { 489 val = reg_read(ak4113, reg); 490 snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val); 491 } 492 } 493 494 static void snd_ak4113_proc_init(struct ak4113 *ak4113) 495 { 496 struct snd_info_entry *entry; 497 if (!snd_card_proc_new(ak4113->card, "ak4113", &entry)) 498 snd_info_set_text_ops(entry, ak4113, snd_ak4113_proc_regs_read); 499 } 500 501 int snd_ak4113_build(struct ak4113 *ak4113, 502 struct snd_pcm_substream *cap_substream) 503 { 504 struct snd_kcontrol *kctl; 505 unsigned int idx; 506 int err; 507 508 if (snd_BUG_ON(!cap_substream)) 509 return -EINVAL; 510 ak4113->substream = cap_substream; 511 for (idx = 0; idx < AK4113_CONTROLS; idx++) { 512 kctl = snd_ctl_new1(&snd_ak4113_iec958_controls[idx], ak4113); 513 if (kctl == NULL) 514 return -ENOMEM; 515 kctl->id.device = cap_substream->pcm->device; 516 kctl->id.subdevice = cap_substream->number; 517 err = snd_ctl_add(ak4113->card, kctl); 518 if (err < 0) 519 return err; 520 ak4113->kctls[idx] = kctl; 521 } 522 snd_ak4113_proc_init(ak4113); 523 /* trigger workq */ 524 schedule_delayed_work(&ak4113->work, HZ / 10); 525 return 0; 526 } 527 EXPORT_SYMBOL_GPL(snd_ak4113_build); 528 529 int snd_ak4113_external_rate(struct ak4113 *ak4113) 530 { 531 unsigned char rcs1; 532 533 rcs1 = reg_read(ak4113, AK4113_REG_RCS1); 534 return external_rate(rcs1); 535 } 536 EXPORT_SYMBOL_GPL(snd_ak4113_external_rate); 537 538 int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags) 539 { 540 struct snd_pcm_runtime *runtime = 541 ak4113->substream ? ak4113->substream->runtime : NULL; 542 unsigned long _flags; 543 int res = 0; 544 unsigned char rcs0, rcs1, rcs2; 545 unsigned char c0, c1; 546 547 rcs1 = reg_read(ak4113, AK4113_REG_RCS1); 548 if (flags & AK4113_CHECK_NO_STAT) 549 goto __rate; 550 rcs0 = reg_read(ak4113, AK4113_REG_RCS0); 551 rcs2 = reg_read(ak4113, AK4113_REG_RCS2); 552 spin_lock_irqsave(&ak4113->lock, _flags); 553 if (rcs0 & AK4113_PAR) 554 ak4113->parity_errors++; 555 if (rcs0 & AK4113_V) 556 ak4113->v_bit_errors++; 557 if (rcs2 & AK4113_CCRC) 558 ak4113->ccrc_errors++; 559 if (rcs2 & AK4113_QCRC) 560 ak4113->qcrc_errors++; 561 c0 = (ak4113->rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC | 562 AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)) ^ 563 (rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC | 564 AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)); 565 c1 = (ak4113->rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM | 566 AK4113_DAT | 0xf0)) ^ 567 (rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM | 568 AK4113_DAT | 0xf0)); 569 ak4113->rcs0 = rcs0 & ~(AK4113_QINT | AK4113_CINT | AK4113_STC); 570 ak4113->rcs1 = rcs1; 571 ak4113->rcs2 = rcs2; 572 spin_unlock_irqrestore(&ak4113->lock, _flags); 573 574 if (rcs0 & AK4113_PAR) 575 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE, 576 &ak4113->kctls[0]->id); 577 if (rcs0 & AK4113_V) 578 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE, 579 &ak4113->kctls[1]->id); 580 if (rcs2 & AK4113_CCRC) 581 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE, 582 &ak4113->kctls[2]->id); 583 if (rcs2 & AK4113_QCRC) 584 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE, 585 &ak4113->kctls[3]->id); 586 587 /* rate change */ 588 if (c1 & 0xf0) 589 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE, 590 &ak4113->kctls[4]->id); 591 592 if ((c1 & AK4113_PEM) | (c0 & AK4113_CINT)) 593 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE, 594 &ak4113->kctls[6]->id); 595 if (c0 & AK4113_QINT) 596 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE, 597 &ak4113->kctls[8]->id); 598 599 if (c0 & AK4113_AUDION) 600 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE, 601 &ak4113->kctls[9]->id); 602 if (c1 & AK4113_NPCM) 603 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE, 604 &ak4113->kctls[10]->id); 605 if (c1 & AK4113_DTSCD) 606 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE, 607 &ak4113->kctls[11]->id); 608 609 if (ak4113->change_callback && (c0 | c1) != 0) 610 ak4113->change_callback(ak4113, c0, c1); 611 612 __rate: 613 /* compare rate */ 614 res = external_rate(rcs1); 615 if (!(flags & AK4113_CHECK_NO_RATE) && runtime && 616 (runtime->rate != res)) { 617 snd_pcm_stream_lock_irqsave(ak4113->substream, _flags); 618 if (snd_pcm_running(ak4113->substream)) { 619 /*printk(KERN_DEBUG "rate changed (%i <- %i)\n", 620 * runtime->rate, res); */ 621 snd_pcm_stop(ak4113->substream, 622 SNDRV_PCM_STATE_DRAINING); 623 wake_up(&runtime->sleep); 624 res = 1; 625 } 626 snd_pcm_stream_unlock_irqrestore(ak4113->substream, _flags); 627 } 628 return res; 629 } 630 EXPORT_SYMBOL_GPL(snd_ak4113_check_rate_and_errors); 631 632 static void ak4113_stats(struct work_struct *work) 633 { 634 struct ak4113 *chip = container_of(work, struct ak4113, work.work); 635 636 if (atomic_inc_return(&chip->wq_processing) == 1) 637 snd_ak4113_check_rate_and_errors(chip, chip->check_flags); 638 639 if (atomic_dec_and_test(&chip->wq_processing)) 640 schedule_delayed_work(&chip->work, HZ / 10); 641 } 642 643 #ifdef CONFIG_PM 644 void snd_ak4113_suspend(struct ak4113 *chip) 645 { 646 atomic_inc(&chip->wq_processing); /* don't schedule new work */ 647 cancel_delayed_work_sync(&chip->work); 648 } 649 EXPORT_SYMBOL(snd_ak4113_suspend); 650 651 void snd_ak4113_resume(struct ak4113 *chip) 652 { 653 atomic_dec(&chip->wq_processing); 654 snd_ak4113_reinit(chip); 655 } 656 EXPORT_SYMBOL(snd_ak4113_resume); 657 #endif 658