1 /* 2 * Routines for control of the CS8427 via i2c bus 3 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic 4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 5 * 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23 #include <linux/slab.h> 24 #include <linux/delay.h> 25 #include <linux/init.h> 26 #include <asm/unaligned.h> 27 #include <sound/core.h> 28 #include <sound/control.h> 29 #include <sound/pcm.h> 30 #include <sound/cs8427.h> 31 #include <sound/asoundef.h> 32 33 static void snd_cs8427_reset(struct snd_i2c_device *cs8427); 34 35 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 36 MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic"); 37 MODULE_LICENSE("GPL"); 38 39 #define CS8427_ADDR (0x20>>1) /* fixed address */ 40 41 struct cs8427_stream { 42 struct snd_pcm_substream *substream; 43 char hw_status[24]; /* hardware status */ 44 char def_status[24]; /* default status */ 45 char pcm_status[24]; /* PCM private status */ 46 char hw_udata[32]; 47 struct snd_kcontrol *pcm_ctl; 48 }; 49 50 struct cs8427 { 51 unsigned char regmap[0x14]; /* map of first 1 + 13 registers */ 52 unsigned int rate; 53 unsigned int reset_timeout; 54 struct cs8427_stream playback; 55 struct cs8427_stream capture; 56 }; 57 58 static unsigned char swapbits(unsigned char val) 59 { 60 int bit; 61 unsigned char res = 0; 62 for (bit = 0; bit < 8; bit++) { 63 res <<= 1; 64 res |= val & 1; 65 val >>= 1; 66 } 67 return res; 68 } 69 70 int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg, 71 unsigned char val) 72 { 73 int err; 74 unsigned char buf[2]; 75 76 buf[0] = reg & 0x7f; 77 buf[1] = val; 78 if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) { 79 snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x " 80 "to CS8427 (%i)\n", buf[0], buf[1], err); 81 return err < 0 ? err : -EIO; 82 } 83 return 0; 84 } 85 86 EXPORT_SYMBOL(snd_cs8427_reg_write); 87 88 static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg) 89 { 90 int err; 91 unsigned char buf; 92 93 if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) { 94 snd_printk(KERN_ERR "unable to send register 0x%x byte " 95 "to CS8427\n", reg); 96 return err < 0 ? err : -EIO; 97 } 98 if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) { 99 snd_printk(KERN_ERR "unable to read register 0x%x byte " 100 "from CS8427\n", reg); 101 return err < 0 ? err : -EIO; 102 } 103 return buf; 104 } 105 106 static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata) 107 { 108 struct cs8427 *chip = device->private_data; 109 int err; 110 111 udata = udata ? CS8427_BSEL : 0; 112 if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) { 113 chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL; 114 chip->regmap[CS8427_REG_CSDATABUF] |= udata; 115 err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF, 116 chip->regmap[CS8427_REG_CSDATABUF]); 117 if (err < 0) 118 return err; 119 } 120 return 0; 121 } 122 123 static int snd_cs8427_send_corudata(struct snd_i2c_device *device, 124 int udata, 125 unsigned char *ndata, 126 int count) 127 { 128 struct cs8427 *chip = device->private_data; 129 char *hw_data = udata ? 130 chip->playback.hw_udata : chip->playback.hw_status; 131 char data[32]; 132 int err, idx; 133 134 if (!memcmp(hw_data, ndata, count)) 135 return 0; 136 if ((err = snd_cs8427_select_corudata(device, udata)) < 0) 137 return err; 138 memcpy(hw_data, ndata, count); 139 if (udata) { 140 memset(data, 0, sizeof(data)); 141 if (memcmp(hw_data, data, count) == 0) { 142 chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK; 143 chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS | 144 CS8427_EFTUI; 145 err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF, 146 chip->regmap[CS8427_REG_UDATABUF]); 147 return err < 0 ? err : 0; 148 } 149 } 150 data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF; 151 for (idx = 0; idx < count; idx++) 152 data[idx + 1] = swapbits(ndata[idx]); 153 if (snd_i2c_sendbytes(device, data, count + 1) != count + 1) 154 return -EIO; 155 return 1; 156 } 157 158 static void snd_cs8427_free(struct snd_i2c_device *device) 159 { 160 kfree(device->private_data); 161 } 162 163 int snd_cs8427_create(struct snd_i2c_bus *bus, 164 unsigned char addr, 165 unsigned int reset_timeout, 166 struct snd_i2c_device **r_cs8427) 167 { 168 static unsigned char initvals1[] = { 169 CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC, 170 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes, 171 TCBL=output */ 172 CS8427_SWCLK | CS8427_TCBLDIR, 173 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs, 174 normal stereo operation */ 175 0x00, 176 /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial, 177 Rx=>serial */ 178 CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER, 179 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs, 180 output time base = OMCK, input time base = recovered input clock, 181 recovered input clock source is ILRCK changed to AES3INPUT 182 (workaround, see snd_cs8427_reset) */ 183 CS8427_RXDILRCK, 184 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S, 185 24-bit, 64*Fsi */ 186 CS8427_SIDEL | CS8427_SILRPOL, 187 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format 188 = I2S, 24-bit, 64*Fsi */ 189 CS8427_SODEL | CS8427_SOLRPOL, 190 }; 191 static unsigned char initvals2[] = { 192 CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC, 193 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence, 194 biphase, parity status bits */ 195 /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/ 196 0xff, /* set everything */ 197 /* CS8427_REG_CSDATABUF: 198 Registers 32-55 window to CS buffer 199 Inhibit D->E transfers from overwriting first 5 bytes of CS data. 200 Inhibit D->E transfers (all) of CS data. 201 Allow E->F transfer of CS data. 202 One byte mode; both A/B channels get same written CB data. 203 A channel info is output to chip's EMPH* pin. */ 204 CS8427_CBMR | CS8427_DETCI, 205 /* CS8427_REG_UDATABUF: 206 Use internal buffer to transmit User (U) data. 207 Chip's U pin is an output. 208 Transmit all O's for user data. 209 Inhibit D->E transfers. 210 Inhibit E->F transfers. */ 211 CS8427_UD | CS8427_EFTUI | CS8427_DETUI, 212 }; 213 int err; 214 struct cs8427 *chip; 215 struct snd_i2c_device *device; 216 unsigned char buf[24]; 217 218 if ((err = snd_i2c_device_create(bus, "CS8427", 219 CS8427_ADDR | (addr & 7), 220 &device)) < 0) 221 return err; 222 chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL); 223 if (chip == NULL) { 224 snd_i2c_device_free(device); 225 return -ENOMEM; 226 } 227 device->private_free = snd_cs8427_free; 228 229 snd_i2c_lock(bus); 230 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER); 231 if (err != CS8427_VER8427A) { 232 /* give second chance */ 233 snd_printk(KERN_WARNING "invalid CS8427 signature 0x%x: " 234 "let me try again...\n", err); 235 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER); 236 } 237 if (err != CS8427_VER8427A) { 238 snd_i2c_unlock(bus); 239 snd_printk(KERN_ERR "unable to find CS8427 signature " 240 "(expected 0x%x, read 0x%x),\n", 241 CS8427_VER8427A, err); 242 snd_printk(KERN_ERR " initialization is not completed\n"); 243 return -EFAULT; 244 } 245 /* turn off run bit while making changes to configuration */ 246 err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00); 247 if (err < 0) 248 goto __fail; 249 /* send initial values */ 250 memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6); 251 if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) { 252 err = err < 0 ? err : -EIO; 253 goto __fail; 254 } 255 /* Turn off CS8427 interrupt stuff that is not used in hardware */ 256 memset(buf, 0, 7); 257 /* from address 9 to 15 */ 258 buf[0] = 9; /* register */ 259 if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7) 260 goto __fail; 261 /* send transfer initialization sequence */ 262 memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3); 263 if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) { 264 err = err < 0 ? err : -EIO; 265 goto __fail; 266 } 267 /* write default channel status bytes */ 268 put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf); 269 memset(buf + 4, 0, 24 - 4); 270 if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0) 271 goto __fail; 272 memcpy(chip->playback.def_status, buf, 24); 273 memcpy(chip->playback.pcm_status, buf, 24); 274 snd_i2c_unlock(bus); 275 276 /* turn on run bit and rock'n'roll */ 277 if (reset_timeout < 1) 278 reset_timeout = 1; 279 chip->reset_timeout = reset_timeout; 280 snd_cs8427_reset(device); 281 282 #if 0 // it's nice for read tests 283 { 284 char buf[128]; 285 int xx; 286 buf[0] = 0x81; 287 snd_i2c_sendbytes(device, buf, 1); 288 snd_i2c_readbytes(device, buf, 127); 289 for (xx = 0; xx < 127; xx++) 290 printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]); 291 } 292 #endif 293 294 if (r_cs8427) 295 *r_cs8427 = device; 296 return 0; 297 298 __fail: 299 snd_i2c_unlock(bus); 300 snd_i2c_device_free(device); 301 return err < 0 ? err : -EIO; 302 } 303 304 EXPORT_SYMBOL(snd_cs8427_create); 305 306 /* 307 * Reset the chip using run bit, also lock PLL using ILRCK and 308 * put back AES3INPUT. This workaround is described in latest 309 * CS8427 datasheet, otherwise TXDSERIAL will not work. 310 */ 311 static void snd_cs8427_reset(struct snd_i2c_device *cs8427) 312 { 313 struct cs8427 *chip; 314 unsigned long end_time; 315 int data, aes3input = 0; 316 317 snd_assert(cs8427, return); 318 chip = cs8427->private_data; 319 snd_i2c_lock(cs8427->bus); 320 if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) == 321 CS8427_RXDAES3INPUT) /* AES3 bit is set */ 322 aes3input = 1; 323 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK); 324 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, 325 chip->regmap[CS8427_REG_CLOCKSOURCE]); 326 udelay(200); 327 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK; 328 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, 329 chip->regmap[CS8427_REG_CLOCKSOURCE]); 330 udelay(200); 331 snd_i2c_unlock(cs8427->bus); 332 end_time = jiffies + chip->reset_timeout; 333 while (time_after_eq(end_time, jiffies)) { 334 snd_i2c_lock(cs8427->bus); 335 data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS); 336 snd_i2c_unlock(cs8427->bus); 337 if (!(data & CS8427_UNLOCK)) 338 break; 339 schedule_timeout_uninterruptible(1); 340 } 341 snd_i2c_lock(cs8427->bus); 342 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK; 343 if (aes3input) 344 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT; 345 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, 346 chip->regmap[CS8427_REG_CLOCKSOURCE]); 347 snd_i2c_unlock(cs8427->bus); 348 } 349 350 static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol, 351 struct snd_ctl_elem_info *uinfo) 352 { 353 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 354 uinfo->count = 1; 355 uinfo->value.integer.min = 0; 356 uinfo->value.integer.max = 255; 357 return 0; 358 } 359 360 static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol, 361 struct snd_ctl_elem_value *ucontrol) 362 { 363 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); 364 int data; 365 366 snd_i2c_lock(device->bus); 367 data = snd_cs8427_reg_read(device, kcontrol->private_value); 368 snd_i2c_unlock(device->bus); 369 if (data < 0) 370 return data; 371 ucontrol->value.integer.value[0] = data; 372 return 0; 373 } 374 375 static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol, 376 struct snd_ctl_elem_info *uinfo) 377 { 378 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 379 uinfo->count = 10; 380 return 0; 381 } 382 383 static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol, 384 struct snd_ctl_elem_value *ucontrol) 385 { 386 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); 387 unsigned char reg = CS8427_REG_QSUBCODE; 388 int err; 389 390 snd_i2c_lock(device->bus); 391 if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) { 392 snd_printk(KERN_ERR "unable to send register 0x%x byte " 393 "to CS8427\n", reg); 394 snd_i2c_unlock(device->bus); 395 return err < 0 ? err : -EIO; 396 } 397 err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10); 398 if (err != 10) { 399 snd_printk(KERN_ERR "unable to read Q-subcode bytes " 400 "from CS8427\n"); 401 snd_i2c_unlock(device->bus); 402 return err < 0 ? err : -EIO; 403 } 404 snd_i2c_unlock(device->bus); 405 return 0; 406 } 407 408 static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol, 409 struct snd_ctl_elem_info *uinfo) 410 { 411 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 412 uinfo->count = 1; 413 return 0; 414 } 415 416 static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol, 417 struct snd_ctl_elem_value *ucontrol) 418 { 419 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); 420 struct cs8427 *chip = device->private_data; 421 422 snd_i2c_lock(device->bus); 423 memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24); 424 snd_i2c_unlock(device->bus); 425 return 0; 426 } 427 428 static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol, 429 struct snd_ctl_elem_value *ucontrol) 430 { 431 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); 432 struct cs8427 *chip = device->private_data; 433 unsigned char *status = kcontrol->private_value ? 434 chip->playback.pcm_status : chip->playback.def_status; 435 struct snd_pcm_runtime *runtime = chip->playback.substream ? 436 chip->playback.substream->runtime : NULL; 437 int err, change; 438 439 snd_i2c_lock(device->bus); 440 change = memcmp(ucontrol->value.iec958.status, status, 24) != 0; 441 memcpy(status, ucontrol->value.iec958.status, 24); 442 if (change && (kcontrol->private_value ? 443 runtime != NULL : runtime == NULL)) { 444 err = snd_cs8427_send_corudata(device, 0, status, 24); 445 if (err < 0) 446 change = err; 447 } 448 snd_i2c_unlock(device->bus); 449 return change; 450 } 451 452 static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol, 453 struct snd_ctl_elem_info *uinfo) 454 { 455 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 456 uinfo->count = 1; 457 return 0; 458 } 459 460 static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol, 461 struct snd_ctl_elem_value *ucontrol) 462 { 463 memset(ucontrol->value.iec958.status, 0xff, 24); 464 return 0; 465 } 466 467 static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = { 468 { 469 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 470 .info = snd_cs8427_in_status_info, 471 .name = "IEC958 CS8427 Input Status", 472 .access = (SNDRV_CTL_ELEM_ACCESS_READ | 473 SNDRV_CTL_ELEM_ACCESS_VOLATILE), 474 .get = snd_cs8427_in_status_get, 475 .private_value = 15, 476 }, 477 { 478 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 479 .info = snd_cs8427_in_status_info, 480 .name = "IEC958 CS8427 Error Status", 481 .access = (SNDRV_CTL_ELEM_ACCESS_READ | 482 SNDRV_CTL_ELEM_ACCESS_VOLATILE), 483 .get = snd_cs8427_in_status_get, 484 .private_value = 16, 485 }, 486 { 487 .access = SNDRV_CTL_ELEM_ACCESS_READ, 488 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 489 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), 490 .info = snd_cs8427_spdif_mask_info, 491 .get = snd_cs8427_spdif_mask_get, 492 }, 493 { 494 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 495 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 496 .info = snd_cs8427_spdif_info, 497 .get = snd_cs8427_spdif_get, 498 .put = snd_cs8427_spdif_put, 499 .private_value = 0 500 }, 501 { 502 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 503 SNDRV_CTL_ELEM_ACCESS_INACTIVE), 504 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 505 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 506 .info = snd_cs8427_spdif_info, 507 .get = snd_cs8427_spdif_get, 508 .put = snd_cs8427_spdif_put, 509 .private_value = 1 510 }, 511 { 512 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 513 .info = snd_cs8427_qsubcode_info, 514 .name = "IEC958 Q-subcode Capture Default", 515 .access = (SNDRV_CTL_ELEM_ACCESS_READ | 516 SNDRV_CTL_ELEM_ACCESS_VOLATILE), 517 .get = snd_cs8427_qsubcode_get 518 }}; 519 520 int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427, 521 struct snd_pcm_substream *play_substream, 522 struct snd_pcm_substream *cap_substream) 523 { 524 struct cs8427 *chip = cs8427->private_data; 525 struct snd_kcontrol *kctl; 526 unsigned int idx; 527 int err; 528 529 snd_assert(play_substream && cap_substream, return -EINVAL); 530 for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) { 531 kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427); 532 if (kctl == NULL) 533 return -ENOMEM; 534 kctl->id.device = play_substream->pcm->device; 535 kctl->id.subdevice = play_substream->number; 536 err = snd_ctl_add(cs8427->bus->card, kctl); 537 if (err < 0) 538 return err; 539 if (! strcmp(kctl->id.name, 540 SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM))) 541 chip->playback.pcm_ctl = kctl; 542 } 543 544 chip->playback.substream = play_substream; 545 chip->capture.substream = cap_substream; 546 snd_assert(chip->playback.pcm_ctl, return -EIO); 547 return 0; 548 } 549 550 EXPORT_SYMBOL(snd_cs8427_iec958_build); 551 552 int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active) 553 { 554 struct cs8427 *chip; 555 556 snd_assert(cs8427, return -ENXIO); 557 chip = cs8427->private_data; 558 if (active) 559 memcpy(chip->playback.pcm_status, 560 chip->playback.def_status, 24); 561 chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 562 snd_ctl_notify(cs8427->bus->card, 563 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO, 564 &chip->playback.pcm_ctl->id); 565 return 0; 566 } 567 568 EXPORT_SYMBOL(snd_cs8427_iec958_active); 569 570 int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate) 571 { 572 struct cs8427 *chip; 573 char *status; 574 int err, reset; 575 576 snd_assert(cs8427, return -ENXIO); 577 chip = cs8427->private_data; 578 status = chip->playback.pcm_status; 579 snd_i2c_lock(cs8427->bus); 580 if (status[0] & IEC958_AES0_PROFESSIONAL) { 581 status[0] &= ~IEC958_AES0_PRO_FS; 582 switch (rate) { 583 case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break; 584 case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break; 585 case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break; 586 default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break; 587 } 588 } else { 589 status[3] &= ~IEC958_AES3_CON_FS; 590 switch (rate) { 591 case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break; 592 case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break; 593 case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break; 594 } 595 } 596 err = snd_cs8427_send_corudata(cs8427, 0, status, 24); 597 if (err > 0) 598 snd_ctl_notify(cs8427->bus->card, 599 SNDRV_CTL_EVENT_MASK_VALUE, 600 &chip->playback.pcm_ctl->id); 601 reset = chip->rate != rate; 602 chip->rate = rate; 603 snd_i2c_unlock(cs8427->bus); 604 if (reset) 605 snd_cs8427_reset(cs8427); 606 return err < 0 ? err : 0; 607 } 608 609 EXPORT_SYMBOL(snd_cs8427_iec958_pcm); 610 611 static int __init alsa_cs8427_module_init(void) 612 { 613 return 0; 614 } 615 616 static void __exit alsa_cs8427_module_exit(void) 617 { 618 } 619 620 module_init(alsa_cs8427_module_init) 621 module_exit(alsa_cs8427_module_exit) 622