1 /* 2 * Routines for control of the CS8427 via i2c bus 3 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic 4 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 5 * 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23 #include <sound/driver.h> 24 #include <linux/slab.h> 25 #include <linux/delay.h> 26 #include <linux/init.h> 27 #include <sound/core.h> 28 #include <sound/control.h> 29 #include <sound/pcm.h> 30 #include <sound/cs8427.h> 31 #include <sound/asoundef.h> 32 33 static void snd_cs8427_reset(snd_i2c_device_t *cs8427); 34 35 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); 36 MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic"); 37 MODULE_LICENSE("GPL"); 38 39 #define CS8427_ADDR (0x20>>1) /* fixed address */ 40 41 typedef struct { 42 snd_pcm_substream_t *substream; 43 char hw_status[24]; /* hardware status */ 44 char def_status[24]; /* default status */ 45 char pcm_status[24]; /* PCM private status */ 46 char hw_udata[32]; 47 snd_kcontrol_t *pcm_ctl; 48 } cs8427_stream_t; 49 50 typedef struct { 51 unsigned char regmap[0x14]; /* map of first 1 + 13 registers */ 52 unsigned int rate; 53 unsigned int reset_timeout; 54 cs8427_stream_t playback; 55 cs8427_stream_t capture; 56 } cs8427_t; 57 58 static unsigned char swapbits(unsigned char val) 59 { 60 int bit; 61 unsigned char res = 0; 62 for (bit = 0; bit < 8; bit++) { 63 res <<= 1; 64 res |= val & 1; 65 val >>= 1; 66 } 67 return res; 68 } 69 70 int snd_cs8427_reg_write(snd_i2c_device_t *device, unsigned char reg, unsigned char val) 71 { 72 int err; 73 unsigned char buf[2]; 74 75 buf[0] = reg & 0x7f; 76 buf[1] = val; 77 if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) { 78 snd_printk("unable to send bytes 0x%02x:0x%02x to CS8427 (%i)\n", buf[0], buf[1], err); 79 return err < 0 ? err : -EIO; 80 } 81 return 0; 82 } 83 84 static int snd_cs8427_reg_read(snd_i2c_device_t *device, unsigned char reg) 85 { 86 int err; 87 unsigned char buf; 88 89 if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) { 90 snd_printk("unable to send register 0x%x byte to CS8427\n", reg); 91 return err < 0 ? err : -EIO; 92 } 93 if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) { 94 snd_printk("unable to read register 0x%x byte from CS8427\n", reg); 95 return err < 0 ? err : -EIO; 96 } 97 return buf; 98 } 99 100 static int snd_cs8427_select_corudata(snd_i2c_device_t *device, int udata) 101 { 102 cs8427_t *chip = device->private_data; 103 int err; 104 105 udata = udata ? CS8427_BSEL : 0; 106 if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) { 107 chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL; 108 chip->regmap[CS8427_REG_CSDATABUF] |= udata; 109 err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF, chip->regmap[CS8427_REG_CSDATABUF]); 110 if (err < 0) 111 return err; 112 } 113 return 0; 114 } 115 116 static int snd_cs8427_send_corudata(snd_i2c_device_t *device, 117 int udata, 118 unsigned char *ndata, 119 int count) 120 { 121 cs8427_t *chip = device->private_data; 122 char *hw_data = udata ? chip->playback.hw_udata : chip->playback.hw_status; 123 char data[32]; 124 int err, idx; 125 126 if (!memcmp(hw_data, ndata, count)) 127 return 0; 128 if ((err = snd_cs8427_select_corudata(device, udata)) < 0) 129 return err; 130 memcpy(hw_data, ndata, count); 131 if (udata) { 132 memset(data, 0, sizeof(data)); 133 if (memcmp(hw_data, data, count) == 0) { 134 chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK; 135 chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS | CS8427_EFTUI; 136 if ((err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF, chip->regmap[CS8427_REG_UDATABUF])) < 0) 137 return err; 138 return 0; 139 } 140 } 141 data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF; 142 for (idx = 0; idx < count; idx++) 143 data[idx + 1] = swapbits(ndata[idx]); 144 if (snd_i2c_sendbytes(device, data, count + 1) != count + 1) 145 return -EIO; 146 return 1; 147 } 148 149 static void snd_cs8427_free(snd_i2c_device_t *device) 150 { 151 kfree(device->private_data); 152 } 153 154 int snd_cs8427_create(snd_i2c_bus_t *bus, 155 unsigned char addr, 156 unsigned int reset_timeout, 157 snd_i2c_device_t **r_cs8427) 158 { 159 static unsigned char initvals1[] = { 160 CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC, 161 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes, TCBL=output */ 162 CS8427_SWCLK | CS8427_TCBLDIR, 163 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs, normal stereo operation */ 164 0x00, 165 /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial, Rx=>serial */ 166 CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER, 167 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs, output time base = OMCK, input time base = 168 recovered input clock, recovered input clock source is ILRCK changed to AES3INPUT (workaround, see snd_cs8427_reset) */ 169 CS8427_RXDILRCK, 170 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S, 24-bit, 64*Fsi */ 171 CS8427_SIDEL | CS8427_SILRPOL, 172 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format = I2S, 24-bit, 64*Fsi */ 173 CS8427_SODEL | CS8427_SOLRPOL, 174 }; 175 static unsigned char initvals2[] = { 176 CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC, 177 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence, biphase, parity status bits */ 178 /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR, */ 179 0xff, /* set everything */ 180 /* CS8427_REG_CSDATABUF: 181 Registers 32-55 window to CS buffer 182 Inhibit D->E transfers from overwriting first 5 bytes of CS data. 183 Inhibit D->E transfers (all) of CS data. 184 Allow E->F transfer of CS data. 185 One byte mode; both A/B channels get same written CB data. 186 A channel info is output to chip's EMPH* pin. */ 187 CS8427_CBMR | CS8427_DETCI, 188 /* CS8427_REG_UDATABUF: 189 Use internal buffer to transmit User (U) data. 190 Chip's U pin is an output. 191 Transmit all O's for user data. 192 Inhibit D->E transfers. 193 Inhibit E->F transfers. */ 194 CS8427_UD | CS8427_EFTUI | CS8427_DETUI, 195 }; 196 int err; 197 cs8427_t *chip; 198 snd_i2c_device_t *device; 199 unsigned char buf[24]; 200 201 if ((err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7), &device)) < 0) 202 return err; 203 chip = device->private_data = kcalloc(1, sizeof(*chip), GFP_KERNEL); 204 if (chip == NULL) { 205 snd_i2c_device_free(device); 206 return -ENOMEM; 207 } 208 device->private_free = snd_cs8427_free; 209 210 snd_i2c_lock(bus); 211 if ((err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER)) != CS8427_VER8427A) { 212 snd_i2c_unlock(bus); 213 snd_printk("unable to find CS8427 signature (expected 0x%x, read 0x%x), initialization is not completed\n", CS8427_VER8427A, err); 214 return -EFAULT; 215 } 216 /* turn off run bit while making changes to configuration */ 217 if ((err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00)) < 0) 218 goto __fail; 219 /* send initial values */ 220 memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6); 221 if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) { 222 err = err < 0 ? err : -EIO; 223 goto __fail; 224 } 225 /* Turn off CS8427 interrupt stuff that is not used in hardware */ 226 memset(buf, 0, 7); 227 /* from address 9 to 15 */ 228 buf[0] = 9; /* register */ 229 if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7) 230 goto __fail; 231 /* send transfer initialization sequence */ 232 memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3); 233 if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) { 234 err = err < 0 ? err : -EIO; 235 goto __fail; 236 } 237 /* write default channel status bytes */ 238 buf[0] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 0)); 239 buf[1] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 8)); 240 buf[2] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 16)); 241 buf[3] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 24)); 242 memset(buf + 4, 0, 24 - 4); 243 if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0) 244 goto __fail; 245 memcpy(chip->playback.def_status, buf, 24); 246 memcpy(chip->playback.pcm_status, buf, 24); 247 snd_i2c_unlock(bus); 248 249 /* turn on run bit and rock'n'roll */ 250 if (reset_timeout < 1) 251 reset_timeout = 1; 252 chip->reset_timeout = reset_timeout; 253 snd_cs8427_reset(device); 254 255 #if 0 // it's nice for read tests 256 { 257 char buf[128]; 258 int xx; 259 buf[0] = 0x81; 260 snd_i2c_sendbytes(device, buf, 1); 261 snd_i2c_readbytes(device, buf, 127); 262 for (xx = 0; xx < 127; xx++) 263 printk("reg[0x%x] = 0x%x\n", xx+1, buf[xx]); 264 } 265 #endif 266 267 if (r_cs8427) 268 *r_cs8427 = device; 269 return 0; 270 271 __fail: 272 snd_i2c_unlock(bus); 273 snd_i2c_device_free(device); 274 return err < 0 ? err : -EIO; 275 } 276 277 /* 278 * Reset the chip using run bit, also lock PLL using ILRCK and 279 * put back AES3INPUT. This workaround is described in latest 280 * CS8427 datasheet, otherwise TXDSERIAL will not work. 281 */ 282 static void snd_cs8427_reset(snd_i2c_device_t *cs8427) 283 { 284 cs8427_t *chip; 285 unsigned long end_time; 286 int data; 287 288 snd_assert(cs8427, return); 289 chip = cs8427->private_data; 290 snd_i2c_lock(cs8427->bus); 291 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK); 292 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]); 293 udelay(200); 294 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK; 295 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]); 296 udelay(200); 297 snd_i2c_unlock(cs8427->bus); 298 end_time = jiffies + chip->reset_timeout; 299 while (time_after_eq(end_time, jiffies)) { 300 snd_i2c_lock(cs8427->bus); 301 data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS); 302 snd_i2c_unlock(cs8427->bus); 303 if (!(data & CS8427_UNLOCK)) 304 break; 305 set_current_state(TASK_UNINTERRUPTIBLE); 306 schedule_timeout(1); 307 } 308 snd_i2c_lock(cs8427->bus); 309 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK; 310 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT; 311 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]); 312 snd_i2c_unlock(cs8427->bus); 313 } 314 315 static int snd_cs8427_in_status_info(snd_kcontrol_t *kcontrol, 316 snd_ctl_elem_info_t *uinfo) 317 { 318 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 319 uinfo->count = 1; 320 uinfo->value.integer.min = 0; 321 uinfo->value.integer.max = 255; 322 return 0; 323 } 324 325 static int snd_cs8427_in_status_get(snd_kcontrol_t *kcontrol, 326 snd_ctl_elem_value_t *ucontrol) 327 { 328 snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol); 329 int data; 330 331 snd_i2c_lock(device->bus); 332 data = snd_cs8427_reg_read(device, kcontrol->private_value); 333 snd_i2c_unlock(device->bus); 334 if (data < 0) 335 return data; 336 ucontrol->value.integer.value[0] = data; 337 return 0; 338 } 339 340 static int snd_cs8427_qsubcode_info(snd_kcontrol_t *kcontrol, 341 snd_ctl_elem_info_t *uinfo) 342 { 343 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 344 uinfo->count = 10; 345 return 0; 346 } 347 348 static int snd_cs8427_qsubcode_get(snd_kcontrol_t *kcontrol, 349 snd_ctl_elem_value_t *ucontrol) 350 { 351 snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol); 352 unsigned char reg = CS8427_REG_QSUBCODE; 353 int err; 354 355 snd_i2c_lock(device->bus); 356 if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) { 357 snd_printk("unable to send register 0x%x byte to CS8427\n", reg); 358 snd_i2c_unlock(device->bus); 359 return err < 0 ? err : -EIO; 360 } 361 if ((err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10)) != 10) { 362 snd_printk("unable to read Q-subcode bytes from CS8427\n"); 363 snd_i2c_unlock(device->bus); 364 return err < 0 ? err : -EIO; 365 } 366 snd_i2c_unlock(device->bus); 367 return 0; 368 } 369 370 static int snd_cs8427_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 371 { 372 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 373 uinfo->count = 1; 374 return 0; 375 } 376 377 static int snd_cs8427_spdif_get(snd_kcontrol_t * kcontrol, 378 snd_ctl_elem_value_t * ucontrol) 379 { 380 snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol); 381 cs8427_t *chip = device->private_data; 382 383 snd_i2c_lock(device->bus); 384 memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24); 385 snd_i2c_unlock(device->bus); 386 return 0; 387 } 388 389 static int snd_cs8427_spdif_put(snd_kcontrol_t * kcontrol, 390 snd_ctl_elem_value_t * ucontrol) 391 { 392 snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol); 393 cs8427_t *chip = device->private_data; 394 unsigned char *status = kcontrol->private_value ? chip->playback.pcm_status : chip->playback.def_status; 395 snd_pcm_runtime_t *runtime = chip->playback.substream ? chip->playback.substream->runtime : NULL; 396 int err, change; 397 398 snd_i2c_lock(device->bus); 399 change = memcmp(ucontrol->value.iec958.status, status, 24) != 0; 400 memcpy(status, ucontrol->value.iec958.status, 24); 401 if (change && (kcontrol->private_value ? runtime != NULL : runtime == NULL)) { 402 err = snd_cs8427_send_corudata(device, 0, status, 24); 403 if (err < 0) 404 change = err; 405 } 406 snd_i2c_unlock(device->bus); 407 return change; 408 } 409 410 static int snd_cs8427_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) 411 { 412 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 413 uinfo->count = 1; 414 return 0; 415 } 416 417 static int snd_cs8427_spdif_mask_get(snd_kcontrol_t * kcontrol, 418 snd_ctl_elem_value_t * ucontrol) 419 { 420 memset(ucontrol->value.iec958.status, 0xff, 24); 421 return 0; 422 } 423 424 static snd_kcontrol_new_t snd_cs8427_iec958_controls[] = { 425 { 426 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 427 .info = snd_cs8427_in_status_info, 428 .name = "IEC958 CS8427 Input Status", 429 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 430 .get = snd_cs8427_in_status_get, 431 .private_value = 15, 432 }, 433 { 434 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 435 .info = snd_cs8427_in_status_info, 436 .name = "IEC958 CS8427 Error Status", 437 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 438 .get = snd_cs8427_in_status_get, 439 .private_value = 16, 440 }, 441 { 442 .access = SNDRV_CTL_ELEM_ACCESS_READ, 443 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 444 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), 445 .info = snd_cs8427_spdif_mask_info, 446 .get = snd_cs8427_spdif_mask_get, 447 }, 448 { 449 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 450 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 451 .info = snd_cs8427_spdif_info, 452 .get = snd_cs8427_spdif_get, 453 .put = snd_cs8427_spdif_put, 454 .private_value = 0 455 }, 456 { 457 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 458 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 459 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 460 .info = snd_cs8427_spdif_info, 461 .get = snd_cs8427_spdif_get, 462 .put = snd_cs8427_spdif_put, 463 .private_value = 1 464 }, 465 { 466 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 467 .info = snd_cs8427_qsubcode_info, 468 .name = "IEC958 Q-subcode Capture Default", 469 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 470 .get = snd_cs8427_qsubcode_get 471 }}; 472 473 int snd_cs8427_iec958_build(snd_i2c_device_t *cs8427, 474 snd_pcm_substream_t *play_substream, 475 snd_pcm_substream_t *cap_substream) 476 { 477 cs8427_t *chip = cs8427->private_data; 478 snd_kcontrol_t *kctl; 479 unsigned int idx; 480 int err; 481 482 snd_assert(play_substream && cap_substream, return -EINVAL); 483 for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) { 484 kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427); 485 if (kctl == NULL) 486 return -ENOMEM; 487 kctl->id.device = play_substream->pcm->device; 488 kctl->id.subdevice = play_substream->number; 489 err = snd_ctl_add(cs8427->bus->card, kctl); 490 if (err < 0) 491 return err; 492 if (!strcmp(kctl->id.name, SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM))) 493 chip->playback.pcm_ctl = kctl; 494 } 495 496 chip->playback.substream = play_substream; 497 chip->capture.substream = cap_substream; 498 snd_assert(chip->playback.pcm_ctl, return -EIO); 499 return 0; 500 } 501 502 int snd_cs8427_iec958_active(snd_i2c_device_t *cs8427, int active) 503 { 504 cs8427_t *chip; 505 506 snd_assert(cs8427, return -ENXIO); 507 chip = cs8427->private_data; 508 if (active) 509 memcpy(chip->playback.pcm_status, chip->playback.def_status, 24); 510 chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 511 snd_ctl_notify(cs8427->bus->card, SNDRV_CTL_EVENT_MASK_VALUE | 512 SNDRV_CTL_EVENT_MASK_INFO, &chip->playback.pcm_ctl->id); 513 return 0; 514 } 515 516 int snd_cs8427_iec958_pcm(snd_i2c_device_t *cs8427, unsigned int rate) 517 { 518 cs8427_t *chip; 519 char *status; 520 int err, reset; 521 522 snd_assert(cs8427, return -ENXIO); 523 chip = cs8427->private_data; 524 status = chip->playback.pcm_status; 525 snd_i2c_lock(cs8427->bus); 526 if (status[0] & IEC958_AES0_PROFESSIONAL) { 527 status[0] &= ~IEC958_AES0_PRO_FS; 528 switch (rate) { 529 case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break; 530 case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break; 531 case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break; 532 default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break; 533 } 534 } else { 535 status[3] &= ~IEC958_AES3_CON_FS; 536 switch (rate) { 537 case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break; 538 case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break; 539 case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break; 540 } 541 } 542 err = snd_cs8427_send_corudata(cs8427, 0, status, 24); 543 if (err > 0) 544 snd_ctl_notify(cs8427->bus->card, 545 SNDRV_CTL_EVENT_MASK_VALUE, 546 &chip->playback.pcm_ctl->id); 547 reset = chip->rate != rate; 548 chip->rate = rate; 549 snd_i2c_unlock(cs8427->bus); 550 if (reset) 551 snd_cs8427_reset(cs8427); 552 return err < 0 ? err : 0; 553 } 554 555 static int __init alsa_cs8427_module_init(void) 556 { 557 return 0; 558 } 559 560 static void __exit alsa_cs8427_module_exit(void) 561 { 562 } 563 564 module_init(alsa_cs8427_module_init) 565 module_exit(alsa_cs8427_module_exit) 566 567 EXPORT_SYMBOL(snd_cs8427_create); 568 EXPORT_SYMBOL(snd_cs8427_reset); 569 EXPORT_SYMBOL(snd_cs8427_reg_write); 570 EXPORT_SYMBOL(snd_cs8427_iec958_build); 571 EXPORT_SYMBOL(snd_cs8427_iec958_active); 572 EXPORT_SYMBOL(snd_cs8427_iec958_pcm); 573