1 /* 2 * hdac-ext-controller.c - HD-audio extended controller functions. 3 * 4 * Copyright (C) 2014-2015 Intel Corp 5 * Author: Jeeja KP <jeeja.kp@intel.com> 6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 18 */ 19 20 #include <linux/delay.h> 21 #include <linux/slab.h> 22 #include <sound/hda_register.h> 23 #include <sound/hdaudio_ext.h> 24 25 /* 26 * maximum HDAC capablities we should parse to avoid endless looping: 27 * currently we have 4 extended caps, so this is future proof for now. 28 * extend when this limit is seen meeting in real HW 29 */ 30 #define HDAC_MAX_CAPS 10 31 32 /** 33 * snd_hdac_ext_bus_parse_capabilities - parse capablity structure 34 * @ebus: the pointer to extended bus object 35 * 36 * Returns 0 if successful, or a negative error code. 37 */ 38 int snd_hdac_ext_bus_parse_capabilities(struct hdac_ext_bus *ebus) 39 { 40 unsigned int cur_cap; 41 unsigned int offset; 42 struct hdac_bus *bus = &ebus->bus; 43 unsigned int counter = 0; 44 45 offset = snd_hdac_chip_readl(bus, LLCH); 46 47 /* Lets walk the linked capabilities list */ 48 do { 49 cur_cap = _snd_hdac_chip_read(l, bus, offset); 50 51 dev_dbg(bus->dev, "Capability version: 0x%x\n", 52 ((cur_cap & AZX_CAP_HDR_VER_MASK) >> AZX_CAP_HDR_VER_OFF)); 53 54 dev_dbg(bus->dev, "HDA capability ID: 0x%x\n", 55 (cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF); 56 57 switch ((cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF) { 58 case AZX_ML_CAP_ID: 59 dev_dbg(bus->dev, "Found ML capability\n"); 60 ebus->mlcap = bus->remap_addr + offset; 61 break; 62 63 case AZX_GTS_CAP_ID: 64 dev_dbg(bus->dev, "Found GTS capability offset=%x\n", offset); 65 ebus->gtscap = bus->remap_addr + offset; 66 break; 67 68 case AZX_PP_CAP_ID: 69 /* PP capability found, the Audio DSP is present */ 70 dev_dbg(bus->dev, "Found PP capability offset=%x\n", offset); 71 ebus->ppcap = bus->remap_addr + offset; 72 break; 73 74 case AZX_SPB_CAP_ID: 75 /* SPIB capability found, handler function */ 76 dev_dbg(bus->dev, "Found SPB capability\n"); 77 ebus->spbcap = bus->remap_addr + offset; 78 break; 79 80 default: 81 dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap); 82 break; 83 } 84 85 counter++; 86 87 if (counter > HDAC_MAX_CAPS) { 88 dev_err(bus->dev, "We exceeded HDAC Ext capablities!!!\n"); 89 break; 90 } 91 92 /* read the offset of next capabiity */ 93 offset = cur_cap & AZX_CAP_HDR_NXT_PTR_MASK; 94 95 } while (offset); 96 97 return 0; 98 } 99 EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_parse_capabilities); 100 101 /* 102 * processing pipe helpers - these helpers are useful for dealing with HDA 103 * new capability of processing pipelines 104 */ 105 106 /** 107 * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability 108 * @ebus: HD-audio extended core bus 109 * @enable: flag to turn on/off the capability 110 */ 111 void snd_hdac_ext_bus_ppcap_enable(struct hdac_ext_bus *ebus, bool enable) 112 { 113 struct hdac_bus *bus = &ebus->bus; 114 115 if (!ebus->ppcap) { 116 dev_err(bus->dev, "Address of PP capability is NULL"); 117 return; 118 } 119 120 if (enable) 121 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_GPROCEN); 122 else 123 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_GPROCEN, 0); 124 } 125 EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable); 126 127 /** 128 * snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable 129 * @ebus: HD-audio extended core bus 130 * @enable: flag to enable/disable interrupt 131 */ 132 void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_ext_bus *ebus, bool enable) 133 { 134 struct hdac_bus *bus = &ebus->bus; 135 136 if (!ebus->ppcap) { 137 dev_err(bus->dev, "Address of PP capability is NULL\n"); 138 return; 139 } 140 141 if (enable) 142 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_PIE); 143 else 144 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_PIE, 0); 145 } 146 EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable); 147 148 /* 149 * Multilink helpers - these helpers are useful for dealing with HDA 150 * new multilink capability 151 */ 152 153 /** 154 * snd_hdac_ext_bus_get_ml_capabilities - get multilink capability 155 * @ebus: HD-audio extended core bus 156 * 157 * This will parse all links and read the mlink capabilities and add them 158 * in hlink_list of extended hdac bus 159 * Note: this will be freed on bus exit by driver 160 */ 161 int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus) 162 { 163 int idx; 164 u32 link_count; 165 struct hdac_ext_link *hlink; 166 struct hdac_bus *bus = &ebus->bus; 167 168 link_count = readl(ebus->mlcap + AZX_REG_ML_MLCD) + 1; 169 170 dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count); 171 172 for (idx = 0; idx < link_count; idx++) { 173 hlink = kzalloc(sizeof(*hlink), GFP_KERNEL); 174 if (!hlink) 175 return -ENOMEM; 176 hlink->index = idx; 177 hlink->bus = bus; 178 hlink->ml_addr = ebus->mlcap + AZX_ML_BASE + 179 (AZX_ML_INTERVAL * idx); 180 hlink->lcaps = snd_hdac_chip_readl(bus, ML_LCAP); 181 hlink->lsdiid = snd_hdac_chip_readw(bus, ML_LSDIID); 182 183 list_add_tail(&hlink->list, &ebus->hlink_list); 184 } 185 186 return 0; 187 } 188 EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_ml_capabilities); 189 190 /** 191 * snd_hdac_link_free_all- free hdac extended link objects 192 * 193 * @ebus: HD-audio ext core bus 194 */ 195 196 void snd_hdac_link_free_all(struct hdac_ext_bus *ebus) 197 { 198 struct hdac_ext_link *l; 199 200 while (!list_empty(&ebus->hlink_list)) { 201 l = list_first_entry(&ebus->hlink_list, struct hdac_ext_link, list); 202 list_del(&l->list); 203 kfree(l); 204 } 205 } 206 EXPORT_SYMBOL_GPL(snd_hdac_link_free_all); 207 208 /** 209 * snd_hdac_ext_bus_get_link_index - get link based on codec name 210 * @ebus: HD-audio extended core bus 211 * @codec_name: codec name 212 */ 213 struct hdac_ext_link *snd_hdac_ext_bus_get_link(struct hdac_ext_bus *ebus, 214 const char *codec_name) 215 { 216 int i; 217 struct hdac_ext_link *hlink = NULL; 218 int bus_idx, addr; 219 220 if (sscanf(codec_name, "ehdaudio%dD%d", &bus_idx, &addr) != 2) 221 return NULL; 222 if (ebus->idx != bus_idx) 223 return NULL; 224 225 list_for_each_entry(hlink, &ebus->hlink_list, list) { 226 for (i = 0; i < HDA_MAX_CODECS; i++) { 227 if (hlink->lsdiid & (0x1 << addr)) 228 return hlink; 229 } 230 } 231 232 return NULL; 233 } 234 EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_link); 235 236 static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable) 237 { 238 int timeout; 239 u32 val; 240 int mask = (1 << AZX_MLCTL_CPA); 241 242 udelay(3); 243 timeout = 50; 244 245 do { 246 val = snd_hdac_chip_readl(link->bus, ML_LCTL); 247 if (enable) { 248 if (((val & mask) >> AZX_MLCTL_CPA)) 249 return 0; 250 } else { 251 if (!((val & mask) >> AZX_MLCTL_CPA)) 252 return 0; 253 } 254 udelay(3); 255 } while (--timeout); 256 257 return -EIO; 258 } 259 260 /** 261 * snd_hdac_ext_bus_link_power_up -power up hda link 262 * @link: HD-audio extended link 263 */ 264 int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link) 265 { 266 snd_hdac_chip_updatel(link->bus, ML_LCTL, 0, AZX_MLCTL_SPA); 267 268 return check_hdac_link_power_active(link, true); 269 } 270 EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up); 271 272 /** 273 * snd_hdac_ext_bus_link_power_down -power down hda link 274 * @link: HD-audio extended link 275 */ 276 int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link) 277 { 278 snd_hdac_chip_updatel(link->bus, ML_LCTL, AZX_MLCTL_SPA, 0); 279 280 return check_hdac_link_power_active(link, false); 281 } 282 EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down); 283