1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * motu-protocol-v2.c - a part of driver for MOTU FireWire series
4  *
5  * Copyright (c) 2015-2017 Takashi Sakamoto <o-takashi@sakamocchi.jp>
6  */
7 
8 #include "motu.h"
9 
10 #define V2_CLOCK_STATUS_OFFSET			0x0b14
11 #define  V2_CLOCK_RATE_MASK			0x00000038
12 #define  V2_CLOCK_RATE_SHIFT			3
13 #define  V2_CLOCK_SRC_MASK			0x00000007
14 #define  V2_CLOCK_SRC_SHIFT			0
15 #define  V2_CLOCK_FETCH_ENABLE			0x02000000
16 #define  V2_CLOCK_MODEL_SPECIFIC		0x04000000
17 
18 #define V2_IN_OUT_CONF_OFFSET			0x0c04
19 #define  V2_OPT_OUT_IFACE_MASK			0x00000c00
20 #define  V2_OPT_OUT_IFACE_SHIFT			10
21 #define  V2_OPT_IN_IFACE_MASK			0x00000300
22 #define  V2_OPT_IN_IFACE_SHIFT			8
23 #define  V2_OPT_IFACE_MODE_NONE			0
24 #define  V2_OPT_IFACE_MODE_ADAT			1
25 #define  V2_OPT_IFACE_MODE_SPDIF		2
26 
27 static int get_clock_rate(u32 data, unsigned int *rate)
28 {
29 	unsigned int index = (data & V2_CLOCK_RATE_MASK) >> V2_CLOCK_RATE_SHIFT;
30 	if (index >= ARRAY_SIZE(snd_motu_clock_rates))
31 		return -EIO;
32 
33 	*rate = snd_motu_clock_rates[index];
34 
35 	return 0;
36 }
37 
38 int snd_motu_protocol_v2_get_clock_rate(struct snd_motu *motu,
39 					unsigned int *rate)
40 {
41 	__be32 reg;
42 	int err;
43 
44 	err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
45 					sizeof(reg));
46 	if (err < 0)
47 		return err;
48 
49 	return get_clock_rate(be32_to_cpu(reg), rate);
50 }
51 
52 int snd_motu_protocol_v2_set_clock_rate(struct snd_motu *motu,
53 					unsigned int rate)
54 {
55 	__be32 reg;
56 	u32 data;
57 	int i;
58 	int err;
59 
60 	for (i = 0; i < ARRAY_SIZE(snd_motu_clock_rates); ++i) {
61 		if (snd_motu_clock_rates[i] == rate)
62 			break;
63 	}
64 	if (i == ARRAY_SIZE(snd_motu_clock_rates))
65 		return -EINVAL;
66 
67 	err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
68 					sizeof(reg));
69 	if (err < 0)
70 		return err;
71 	data = be32_to_cpu(reg);
72 
73 	data &= ~V2_CLOCK_RATE_MASK;
74 	data |= i << V2_CLOCK_RATE_SHIFT;
75 
76 	reg = cpu_to_be32(data);
77 	return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET, &reg,
78 					  sizeof(reg));
79 }
80 
81 static int get_clock_source(struct snd_motu *motu, u32 data,
82 			    enum snd_motu_clock_source *src)
83 {
84 	unsigned int index = data & V2_CLOCK_SRC_MASK;
85 	if (index > 5)
86 		return -EIO;
87 
88 	switch (index) {
89 	case 0:
90 		*src = SND_MOTU_CLOCK_SOURCE_INTERNAL;
91 		break;
92 	case 1:
93 	{
94 		__be32 reg;
95 
96 		// To check the configuration of optical interface.
97 		int err = snd_motu_transaction_read(motu, V2_IN_OUT_CONF_OFFSET,
98 						    &reg, sizeof(reg));
99 		if (err < 0)
100 			return err;
101 
102 		if (be32_to_cpu(reg) & 0x00000200)
103 			*src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT;
104 		else
105 			*src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT;
106 		break;
107 	}
108 	case 2:
109 		*src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX;
110 		break;
111 	case 3:
112 		*src = SND_MOTU_CLOCK_SOURCE_SPH;
113 		break;
114 	case 4:
115 		*src = SND_MOTU_CLOCK_SOURCE_WORD_ON_BNC;
116 		break;
117 	case 5:
118 		*src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_DSUB;
119 		break;
120 	default:
121 		return -EIO;
122 	}
123 
124 	return 0;
125 }
126 
127 int snd_motu_protocol_v2_get_clock_source(struct snd_motu *motu,
128 					  enum snd_motu_clock_source *src)
129 {
130 	__be32 reg;
131 	int err;
132 
133 	err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
134 					sizeof(reg));
135 	if (err < 0)
136 		return err;
137 
138 	return get_clock_source(motu, be32_to_cpu(reg), src);
139 }
140 
141 int snd_motu_protocol_v2_switch_fetching_mode(struct snd_motu *motu,
142 					      bool enable)
143 {
144 	enum snd_motu_clock_source src;
145 	__be32 reg;
146 	u32 data;
147 	int err = 0;
148 
149 	// 828mkII implements Altera ACEX 1K EP1K30. Nothing to do.
150 	if (motu->spec == &snd_motu_spec_828mk2)
151 		return 0;
152 
153 	err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
154 					sizeof(reg));
155 	if (err < 0)
156 		return err;
157 	data = be32_to_cpu(reg);
158 
159 	err = get_clock_source(motu, data, &src);
160 	if (err < 0)
161 		return err;
162 
163 	data &= ~(V2_CLOCK_FETCH_ENABLE | V2_CLOCK_MODEL_SPECIFIC);
164 	if (enable)
165 		data |= V2_CLOCK_FETCH_ENABLE;
166 
167 	if (motu->spec == &snd_motu_spec_traveler) {
168 		// Expected for Traveler and 896HD, which implements Altera
169 		// Cyclone EP1C3.
170 		data |= V2_CLOCK_MODEL_SPECIFIC;
171 	} else {
172 		// For UltraLite and 8pre, which implements Xilinx Spartan
173 		// XC3S200.
174 		unsigned int rate;
175 
176 		err = get_clock_rate(data, &rate);
177 		if (err < 0)
178 			return err;
179 
180 		if (src == SND_MOTU_CLOCK_SOURCE_SPH && rate > 48000)
181 			data |= V2_CLOCK_MODEL_SPECIFIC;
182 	}
183 
184 	reg = cpu_to_be32(data);
185 	return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET, &reg,
186 					  sizeof(reg));
187 }
188 
189 static int detect_packet_formats_828mk2(struct snd_motu *motu, u32 data)
190 {
191 	if (((data & V2_OPT_IN_IFACE_MASK) >> V2_OPT_IN_IFACE_SHIFT) ==
192 	    V2_OPT_IFACE_MODE_ADAT) {
193 		motu->tx_packet_formats.pcm_chunks[0] += 8;
194 		motu->tx_packet_formats.pcm_chunks[1] += 4;
195 	}
196 
197 	if (((data & V2_OPT_OUT_IFACE_MASK) >> V2_OPT_OUT_IFACE_SHIFT) ==
198 	    V2_OPT_IFACE_MODE_ADAT) {
199 		motu->rx_packet_formats.pcm_chunks[0] += 8;
200 		motu->rx_packet_formats.pcm_chunks[1] += 4;
201 	}
202 
203 	return 0;
204 }
205 
206 static int detect_packet_formats_traveler(struct snd_motu *motu, u32 data)
207 {
208 	if (((data & V2_OPT_IN_IFACE_MASK) >> V2_OPT_IN_IFACE_SHIFT) ==
209 	    V2_OPT_IFACE_MODE_ADAT) {
210 		motu->tx_packet_formats.pcm_chunks[0] += 8;
211 		motu->tx_packet_formats.pcm_chunks[1] += 4;
212 	}
213 
214 	if (((data & V2_OPT_OUT_IFACE_MASK) >> V2_OPT_OUT_IFACE_SHIFT) ==
215 	    V2_OPT_IFACE_MODE_ADAT) {
216 		motu->rx_packet_formats.pcm_chunks[0] += 8;
217 		motu->rx_packet_formats.pcm_chunks[1] += 4;
218 	}
219 
220 	return 0;
221 }
222 
223 static int detect_packet_formats_8pre(struct snd_motu *motu, u32 data)
224 {
225 	if (((data & V2_OPT_IN_IFACE_MASK) >> V2_OPT_IN_IFACE_SHIFT) ==
226 	    V2_OPT_IFACE_MODE_ADAT) {
227 		motu->tx_packet_formats.pcm_chunks[0] += 8;
228 		motu->tx_packet_formats.pcm_chunks[1] += 8;
229 	}
230 
231 	if (((data & V2_OPT_OUT_IFACE_MASK) >> V2_OPT_OUT_IFACE_SHIFT) ==
232 	    V2_OPT_IFACE_MODE_ADAT) {
233 		motu->rx_packet_formats.pcm_chunks[0] += 8;
234 		motu->rx_packet_formats.pcm_chunks[1] += 8;
235 	}
236 
237 	return 0;
238 }
239 
240 int snd_motu_protocol_v2_cache_packet_formats(struct snd_motu *motu)
241 {
242 	__be32 reg;
243 	u32 data;
244 	int err;
245 
246 	motu->tx_packet_formats.pcm_byte_offset = 10;
247 	motu->rx_packet_formats.pcm_byte_offset = 10;
248 
249 	motu->tx_packet_formats.msg_chunks = 2;
250 	motu->rx_packet_formats.msg_chunks = 2;
251 
252 	err = snd_motu_transaction_read(motu, V2_IN_OUT_CONF_OFFSET, &reg,
253 					sizeof(reg));
254 	if (err < 0)
255 		return err;
256 	data = be32_to_cpu(reg);
257 
258 	memcpy(motu->tx_packet_formats.pcm_chunks,
259 	       motu->spec->tx_fixed_pcm_chunks,
260 	       sizeof(motu->tx_packet_formats.pcm_chunks));
261 	memcpy(motu->rx_packet_formats.pcm_chunks,
262 	       motu->spec->rx_fixed_pcm_chunks,
263 	       sizeof(motu->rx_packet_formats.pcm_chunks));
264 
265 	if (motu->spec == &snd_motu_spec_828mk2)
266 		return detect_packet_formats_828mk2(motu, data);
267 	else if (motu->spec == &snd_motu_spec_traveler)
268 		return detect_packet_formats_traveler(motu, data);
269 	else if (motu->spec == &snd_motu_spec_8pre)
270 		return detect_packet_formats_8pre(motu, data);
271 	else
272 		return 0;
273 }
274 
275 const struct snd_motu_spec snd_motu_spec_828mk2 = {
276 	.name = "828mk2",
277 	.protocol_version = SND_MOTU_PROTOCOL_V2,
278 	.flags = SND_MOTU_SPEC_RX_MIDI_2ND_Q |
279 		 SND_MOTU_SPEC_TX_MIDI_2ND_Q,
280 	.tx_fixed_pcm_chunks = {14, 14, 0},
281 	.rx_fixed_pcm_chunks = {14, 14, 0},
282 };
283 
284 const struct snd_motu_spec snd_motu_spec_traveler = {
285 	.name = "Traveler",
286 	.protocol_version = SND_MOTU_PROTOCOL_V2,
287 	.flags = SND_MOTU_SPEC_RX_MIDI_2ND_Q |
288 		 SND_MOTU_SPEC_TX_MIDI_2ND_Q,
289 	.tx_fixed_pcm_chunks = {14, 14, 8},
290 	.rx_fixed_pcm_chunks = {14, 14, 8},
291 };
292 
293 const struct snd_motu_spec snd_motu_spec_ultralite = {
294 	.name = "UltraLite",
295 	.protocol_version = SND_MOTU_PROTOCOL_V2,
296 	.flags = SND_MOTU_SPEC_RX_MIDI_2ND_Q |
297 		 SND_MOTU_SPEC_TX_MIDI_2ND_Q,
298 	.tx_fixed_pcm_chunks = {14, 14, 0},
299 	.rx_fixed_pcm_chunks = {14, 14, 0},
300 };
301 
302 const struct snd_motu_spec snd_motu_spec_8pre = {
303 	.name = "8pre",
304 	.protocol_version = SND_MOTU_PROTOCOL_V2,
305 	.flags = SND_MOTU_SPEC_RX_MIDI_2ND_Q |
306 		 SND_MOTU_SPEC_TX_MIDI_2ND_Q,
307 	.tx_fixed_pcm_chunks = {10, 6, 0},
308 	.rx_fixed_pcm_chunks = {10, 6, 0},
309 };
310