1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * motu-protocol-v2.c - a part of driver for MOTU FireWire series 4 * 5 * Copyright (c) 2015-2017 Takashi Sakamoto <o-takashi@sakamocchi.jp> 6 */ 7 8 #include "motu.h" 9 10 #define V2_CLOCK_STATUS_OFFSET 0x0b14 11 #define V2_CLOCK_RATE_MASK 0x00000038 12 #define V2_CLOCK_RATE_SHIFT 3 13 #define V2_CLOCK_SRC_MASK 0x00000007 14 #define V2_CLOCK_SRC_SHIFT 0 15 #define V2_CLOCK_FETCH_ENABLE 0x02000000 16 #define V2_CLOCK_MODEL_SPECIFIC 0x04000000 17 18 #define V2_IN_OUT_CONF_OFFSET 0x0c04 19 #define V2_OPT_OUT_IFACE_MASK 0x00000c00 20 #define V2_OPT_OUT_IFACE_SHIFT 10 21 #define V2_OPT_IN_IFACE_MASK 0x00000300 22 #define V2_OPT_IN_IFACE_SHIFT 8 23 #define V2_OPT_IFACE_MODE_NONE 0 24 #define V2_OPT_IFACE_MODE_ADAT 1 25 #define V2_OPT_IFACE_MODE_SPDIF 2 26 27 static int get_clock_rate(u32 data, unsigned int *rate) 28 { 29 unsigned int index = (data & V2_CLOCK_RATE_MASK) >> V2_CLOCK_RATE_SHIFT; 30 if (index >= ARRAY_SIZE(snd_motu_clock_rates)) 31 return -EIO; 32 33 *rate = snd_motu_clock_rates[index]; 34 35 return 0; 36 } 37 38 int snd_motu_protocol_v2_get_clock_rate(struct snd_motu *motu, 39 unsigned int *rate) 40 { 41 __be32 reg; 42 int err; 43 44 err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, ®, 45 sizeof(reg)); 46 if (err < 0) 47 return err; 48 49 return get_clock_rate(be32_to_cpu(reg), rate); 50 } 51 52 int snd_motu_protocol_v2_set_clock_rate(struct snd_motu *motu, 53 unsigned int rate) 54 { 55 __be32 reg; 56 u32 data; 57 int i; 58 int err; 59 60 for (i = 0; i < ARRAY_SIZE(snd_motu_clock_rates); ++i) { 61 if (snd_motu_clock_rates[i] == rate) 62 break; 63 } 64 if (i == ARRAY_SIZE(snd_motu_clock_rates)) 65 return -EINVAL; 66 67 err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, ®, 68 sizeof(reg)); 69 if (err < 0) 70 return err; 71 data = be32_to_cpu(reg); 72 73 data &= ~V2_CLOCK_RATE_MASK; 74 data |= i << V2_CLOCK_RATE_SHIFT; 75 76 reg = cpu_to_be32(data); 77 return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET, ®, 78 sizeof(reg)); 79 } 80 81 static int get_clock_source(struct snd_motu *motu, u32 data, 82 enum snd_motu_clock_source *src) 83 { 84 switch (data & V2_CLOCK_SRC_MASK) { 85 case 0: 86 *src = SND_MOTU_CLOCK_SOURCE_INTERNAL; 87 break; 88 case 1: 89 *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT; 90 break; 91 case 2: 92 { 93 bool support_iec60958_on_opt = (motu->spec == &snd_motu_spec_828mk2 || 94 motu->spec == &snd_motu_spec_traveler); 95 96 if (!support_iec60958_on_opt) { 97 *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX; 98 } else { 99 __be32 reg; 100 101 // To check the configuration of optical interface. 102 int err = snd_motu_transaction_read(motu, V2_IN_OUT_CONF_OFFSET, ®, 103 sizeof(reg)); 104 if (err < 0) 105 return err; 106 107 if (((data & V2_OPT_IN_IFACE_MASK) >> V2_OPT_IN_IFACE_SHIFT) == 108 V2_OPT_IFACE_MODE_SPDIF) 109 *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT; 110 else 111 *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX; 112 } 113 break; 114 } 115 case 3: 116 *src = SND_MOTU_CLOCK_SOURCE_SPH; 117 break; 118 case 4: 119 *src = SND_MOTU_CLOCK_SOURCE_WORD_ON_BNC; 120 break; 121 case 5: 122 *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_DSUB; 123 break; 124 default: 125 *src = SND_MOTU_CLOCK_SOURCE_UNKNOWN; 126 break; 127 } 128 129 return 0; 130 } 131 132 int snd_motu_protocol_v2_get_clock_source(struct snd_motu *motu, 133 enum snd_motu_clock_source *src) 134 { 135 __be32 reg; 136 int err; 137 138 err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, ®, 139 sizeof(reg)); 140 if (err < 0) 141 return err; 142 143 return get_clock_source(motu, be32_to_cpu(reg), src); 144 } 145 146 // Expected for Traveler and 896HD, which implements Altera Cyclone EP1C3. 147 static int switch_fetching_mode_cyclone(struct snd_motu *motu, u32 *data, 148 bool enable) 149 { 150 *data |= V2_CLOCK_MODEL_SPECIFIC; 151 152 return 0; 153 } 154 155 // For UltraLite and 8pre, which implements Xilinx Spartan XC3S200. 156 static int switch_fetching_mode_spartan(struct snd_motu *motu, u32 *data, 157 bool enable) 158 { 159 unsigned int rate; 160 enum snd_motu_clock_source src; 161 int err; 162 163 err = get_clock_source(motu, *data, &src); 164 if (err < 0) 165 return err; 166 167 err = get_clock_rate(*data, &rate); 168 if (err < 0) 169 return err; 170 171 if (src == SND_MOTU_CLOCK_SOURCE_SPH && rate > 48000) 172 *data |= V2_CLOCK_MODEL_SPECIFIC; 173 174 return 0; 175 } 176 177 int snd_motu_protocol_v2_switch_fetching_mode(struct snd_motu *motu, 178 bool enable) 179 { 180 if (motu->spec == &snd_motu_spec_828mk2) { 181 // 828mkII implements Altera ACEX 1K EP1K30. Nothing to do. 182 return 0; 183 } else { 184 __be32 reg; 185 u32 data; 186 int err; 187 188 err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, 189 ®, sizeof(reg)); 190 if (err < 0) 191 return err; 192 data = be32_to_cpu(reg); 193 194 data &= ~(V2_CLOCK_FETCH_ENABLE | V2_CLOCK_MODEL_SPECIFIC); 195 if (enable) 196 data |= V2_CLOCK_FETCH_ENABLE; 197 198 if (motu->spec == &snd_motu_spec_traveler) 199 err = switch_fetching_mode_cyclone(motu, &data, enable); 200 else 201 err = switch_fetching_mode_spartan(motu, &data, enable); 202 if (err < 0) 203 return err; 204 205 reg = cpu_to_be32(data); 206 return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET, 207 ®, sizeof(reg)); 208 } 209 } 210 211 static int detect_packet_formats_828mk2(struct snd_motu *motu, u32 data) 212 { 213 if (((data & V2_OPT_IN_IFACE_MASK) >> V2_OPT_IN_IFACE_SHIFT) == 214 V2_OPT_IFACE_MODE_ADAT) { 215 motu->tx_packet_formats.pcm_chunks[0] += 8; 216 motu->tx_packet_formats.pcm_chunks[1] += 4; 217 } 218 219 if (((data & V2_OPT_OUT_IFACE_MASK) >> V2_OPT_OUT_IFACE_SHIFT) == 220 V2_OPT_IFACE_MODE_ADAT) { 221 motu->rx_packet_formats.pcm_chunks[0] += 8; 222 motu->rx_packet_formats.pcm_chunks[1] += 4; 223 } 224 225 return 0; 226 } 227 228 static int detect_packet_formats_traveler(struct snd_motu *motu, u32 data) 229 { 230 if (((data & V2_OPT_IN_IFACE_MASK) >> V2_OPT_IN_IFACE_SHIFT) == 231 V2_OPT_IFACE_MODE_ADAT) { 232 motu->tx_packet_formats.pcm_chunks[0] += 8; 233 motu->tx_packet_formats.pcm_chunks[1] += 4; 234 } 235 236 if (((data & V2_OPT_OUT_IFACE_MASK) >> V2_OPT_OUT_IFACE_SHIFT) == 237 V2_OPT_IFACE_MODE_ADAT) { 238 motu->rx_packet_formats.pcm_chunks[0] += 8; 239 motu->rx_packet_formats.pcm_chunks[1] += 4; 240 } 241 242 return 0; 243 } 244 245 static int detect_packet_formats_8pre(struct snd_motu *motu, u32 data) 246 { 247 if (((data & V2_OPT_IN_IFACE_MASK) >> V2_OPT_IN_IFACE_SHIFT) == 248 V2_OPT_IFACE_MODE_ADAT) { 249 motu->tx_packet_formats.pcm_chunks[0] += 8; 250 motu->tx_packet_formats.pcm_chunks[1] += 8; 251 } 252 253 if (((data & V2_OPT_OUT_IFACE_MASK) >> V2_OPT_OUT_IFACE_SHIFT) == 254 V2_OPT_IFACE_MODE_ADAT) { 255 motu->rx_packet_formats.pcm_chunks[0] += 8; 256 motu->rx_packet_formats.pcm_chunks[1] += 8; 257 } 258 259 return 0; 260 } 261 262 int snd_motu_protocol_v2_cache_packet_formats(struct snd_motu *motu) 263 { 264 __be32 reg; 265 u32 data; 266 int err; 267 268 motu->tx_packet_formats.pcm_byte_offset = 10; 269 motu->rx_packet_formats.pcm_byte_offset = 10; 270 271 motu->tx_packet_formats.msg_chunks = 2; 272 motu->rx_packet_formats.msg_chunks = 2; 273 274 err = snd_motu_transaction_read(motu, V2_IN_OUT_CONF_OFFSET, ®, 275 sizeof(reg)); 276 if (err < 0) 277 return err; 278 data = be32_to_cpu(reg); 279 280 memcpy(motu->tx_packet_formats.pcm_chunks, 281 motu->spec->tx_fixed_pcm_chunks, 282 sizeof(motu->tx_packet_formats.pcm_chunks)); 283 memcpy(motu->rx_packet_formats.pcm_chunks, 284 motu->spec->rx_fixed_pcm_chunks, 285 sizeof(motu->rx_packet_formats.pcm_chunks)); 286 287 if (motu->spec == &snd_motu_spec_828mk2) 288 return detect_packet_formats_828mk2(motu, data); 289 else if (motu->spec == &snd_motu_spec_traveler) 290 return detect_packet_formats_traveler(motu, data); 291 else if (motu->spec == &snd_motu_spec_8pre) 292 return detect_packet_formats_8pre(motu, data); 293 else 294 return 0; 295 } 296 297 const struct snd_motu_spec snd_motu_spec_828mk2 = { 298 .name = "828mk2", 299 .protocol_version = SND_MOTU_PROTOCOL_V2, 300 .flags = SND_MOTU_SPEC_RX_MIDI_2ND_Q | 301 SND_MOTU_SPEC_TX_MIDI_2ND_Q, 302 .tx_fixed_pcm_chunks = {14, 14, 0}, 303 .rx_fixed_pcm_chunks = {14, 14, 0}, 304 }; 305 306 const struct snd_motu_spec snd_motu_spec_traveler = { 307 .name = "Traveler", 308 .protocol_version = SND_MOTU_PROTOCOL_V2, 309 .flags = SND_MOTU_SPEC_RX_MIDI_2ND_Q | 310 SND_MOTU_SPEC_TX_MIDI_2ND_Q, 311 .tx_fixed_pcm_chunks = {14, 14, 8}, 312 .rx_fixed_pcm_chunks = {14, 14, 8}, 313 }; 314 315 const struct snd_motu_spec snd_motu_spec_ultralite = { 316 .name = "UltraLite", 317 .protocol_version = SND_MOTU_PROTOCOL_V2, 318 .flags = SND_MOTU_SPEC_RX_MIDI_2ND_Q | 319 SND_MOTU_SPEC_TX_MIDI_2ND_Q, 320 .tx_fixed_pcm_chunks = {14, 14, 0}, 321 .rx_fixed_pcm_chunks = {14, 14, 0}, 322 }; 323 324 const struct snd_motu_spec snd_motu_spec_8pre = { 325 .name = "8pre", 326 .protocol_version = SND_MOTU_PROTOCOL_V2, 327 .flags = SND_MOTU_SPEC_RX_MIDI_2ND_Q | 328 SND_MOTU_SPEC_TX_MIDI_2ND_Q, 329 // Two dummy chunks always in the end of data block. 330 .tx_fixed_pcm_chunks = {10, 10, 0}, 331 .rx_fixed_pcm_chunks = {6, 6, 0}, 332 }; 333