1 /* 2 * Functions for accessing OPL4 devices 3 * Copyright (c) 2003 by Clemens Ladisch <clemens@ladisch.de> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 */ 19 20 #include "opl4_local.h" 21 #include <sound/initval.h> 22 #include <linux/ioport.h> 23 #include <linux/slab.h> 24 #include <linux/init.h> 25 #include <linux/module.h> 26 #include <linux/io.h> 27 28 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); 29 MODULE_DESCRIPTION("OPL4 driver"); 30 MODULE_LICENSE("GPL"); 31 32 static inline void snd_opl4_wait(struct snd_opl4 *opl4) 33 { 34 int timeout = 10; 35 while ((inb(opl4->fm_port) & OPL4_STATUS_BUSY) && --timeout > 0) 36 ; 37 } 38 39 void snd_opl4_write(struct snd_opl4 *opl4, u8 reg, u8 value) 40 { 41 snd_opl4_wait(opl4); 42 outb(reg, opl4->pcm_port); 43 44 snd_opl4_wait(opl4); 45 outb(value, opl4->pcm_port + 1); 46 } 47 48 EXPORT_SYMBOL(snd_opl4_write); 49 50 u8 snd_opl4_read(struct snd_opl4 *opl4, u8 reg) 51 { 52 snd_opl4_wait(opl4); 53 outb(reg, opl4->pcm_port); 54 55 snd_opl4_wait(opl4); 56 return inb(opl4->pcm_port + 1); 57 } 58 59 EXPORT_SYMBOL(snd_opl4_read); 60 61 void snd_opl4_read_memory(struct snd_opl4 *opl4, char *buf, int offset, int size) 62 { 63 unsigned long flags; 64 u8 memcfg; 65 66 spin_lock_irqsave(&opl4->reg_lock, flags); 67 68 memcfg = snd_opl4_read(opl4, OPL4_REG_MEMORY_CONFIGURATION); 69 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg | OPL4_MODE_BIT); 70 71 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_HIGH, offset >> 16); 72 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_MID, offset >> 8); 73 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_LOW, offset); 74 75 snd_opl4_wait(opl4); 76 outb(OPL4_REG_MEMORY_DATA, opl4->pcm_port); 77 snd_opl4_wait(opl4); 78 insb(opl4->pcm_port + 1, buf, size); 79 80 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg); 81 82 spin_unlock_irqrestore(&opl4->reg_lock, flags); 83 } 84 85 EXPORT_SYMBOL(snd_opl4_read_memory); 86 87 void snd_opl4_write_memory(struct snd_opl4 *opl4, const char *buf, int offset, int size) 88 { 89 unsigned long flags; 90 u8 memcfg; 91 92 spin_lock_irqsave(&opl4->reg_lock, flags); 93 94 memcfg = snd_opl4_read(opl4, OPL4_REG_MEMORY_CONFIGURATION); 95 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg | OPL4_MODE_BIT); 96 97 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_HIGH, offset >> 16); 98 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_MID, offset >> 8); 99 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_LOW, offset); 100 101 snd_opl4_wait(opl4); 102 outb(OPL4_REG_MEMORY_DATA, opl4->pcm_port); 103 snd_opl4_wait(opl4); 104 outsb(opl4->pcm_port + 1, buf, size); 105 106 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg); 107 108 spin_unlock_irqrestore(&opl4->reg_lock, flags); 109 } 110 111 EXPORT_SYMBOL(snd_opl4_write_memory); 112 113 static void snd_opl4_enable_opl4(struct snd_opl4 *opl4) 114 { 115 outb(OPL3_REG_MODE, opl4->fm_port + 2); 116 inb(opl4->fm_port); 117 inb(opl4->fm_port); 118 outb(OPL3_OPL3_ENABLE | OPL3_OPL4_ENABLE, opl4->fm_port + 3); 119 inb(opl4->fm_port); 120 inb(opl4->fm_port); 121 } 122 123 static int snd_opl4_detect(struct snd_opl4 *opl4) 124 { 125 u8 id1, id2; 126 127 snd_opl4_enable_opl4(opl4); 128 129 id1 = snd_opl4_read(opl4, OPL4_REG_MEMORY_CONFIGURATION); 130 snd_printdd("OPL4[02]=%02x\n", id1); 131 switch (id1 & OPL4_DEVICE_ID_MASK) { 132 case 0x20: 133 opl4->hardware = OPL3_HW_OPL4; 134 break; 135 case 0x40: 136 opl4->hardware = OPL3_HW_OPL4_ML; 137 break; 138 default: 139 return -ENODEV; 140 } 141 142 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_FM, 0x00); 143 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_PCM, 0xff); 144 id1 = snd_opl4_read(opl4, OPL4_REG_MIX_CONTROL_FM); 145 id2 = snd_opl4_read(opl4, OPL4_REG_MIX_CONTROL_PCM); 146 snd_printdd("OPL4 id1=%02x id2=%02x\n", id1, id2); 147 if (id1 != 0x00 || id2 != 0xff) 148 return -ENODEV; 149 150 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_FM, 0x3f); 151 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_PCM, 0x3f); 152 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, 0x00); 153 return 0; 154 } 155 156 #if IS_ENABLED(CONFIG_SND_SEQUENCER) 157 static void snd_opl4_seq_dev_free(struct snd_seq_device *seq_dev) 158 { 159 struct snd_opl4 *opl4 = seq_dev->private_data; 160 opl4->seq_dev = NULL; 161 } 162 163 static int snd_opl4_create_seq_dev(struct snd_opl4 *opl4, int seq_device) 164 { 165 opl4->seq_dev_num = seq_device; 166 if (snd_seq_device_new(opl4->card, seq_device, SNDRV_SEQ_DEV_ID_OPL4, 167 sizeof(struct snd_opl4 *), &opl4->seq_dev) >= 0) { 168 strcpy(opl4->seq_dev->name, "OPL4 Wavetable"); 169 *(struct snd_opl4 **)SNDRV_SEQ_DEVICE_ARGPTR(opl4->seq_dev) = opl4; 170 opl4->seq_dev->private_data = opl4; 171 opl4->seq_dev->private_free = snd_opl4_seq_dev_free; 172 } 173 return 0; 174 } 175 #endif 176 177 static void snd_opl4_free(struct snd_opl4 *opl4) 178 { 179 snd_opl4_free_proc(opl4); 180 release_and_free_resource(opl4->res_fm_port); 181 release_and_free_resource(opl4->res_pcm_port); 182 kfree(opl4); 183 } 184 185 static int snd_opl4_dev_free(struct snd_device *device) 186 { 187 struct snd_opl4 *opl4 = device->device_data; 188 snd_opl4_free(opl4); 189 return 0; 190 } 191 192 int snd_opl4_create(struct snd_card *card, 193 unsigned long fm_port, unsigned long pcm_port, 194 int seq_device, 195 struct snd_opl3 **ropl3, struct snd_opl4 **ropl4) 196 { 197 struct snd_opl4 *opl4; 198 struct snd_opl3 *opl3; 199 int err; 200 static struct snd_device_ops ops = { 201 .dev_free = snd_opl4_dev_free 202 }; 203 204 if (ropl3) 205 *ropl3 = NULL; 206 if (ropl4) 207 *ropl4 = NULL; 208 209 opl4 = kzalloc(sizeof(*opl4), GFP_KERNEL); 210 if (!opl4) 211 return -ENOMEM; 212 213 opl4->res_fm_port = request_region(fm_port, 8, "OPL4 FM"); 214 opl4->res_pcm_port = request_region(pcm_port, 8, "OPL4 PCM/MIX"); 215 if (!opl4->res_fm_port || !opl4->res_pcm_port) { 216 snd_printk(KERN_ERR "opl4: can't grab ports 0x%lx, 0x%lx\n", fm_port, pcm_port); 217 snd_opl4_free(opl4); 218 return -EBUSY; 219 } 220 221 opl4->card = card; 222 opl4->fm_port = fm_port; 223 opl4->pcm_port = pcm_port; 224 spin_lock_init(&opl4->reg_lock); 225 mutex_init(&opl4->access_mutex); 226 227 err = snd_opl4_detect(opl4); 228 if (err < 0) { 229 snd_opl4_free(opl4); 230 snd_printd("OPL4 chip not detected at %#lx/%#lx\n", fm_port, pcm_port); 231 return err; 232 } 233 234 err = snd_device_new(card, SNDRV_DEV_CODEC, opl4, &ops); 235 if (err < 0) { 236 snd_opl4_free(opl4); 237 return err; 238 } 239 240 err = snd_opl3_create(card, fm_port, fm_port + 2, opl4->hardware, 1, &opl3); 241 if (err < 0) { 242 snd_device_free(card, opl4); 243 return err; 244 } 245 246 /* opl3 initialization disabled opl4, so reenable */ 247 snd_opl4_enable_opl4(opl4); 248 249 snd_opl4_create_mixer(opl4); 250 snd_opl4_create_proc(opl4); 251 252 #if IS_ENABLED(CONFIG_SND_SEQUENCER) 253 opl4->seq_client = -1; 254 if (opl4->hardware < OPL3_HW_OPL4_ML) 255 snd_opl4_create_seq_dev(opl4, seq_device); 256 #endif 257 258 if (ropl3) 259 *ropl3 = opl3; 260 if (ropl4) 261 *ropl4 = opl4; 262 return 0; 263 } 264 265 EXPORT_SYMBOL(snd_opl4_create); 266 267 static int __init alsa_opl4_init(void) 268 { 269 return 0; 270 } 271 272 static void __exit alsa_opl4_exit(void) 273 { 274 } 275 276 module_init(alsa_opl4_init) 277 module_exit(alsa_opl4_exit) 278