199192af0SSean MacLennan/*
299192af0SSean MacLennan * Device Tree Source for PIKA Warp
399192af0SSean MacLennan *
499192af0SSean MacLennan * Copyright (c) 2008 PIKA Technologies
599192af0SSean MacLennan *   Sean MacLennan <smaclennan@pikatech.com>
699192af0SSean MacLennan *
799192af0SSean MacLennan * This file is licensed under the terms of the GNU General Public
899192af0SSean MacLennan * License version 2.  This program is licensed "as is" without
999192af0SSean MacLennan * any warranty of any kind, whether express or implied.
1099192af0SSean MacLennan */
1199192af0SSean MacLennan
1299192af0SSean MacLennan/ {
1399192af0SSean MacLennan	#address-cells = <2>;
1499192af0SSean MacLennan	#size-cells = <1>;
1599192af0SSean MacLennan	model = "pika,warp";
1699192af0SSean MacLennan	compatible = "pika,warp";
1799192af0SSean MacLennan	dcr-parent = <&/cpus/cpu@0>;
1899192af0SSean MacLennan
1999192af0SSean MacLennan	aliases {
2099192af0SSean MacLennan		ethernet0 = &EMAC0;
2199192af0SSean MacLennan		serial0 = &UART0;
2299192af0SSean MacLennan	};
2399192af0SSean MacLennan
2499192af0SSean MacLennan	cpus {
2599192af0SSean MacLennan		#address-cells = <1>;
2699192af0SSean MacLennan		#size-cells = <0>;
2799192af0SSean MacLennan
2899192af0SSean MacLennan		cpu@0 {
2999192af0SSean MacLennan			device_type = "cpu";
3099192af0SSean MacLennan			model = "PowerPC,440EP";
3199192af0SSean MacLennan			reg = <0>;
3299192af0SSean MacLennan			clock-frequency = <0>; /* Filled in by zImage */
3399192af0SSean MacLennan			timebase-frequency = <0>; /* Filled in by zImage */
3499192af0SSean MacLennan			i-cache-line-size = <20>;
3599192af0SSean MacLennan			d-cache-line-size = <20>;
3699192af0SSean MacLennan			i-cache-size = <8000>;
3799192af0SSean MacLennan			d-cache-size = <8000>;
3899192af0SSean MacLennan			dcr-controller;
3999192af0SSean MacLennan			dcr-access-method = "native";
4099192af0SSean MacLennan		};
4199192af0SSean MacLennan	};
4299192af0SSean MacLennan
4399192af0SSean MacLennan	memory {
4499192af0SSean MacLennan		device_type = "memory";
4599192af0SSean MacLennan		reg = <0 0 0>; /* Filled in by zImage */
4699192af0SSean MacLennan	};
4799192af0SSean MacLennan
4899192af0SSean MacLennan	UIC0: interrupt-controller0 {
4999192af0SSean MacLennan		compatible = "ibm,uic-440ep","ibm,uic";
5099192af0SSean MacLennan		interrupt-controller;
5199192af0SSean MacLennan		cell-index = <0>;
5299192af0SSean MacLennan		dcr-reg = <0c0 009>;
5399192af0SSean MacLennan		#address-cells = <0>;
5499192af0SSean MacLennan		#size-cells = <0>;
5599192af0SSean MacLennan		#interrupt-cells = <2>;
5699192af0SSean MacLennan	};
5799192af0SSean MacLennan
5899192af0SSean MacLennan	UIC1: interrupt-controller1 {
5999192af0SSean MacLennan		compatible = "ibm,uic-440ep","ibm,uic";
6099192af0SSean MacLennan		interrupt-controller;
6199192af0SSean MacLennan		cell-index = <1>;
6299192af0SSean MacLennan		dcr-reg = <0d0 009>;
6399192af0SSean MacLennan		#address-cells = <0>;
6499192af0SSean MacLennan		#size-cells = <0>;
6599192af0SSean MacLennan		#interrupt-cells = <2>;
6699192af0SSean MacLennan		interrupts = <1e 4 1f 4>; /* cascade */
6799192af0SSean MacLennan		interrupt-parent = <&UIC0>;
6899192af0SSean MacLennan	};
6999192af0SSean MacLennan
7099192af0SSean MacLennan	SDR0: sdr {
7199192af0SSean MacLennan		compatible = "ibm,sdr-440ep";
7299192af0SSean MacLennan		dcr-reg = <00e 002>;
7399192af0SSean MacLennan	};
7499192af0SSean MacLennan
7599192af0SSean MacLennan	CPR0: cpr {
7699192af0SSean MacLennan		compatible = "ibm,cpr-440ep";
7799192af0SSean MacLennan		dcr-reg = <00c 002>;
7899192af0SSean MacLennan	};
7999192af0SSean MacLennan
8099192af0SSean MacLennan	plb {
8199192af0SSean MacLennan		compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
8299192af0SSean MacLennan		#address-cells = <2>;
8399192af0SSean MacLennan		#size-cells = <1>;
8499192af0SSean MacLennan		ranges;
8599192af0SSean MacLennan		clock-frequency = <0>; /* Filled in by zImage */
8699192af0SSean MacLennan
8799192af0SSean MacLennan		SDRAM0: sdram {
8899192af0SSean MacLennan			compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
8999192af0SSean MacLennan			dcr-reg = <010 2>;
9099192af0SSean MacLennan		};
9199192af0SSean MacLennan
9299192af0SSean MacLennan		DMA0: dma {
9399192af0SSean MacLennan			compatible = "ibm,dma-440ep", "ibm,dma-440gp";
9499192af0SSean MacLennan			dcr-reg = <100 027>;
9599192af0SSean MacLennan		};
9699192af0SSean MacLennan
9799192af0SSean MacLennan		MAL0: mcmal {
9899192af0SSean MacLennan			compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
9999192af0SSean MacLennan			dcr-reg = <180 62>;
10099192af0SSean MacLennan			num-tx-chans = <4>;
10199192af0SSean MacLennan			num-rx-chans = <2>;
10299192af0SSean MacLennan			interrupt-parent = <&MAL0>;
10399192af0SSean MacLennan			interrupts = <0 1 2 3 4>;
10499192af0SSean MacLennan			#interrupt-cells = <1>;
10599192af0SSean MacLennan			#address-cells = <0>;
10699192af0SSean MacLennan			#size-cells = <0>;
10799192af0SSean MacLennan			interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
10899192af0SSean MacLennan					/*RXEOB*/ 1 &UIC0 b 4
10999192af0SSean MacLennan					/*SERR*/  2 &UIC1 0 4
11099192af0SSean MacLennan					/*TXDE*/  3 &UIC1 1 4
11199192af0SSean MacLennan					/*RXDE*/  4 &UIC1 2 4>;
11299192af0SSean MacLennan		};
11399192af0SSean MacLennan
11499192af0SSean MacLennan		POB0: opb {
11599192af0SSean MacLennan		  	compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
11699192af0SSean MacLennan			#address-cells = <1>;
11799192af0SSean MacLennan			#size-cells = <1>;
11899192af0SSean MacLennan		  	ranges = <00000000 0 00000000 80000000
11999192af0SSean MacLennan			          80000000 0 80000000 80000000>;
12099192af0SSean MacLennan		  	interrupt-parent = <&UIC1>;
12199192af0SSean MacLennan		  	interrupts = <7 4>;
12299192af0SSean MacLennan		  	clock-frequency = <0>; /* Filled in by zImage */
12399192af0SSean MacLennan
12499192af0SSean MacLennan			EBC0: ebc {
12599192af0SSean MacLennan				compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
12699192af0SSean MacLennan				dcr-reg = <012 2>;
12799192af0SSean MacLennan				#address-cells = <2>;
12899192af0SSean MacLennan				#size-cells = <1>;
12999192af0SSean MacLennan				clock-frequency = <0>; /* Filled in by zImage */
13099192af0SSean MacLennan				interrupts = <5 1>;
13199192af0SSean MacLennan				interrupt-parent = <&UIC1>;
13299192af0SSean MacLennan
13399192af0SSean MacLennan				fpga@2,0 {
13499192af0SSean MacLennan					compatible = "pika,fpga";
13599192af0SSean MacLennan			   		reg = <2 0 2200>;
13699192af0SSean MacLennan					interrupts = <18 8>;
13799192af0SSean MacLennan					interrupt-parent = <&UIC0>;
13899192af0SSean MacLennan				};
13999192af0SSean MacLennan
14099192af0SSean MacLennan				nor_flash@0,0 {
14199192af0SSean MacLennan					compatible = "amd,s29gl512n", "cfi-flash";
14299192af0SSean MacLennan					bank-width = <2>;
14399192af0SSean MacLennan					reg = <0 0 4000000>;
14499192af0SSean MacLennan					#address-cells = <1>;
14599192af0SSean MacLennan					#size-cells = <1>;
14699192af0SSean MacLennan					partition@0 {
14799192af0SSean MacLennan						label = "kernel";
14899192af0SSean MacLennan						reg = <0 180000>;
14999192af0SSean MacLennan					};
15099192af0SSean MacLennan					partition@180000 {
15199192af0SSean MacLennan						label = "root";
15299192af0SSean MacLennan						reg = <180000 3480000>;
15399192af0SSean MacLennan					};
15499192af0SSean MacLennan					partition@3600000 {
15599192af0SSean MacLennan						label = "user";
15699192af0SSean MacLennan						reg = <3600000 900000>;
15799192af0SSean MacLennan					};
15899192af0SSean MacLennan					partition@3f00000 {
15999192af0SSean MacLennan						label = "fpga";
16099192af0SSean MacLennan						reg = <3f00000 40000>;
16199192af0SSean MacLennan					};
16299192af0SSean MacLennan					partition@3f40000 {
16399192af0SSean MacLennan						label = "env";
16499192af0SSean MacLennan						reg = <3f40000 40000>;
16599192af0SSean MacLennan					};
16699192af0SSean MacLennan					partition@3f80000 {
16799192af0SSean MacLennan						label = "u-boot";
16899192af0SSean MacLennan						reg = <3f80000 80000>;
16999192af0SSean MacLennan					};
17099192af0SSean MacLennan				};
17199192af0SSean MacLennan			};
17299192af0SSean MacLennan
17399192af0SSean MacLennan			UART0: serial@ef600300 {
17499192af0SSean MacLennan		   		device_type = "serial";
17599192af0SSean MacLennan		   		compatible = "ns16550";
17699192af0SSean MacLennan		   		reg = <ef600300 8>;
17799192af0SSean MacLennan		   		virtual-reg = <ef600300>;
17899192af0SSean MacLennan		   		clock-frequency = <0>; /* Filled in by zImage */
17999192af0SSean MacLennan		   		current-speed = <1c200>;
18099192af0SSean MacLennan		   		interrupt-parent = <&UIC0>;
18199192af0SSean MacLennan		   		interrupts = <0 4>;
18299192af0SSean MacLennan	   		};
18399192af0SSean MacLennan
18499192af0SSean MacLennan			IIC0: i2c@ef600700 {
18599192af0SSean MacLennan				compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
18699192af0SSean MacLennan				reg = <ef600700 14>;
18799192af0SSean MacLennan				interrupt-parent = <&UIC0>;
18899192af0SSean MacLennan				interrupts = <2 4>;
18999192af0SSean MacLennan			};
19099192af0SSean MacLennan
19199192af0SSean MacLennan			GPIO0: gpio@ef600b00 {
19299192af0SSean MacLennan				compatible = "ibm,gpio-440ep";
19399192af0SSean MacLennan				reg = <ef600b00 48>;
19499192af0SSean MacLennan			};
19599192af0SSean MacLennan
19699192af0SSean MacLennan			GPIO1: gpio@ef600c00 {
19799192af0SSean MacLennan				compatible = "ibm,gpio-440ep";
19899192af0SSean MacLennan				reg = <ef600c00 48>;
19999192af0SSean MacLennan			};
20099192af0SSean MacLennan
20199192af0SSean MacLennan			ZMII0: emac-zmii@ef600d00 {
20299192af0SSean MacLennan				compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
20399192af0SSean MacLennan				reg = <ef600d00 c>;
20499192af0SSean MacLennan			};
20599192af0SSean MacLennan
20699192af0SSean MacLennan			EMAC0: ethernet@ef600e00 {
20799192af0SSean MacLennan				linux,network-index = <0>;
20899192af0SSean MacLennan				device_type = "network";
20999192af0SSean MacLennan				compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
21099192af0SSean MacLennan				interrupt-parent = <&UIC1>;
21199192af0SSean MacLennan				interrupts = <1c 4 1d 4>;
21299192af0SSean MacLennan				reg = <ef600e00 70>;
21399192af0SSean MacLennan				local-mac-address = [000000000000];
21499192af0SSean MacLennan				mal-device = <&MAL0>;
21599192af0SSean MacLennan				mal-tx-channel = <0 1>;
21699192af0SSean MacLennan				mal-rx-channel = <0>;
21799192af0SSean MacLennan				cell-index = <0>;
21899192af0SSean MacLennan				max-frame-size = <5dc>;
21999192af0SSean MacLennan				rx-fifo-size = <1000>;
22099192af0SSean MacLennan				tx-fifo-size = <800>;
22199192af0SSean MacLennan				phy-mode = "rmii";
22299192af0SSean MacLennan				phy-map = <00000000>;
22399192af0SSean MacLennan				zmii-device = <&ZMII0>;
22499192af0SSean MacLennan				zmii-channel = <0>;
22599192af0SSean MacLennan			};
22699192af0SSean MacLennan
22799192af0SSean MacLennan			usb@ef601000 {
22899192af0SSean MacLennan				compatible = "ohci-be";
22999192af0SSean MacLennan				reg = <ef601000 80>;
23099192af0SSean MacLennan				interrupts = <8 1 9 1>;
23199192af0SSean MacLennan				interrupt-parent = < &UIC1 >;
23299192af0SSean MacLennan			};
23399192af0SSean MacLennan		};
23499192af0SSean MacLennan	};
23599192af0SSean MacLennan
23699192af0SSean MacLennan	chosen {
23799192af0SSean MacLennan		linux,stdout-path = "/plb/opb/serial@ef600300";
23899192af0SSean MacLennan	};
23999192af0SSean MacLennan};
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