199192af0SSean MacLennan/* 299192af0SSean MacLennan * Device Tree Source for PIKA Warp 399192af0SSean MacLennan * 4805e324bSSean MacLennan * Copyright (c) 2008-2009 PIKA Technologies 599192af0SSean MacLennan * Sean MacLennan <smaclennan@pikatech.com> 699192af0SSean MacLennan * 799192af0SSean MacLennan * This file is licensed under the terms of the GNU General Public 899192af0SSean MacLennan * License version 2. This program is licensed "as is" without 999192af0SSean MacLennan * any warranty of any kind, whether express or implied. 1099192af0SSean MacLennan */ 1199192af0SSean MacLennan 1271f34979SDavid Gibson/dts-v1/; 1371f34979SDavid Gibson 1499192af0SSean MacLennan/ { 1599192af0SSean MacLennan #address-cells = <2>; 1699192af0SSean MacLennan #size-cells = <1>; 1799192af0SSean MacLennan model = "pika,warp"; 1899192af0SSean MacLennan compatible = "pika,warp"; 1971f34979SDavid Gibson dcr-parent = <&{/cpus/cpu@0}>; 2099192af0SSean MacLennan 2199192af0SSean MacLennan aliases { 2299192af0SSean MacLennan ethernet0 = &EMAC0; 2399192af0SSean MacLennan serial0 = &UART0; 2499192af0SSean MacLennan }; 2599192af0SSean MacLennan 2699192af0SSean MacLennan cpus { 2799192af0SSean MacLennan #address-cells = <1>; 2899192af0SSean MacLennan #size-cells = <0>; 2999192af0SSean MacLennan 3099192af0SSean MacLennan cpu@0 { 3199192af0SSean MacLennan device_type = "cpu"; 3299192af0SSean MacLennan model = "PowerPC,440EP"; 3371f34979SDavid Gibson reg = <0x00000000>; 3499192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 3599192af0SSean MacLennan timebase-frequency = <0>; /* Filled in by zImage */ 3671f34979SDavid Gibson i-cache-line-size = <32>; 3771f34979SDavid Gibson d-cache-line-size = <32>; 3871f34979SDavid Gibson i-cache-size = <32768>; 3971f34979SDavid Gibson d-cache-size = <32768>; 4099192af0SSean MacLennan dcr-controller; 4199192af0SSean MacLennan dcr-access-method = "native"; 4299192af0SSean MacLennan }; 4399192af0SSean MacLennan }; 4499192af0SSean MacLennan 4599192af0SSean MacLennan memory { 4699192af0SSean MacLennan device_type = "memory"; 4771f34979SDavid Gibson reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ 4899192af0SSean MacLennan }; 4999192af0SSean MacLennan 5099192af0SSean MacLennan UIC0: interrupt-controller0 { 5199192af0SSean MacLennan compatible = "ibm,uic-440ep","ibm,uic"; 5299192af0SSean MacLennan interrupt-controller; 5399192af0SSean MacLennan cell-index = <0>; 5471f34979SDavid Gibson dcr-reg = <0x0c0 0x009>; 5599192af0SSean MacLennan #address-cells = <0>; 5699192af0SSean MacLennan #size-cells = <0>; 5799192af0SSean MacLennan #interrupt-cells = <2>; 5899192af0SSean MacLennan }; 5999192af0SSean MacLennan 6099192af0SSean MacLennan UIC1: interrupt-controller1 { 6199192af0SSean MacLennan compatible = "ibm,uic-440ep","ibm,uic"; 6299192af0SSean MacLennan interrupt-controller; 6399192af0SSean MacLennan cell-index = <1>; 6471f34979SDavid Gibson dcr-reg = <0x0d0 0x009>; 6599192af0SSean MacLennan #address-cells = <0>; 6699192af0SSean MacLennan #size-cells = <0>; 6799192af0SSean MacLennan #interrupt-cells = <2>; 6871f34979SDavid Gibson interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 6999192af0SSean MacLennan interrupt-parent = <&UIC0>; 7099192af0SSean MacLennan }; 7199192af0SSean MacLennan 7299192af0SSean MacLennan SDR0: sdr { 7399192af0SSean MacLennan compatible = "ibm,sdr-440ep"; 7471f34979SDavid Gibson dcr-reg = <0x00e 0x002>; 7599192af0SSean MacLennan }; 7699192af0SSean MacLennan 7799192af0SSean MacLennan CPR0: cpr { 7899192af0SSean MacLennan compatible = "ibm,cpr-440ep"; 7971f34979SDavid Gibson dcr-reg = <0x00c 0x002>; 8099192af0SSean MacLennan }; 8199192af0SSean MacLennan 8299192af0SSean MacLennan plb { 8399192af0SSean MacLennan compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; 8499192af0SSean MacLennan #address-cells = <2>; 8599192af0SSean MacLennan #size-cells = <1>; 8699192af0SSean MacLennan ranges; 8799192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 8899192af0SSean MacLennan 8999192af0SSean MacLennan SDRAM0: sdram { 9099192af0SSean MacLennan compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 9171f34979SDavid Gibson dcr-reg = <0x010 0x002>; 9299192af0SSean MacLennan }; 9399192af0SSean MacLennan 9499192af0SSean MacLennan DMA0: dma { 9599192af0SSean MacLennan compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 9671f34979SDavid Gibson dcr-reg = <0x100 0x027>; 9799192af0SSean MacLennan }; 9899192af0SSean MacLennan 9999192af0SSean MacLennan MAL0: mcmal { 10099192af0SSean MacLennan compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 10171f34979SDavid Gibson dcr-reg = <0x180 0x062>; 10299192af0SSean MacLennan num-tx-chans = <4>; 10399192af0SSean MacLennan num-rx-chans = <2>; 10499192af0SSean MacLennan interrupt-parent = <&MAL0>; 10571f34979SDavid Gibson interrupts = <0x0 0x1 0x2 0x3 0x4>; 10699192af0SSean MacLennan #interrupt-cells = <1>; 10799192af0SSean MacLennan #address-cells = <0>; 10899192af0SSean MacLennan #size-cells = <0>; 10971f34979SDavid Gibson interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 11071f34979SDavid Gibson /*RXEOB*/ 0x1 &UIC0 0xb 0x4 11171f34979SDavid Gibson /*SERR*/ 0x2 &UIC1 0x0 0x4 11271f34979SDavid Gibson /*TXDE*/ 0x3 &UIC1 0x1 0x4 11371f34979SDavid Gibson /*RXDE*/ 0x4 &UIC1 0x2 0x4>; 11499192af0SSean MacLennan }; 11599192af0SSean MacLennan 11699192af0SSean MacLennan POB0: opb { 11799192af0SSean MacLennan compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; 11899192af0SSean MacLennan #address-cells = <1>; 11999192af0SSean MacLennan #size-cells = <1>; 12071f34979SDavid Gibson ranges = <0x00000000 0x00000000 0x00000000 0x80000000 12171f34979SDavid Gibson 0x80000000 0x00000000 0x80000000 0x80000000>; 12299192af0SSean MacLennan interrupt-parent = <&UIC1>; 12371f34979SDavid Gibson interrupts = <0x7 0x4>; 12499192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 12599192af0SSean MacLennan 12699192af0SSean MacLennan EBC0: ebc { 12799192af0SSean MacLennan compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 12871f34979SDavid Gibson dcr-reg = <0x012 0x002>; 12999192af0SSean MacLennan #address-cells = <2>; 13099192af0SSean MacLennan #size-cells = <1>; 13199192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 13271f34979SDavid Gibson interrupts = <0x5 0x1>; 13399192af0SSean MacLennan interrupt-parent = <&UIC1>; 13499192af0SSean MacLennan 13599192af0SSean MacLennan fpga@2,0 { 13699192af0SSean MacLennan compatible = "pika,fpga"; 1370393cb61SSean MacLennan reg = <0x00000002 0x00000000 0x00001000>; 13871f34979SDavid Gibson interrupts = <0x18 0x8>; 13999192af0SSean MacLennan interrupt-parent = <&UIC0>; 14099192af0SSean MacLennan }; 14199192af0SSean MacLennan 1421d555cf1SSean MacLennan fpga@2,2000 { 1431d555cf1SSean MacLennan compatible = "pika,fpga-sgl"; 1441d555cf1SSean MacLennan reg = <0x00000002 0x00002000 0x00000200>; 1451d555cf1SSean MacLennan }; 1461d555cf1SSean MacLennan 1470393cb61SSean MacLennan fpga@2,4000 { 1480393cb61SSean MacLennan compatible = "pika,fpga-sd"; 149a18cb387SSean MacLennan reg = <0x00000002 0x00004000 0x00004000>; 1500393cb61SSean MacLennan }; 1510393cb61SSean MacLennan 152e275e023SSean MacLennan nor@0,0 { 1530393cb61SSean MacLennan compatible = "amd,s29gl032a", "cfi-flash"; 15499192af0SSean MacLennan bank-width = <2>; 1550393cb61SSean MacLennan reg = <0x00000000 0x00000000 0x00400000>; 15699192af0SSean MacLennan #address-cells = <1>; 15799192af0SSean MacLennan #size-cells = <1>; 158e275e023SSean MacLennan 159e275e023SSean MacLennan partition@0 { 160e275e023SSean MacLennan label = "splash"; 161805e324bSSean MacLennan reg = <0x00000000 0x00010000>; 162e275e023SSean MacLennan }; 1630393cb61SSean MacLennan partition@300000 { 16499192af0SSean MacLennan label = "fpga"; 165929badadSSean MacLennan reg = <0x0300000 0x00040000>; 16699192af0SSean MacLennan }; 1670393cb61SSean MacLennan partition@340000 { 16899192af0SSean MacLennan label = "env"; 1690393cb61SSean MacLennan reg = <0x0340000 0x00040000>; 17099192af0SSean MacLennan }; 1710393cb61SSean MacLennan partition@380000 { 17299192af0SSean MacLennan label = "u-boot"; 1730393cb61SSean MacLennan reg = <0x0380000 0x00080000>; 17499192af0SSean MacLennan }; 17599192af0SSean MacLennan }; 176e275e023SSean MacLennan 177e275e023SSean MacLennan ndfc@1,0 { 178e275e023SSean MacLennan compatible = "ibm,ndfc"; 179e275e023SSean MacLennan reg = <0x00000001 0x00000000 0x00002000>; 180e275e023SSean MacLennan ccr = <0x00001000>; 181e275e023SSean MacLennan bank-settings = <0x80002222>; 182e275e023SSean MacLennan #address-cells = <1>; 183e275e023SSean MacLennan #size-cells = <1>; 184e275e023SSean MacLennan 185e275e023SSean MacLennan nand { 186e275e023SSean MacLennan #address-cells = <1>; 187e275e023SSean MacLennan #size-cells = <1>; 188e275e023SSean MacLennan 189e275e023SSean MacLennan partition@0 { 190e275e023SSean MacLennan label = "kernel"; 191e275e023SSean MacLennan reg = <0x00000000 0x00200000>; 192e275e023SSean MacLennan }; 193e275e023SSean MacLennan partition@200000 { 194e275e023SSean MacLennan label = "root"; 195e275e023SSean MacLennan reg = <0x00200000 0x03E00000>; 196e275e023SSean MacLennan }; 197e275e023SSean MacLennan partition@40000000 { 198e275e023SSean MacLennan label = "persistent"; 199e275e023SSean MacLennan reg = <0x04000000 0x04000000>; 200e275e023SSean MacLennan }; 201e275e023SSean MacLennan partition@80000000 { 202e275e023SSean MacLennan label = "persistent1"; 203e275e023SSean MacLennan reg = <0x08000000 0x04000000>; 204e275e023SSean MacLennan }; 205e275e023SSean MacLennan partition@C0000000 { 206e275e023SSean MacLennan label = "persistent2"; 207e275e023SSean MacLennan reg = <0x0C000000 0x04000000>; 208e275e023SSean MacLennan }; 209e275e023SSean MacLennan }; 210e275e023SSean MacLennan }; 21199192af0SSean MacLennan }; 21299192af0SSean MacLennan 21399192af0SSean MacLennan UART0: serial@ef600300 { 21499192af0SSean MacLennan device_type = "serial"; 21599192af0SSean MacLennan compatible = "ns16550"; 21671f34979SDavid Gibson reg = <0xef600300 0x00000008>; 21771f34979SDavid Gibson virtual-reg = <0xef600300>; 21899192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 21971f34979SDavid Gibson current-speed = <115200>; 22099192af0SSean MacLennan interrupt-parent = <&UIC0>; 22171f34979SDavid Gibson interrupts = <0x0 0x4>; 22299192af0SSean MacLennan }; 22399192af0SSean MacLennan 22499192af0SSean MacLennan IIC0: i2c@ef600700 { 22599192af0SSean MacLennan compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 22671f34979SDavid Gibson reg = <0xef600700 0x00000014>; 22799192af0SSean MacLennan interrupt-parent = <&UIC0>; 22871f34979SDavid Gibson interrupts = <0x2 0x4>; 2290393cb61SSean MacLennan #address-cells = <1>; 2300393cb61SSean MacLennan #size-cells = <0>; 2310393cb61SSean MacLennan 2320393cb61SSean MacLennan ad7414@4a { 2330393cb61SSean MacLennan compatible = "adi,ad7414"; 2340393cb61SSean MacLennan reg = <0x4a>; 2350393cb61SSean MacLennan interrupts = <0x19 0x8>; 2360393cb61SSean MacLennan interrupt-parent = <&UIC0>; 2370393cb61SSean MacLennan }; 2381d555cf1SSean MacLennan 2391d555cf1SSean MacLennan /* This will create 52 and 53 */ 2401d555cf1SSean MacLennan at24@52 { 241adeb8667SJavier Martinez Canillas compatible = "atmel,24c04"; 2421d555cf1SSean MacLennan reg = <0x52>; 2431d555cf1SSean MacLennan }; 24499192af0SSean MacLennan }; 24599192af0SSean MacLennan 24699192af0SSean MacLennan GPIO0: gpio@ef600b00 { 247805e324bSSean MacLennan compatible = "ibm,ppc4xx-gpio"; 24871f34979SDavid Gibson reg = <0xef600b00 0x00000048>; 2490393cb61SSean MacLennan #gpio-cells = <2>; 2500393cb61SSean MacLennan gpio-controller; 25199192af0SSean MacLennan }; 25299192af0SSean MacLennan 25399192af0SSean MacLennan GPIO1: gpio@ef600c00 { 254805e324bSSean MacLennan compatible = "ibm,ppc4xx-gpio"; 25571f34979SDavid Gibson reg = <0xef600c00 0x00000048>; 2560393cb61SSean MacLennan #gpio-cells = <2>; 2570393cb61SSean MacLennan gpio-controller; 2581d555cf1SSean MacLennan }; 2591d555cf1SSean MacLennan 260805e324bSSean MacLennan power-leds { 261805e324bSSean MacLennan compatible = "gpio-leds"; 262805e324bSSean MacLennan green { 263805e324bSSean MacLennan gpios = <&GPIO1 0 0>; 264ba703e1aSSean MacLennan default-state = "keep"; 265805e324bSSean MacLennan }; 266805e324bSSean MacLennan red { 267805e324bSSean MacLennan gpios = <&GPIO1 1 0>; 268ba703e1aSSean MacLennan default-state = "keep"; 2690393cb61SSean MacLennan }; 27099192af0SSean MacLennan }; 27199192af0SSean MacLennan 27299192af0SSean MacLennan ZMII0: emac-zmii@ef600d00 { 27399192af0SSean MacLennan compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 27471f34979SDavid Gibson reg = <0xef600d00 0x0000000c>; 27599192af0SSean MacLennan }; 27699192af0SSean MacLennan 27799192af0SSean MacLennan EMAC0: ethernet@ef600e00 { 27899192af0SSean MacLennan device_type = "network"; 27999192af0SSean MacLennan compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 28099192af0SSean MacLennan interrupt-parent = <&UIC1>; 28171f34979SDavid Gibson interrupts = <0x1c 0x4 0x1d 0x4>; 28271f34979SDavid Gibson reg = <0xef600e00 0x00000070>; 28399192af0SSean MacLennan local-mac-address = [000000000000]; 28499192af0SSean MacLennan mal-device = <&MAL0>; 28599192af0SSean MacLennan mal-tx-channel = <0 1>; 28699192af0SSean MacLennan mal-rx-channel = <0>; 28799192af0SSean MacLennan cell-index = <0>; 28871f34979SDavid Gibson max-frame-size = <1500>; 28971f34979SDavid Gibson rx-fifo-size = <4096>; 29071f34979SDavid Gibson tx-fifo-size = <2048>; 29199192af0SSean MacLennan phy-mode = "rmii"; 29271f34979SDavid Gibson phy-map = <0x00000000>; 29399192af0SSean MacLennan zmii-device = <&ZMII0>; 29499192af0SSean MacLennan zmii-channel = <0>; 29599192af0SSean MacLennan }; 29699192af0SSean MacLennan 29799192af0SSean MacLennan usb@ef601000 { 29899192af0SSean MacLennan compatible = "ohci-be"; 29971f34979SDavid Gibson reg = <0xef601000 0x00000080>; 30071f34979SDavid Gibson interrupts = <0x8 0x1 0x9 0x1>; 30199192af0SSean MacLennan interrupt-parent = < &UIC1 >; 30299192af0SSean MacLennan }; 30399192af0SSean MacLennan }; 30499192af0SSean MacLennan }; 30599192af0SSean MacLennan 30699192af0SSean MacLennan chosen { 30778e5dfeaSRob Herring stdout-path = "/plb/opb/serial@ef600300"; 30899192af0SSean MacLennan }; 30999192af0SSean MacLennan}; 310