154c15ec3SPali Rohár// SPDX-License-Identifier: GPL-2.0+ 254c15ec3SPali Rohár/* 354c15ec3SPali Rohár * Turris 1.x Device Tree Source 454c15ec3SPali Rohár * 554c15ec3SPali Rohár * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/) 654c15ec3SPali Rohár * 754c15ec3SPali Rohár * Pinout, Schematics and Altium hardware design files are open source 854c15ec3SPali Rohár * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/ 954c15ec3SPali Rohár */ 1054c15ec3SPali Rohár 1154c15ec3SPali Rohár#include <dt-bindings/gpio/gpio.h> 1254c15ec3SPali Rohár#include <dt-bindings/interrupt-controller/irq.h> 1354c15ec3SPali Rohár#include <dt-bindings/leds/common.h> 1454c15ec3SPali Rohár/include/ "fsl/p2020si-pre.dtsi" 1554c15ec3SPali Rohár 1654c15ec3SPali Rohár/ { 1754c15ec3SPali Rohár model = "Turris 1.x"; 18*40f7b523SPali Rohár compatible = "cznic,turris1x"; 1954c15ec3SPali Rohár 2054c15ec3SPali Rohár aliases { 2154c15ec3SPali Rohár ethernet0 = &enet0; 2254c15ec3SPali Rohár ethernet1 = &enet1; 2354c15ec3SPali Rohár ethernet2 = &enet2; 2454c15ec3SPali Rohár serial0 = &serial0; 2554c15ec3SPali Rohár serial1 = &serial1; 2654c15ec3SPali Rohár pci0 = &pci0; 2754c15ec3SPali Rohár pci1 = &pci1; 2854c15ec3SPali Rohár pci2 = &pci2; 2954c15ec3SPali Rohár spi0 = &spi0; 3054c15ec3SPali Rohár }; 3154c15ec3SPali Rohár 3254c15ec3SPali Rohár memory { 3354c15ec3SPali Rohár device_type = "memory"; 3454c15ec3SPali Rohár }; 3554c15ec3SPali Rohár 3654c15ec3SPali Rohár soc: soc@ffe00000 { 3754c15ec3SPali Rohár ranges = <0x0 0x0 0xffe00000 0x00100000>; 3854c15ec3SPali Rohár 3954c15ec3SPali Rohár i2c@3000 { 4054c15ec3SPali Rohár /* PCA9557PW GPIO controller for boot config */ 4154c15ec3SPali Rohár gpio-controller@18 { 4254c15ec3SPali Rohár compatible = "nxp,pca9557"; 4354c15ec3SPali Rohár label = "bootcfg"; 4454c15ec3SPali Rohár reg = <0x18>; 4554c15ec3SPali Rohár #gpio-cells = <2>; 4654c15ec3SPali Rohár gpio-controller; 4754c15ec3SPali Rohár polarity = <0x00>; 4854c15ec3SPali Rohár }; 4954c15ec3SPali Rohár 5054c15ec3SPali Rohár /* STM32F030R8T6 MCU for power control */ 5154c15ec3SPali Rohár power-control@2a { 5254c15ec3SPali Rohár /* 5354c15ec3SPali Rohár * Turris Power Control firmware runs on STM32F0 MCU. 5454c15ec3SPali Rohár * This firmware is open source and available at: 5554c15ec3SPali Rohár * https://gitlab.nic.cz/turris/hw/turris_power_control 5654c15ec3SPali Rohár */ 5754c15ec3SPali Rohár reg = <0x2a>; 5854c15ec3SPali Rohár }; 5954c15ec3SPali Rohár 6054c15ec3SPali Rohár /* DDR3 SPD/EEPROM PSWP instruction */ 6154c15ec3SPali Rohár eeprom@32 { 6254c15ec3SPali Rohár reg = <0x32>; 6354c15ec3SPali Rohár }; 6454c15ec3SPali Rohár 6554c15ec3SPali Rohár /* SA56004ED temperature control */ 6654c15ec3SPali Rohár temperature-sensor@4c { 6754c15ec3SPali Rohár compatible = "nxp,sa56004"; 6854c15ec3SPali Rohár reg = <0x4c>; 6954c15ec3SPali Rohár interrupt-parent = <&gpio>; 7054c15ec3SPali Rohár interrupts = <12 IRQ_TYPE_LEVEL_LOW>, /* GPIO12 - ALERT pin */ 7154c15ec3SPali Rohár <13 IRQ_TYPE_LEVEL_LOW>; /* GPIO13 - CRIT pin */ 7267bbb62fSPali Rohár #address-cells = <1>; 7367bbb62fSPali Rohár #size-cells = <0>; 7467bbb62fSPali Rohár 7567bbb62fSPali Rohár /* Local temperature sensor (SA56004ED internal) */ 7667bbb62fSPali Rohár channel@0 { 7767bbb62fSPali Rohár reg = <0>; 7867bbb62fSPali Rohár label = "board"; 7967bbb62fSPali Rohár }; 8067bbb62fSPali Rohár 8167bbb62fSPali Rohár /* Remote temperature sensor (D+/D- connected to P2020 CPU Temperature Diode) */ 8267bbb62fSPali Rohár channel@1 { 8367bbb62fSPali Rohár reg = <1>; 8467bbb62fSPali Rohár label = "cpu"; 8567bbb62fSPali Rohár }; 8654c15ec3SPali Rohár }; 8754c15ec3SPali Rohár 8854c15ec3SPali Rohár /* DDR3 SPD/EEPROM */ 8954c15ec3SPali Rohár eeprom@52 { 9054c15ec3SPali Rohár compatible = "atmel,spd"; 9154c15ec3SPali Rohár reg = <0x52>; 9254c15ec3SPali Rohár }; 9354c15ec3SPali Rohár 9454c15ec3SPali Rohár /* MCP79402-I/ST Protected EEPROM */ 9554c15ec3SPali Rohár eeprom@57 { 9654c15ec3SPali Rohár reg = <0x57>; 9754c15ec3SPali Rohár }; 9854c15ec3SPali Rohár 9954c15ec3SPali Rohár /* ATSHA204-TH-DA-T crypto module */ 10054c15ec3SPali Rohár crypto@64 { 10154c15ec3SPali Rohár compatible = "atmel,atsha204"; 10254c15ec3SPali Rohár reg = <0x64>; 10354c15ec3SPali Rohár }; 10454c15ec3SPali Rohár 10554c15ec3SPali Rohár /* IDT6V49205BNLGI clock generator */ 10654c15ec3SPali Rohár clock-generator@69 { 10754c15ec3SPali Rohár compatible = "idt,6v49205b"; 10854c15ec3SPali Rohár reg = <0x69>; 10954c15ec3SPali Rohár }; 11054c15ec3SPali Rohár 11154c15ec3SPali Rohár /* MCP79402-I/ST RTC */ 11254c15ec3SPali Rohár rtc@6f { 11354c15ec3SPali Rohár compatible = "microchip,mcp7940x"; 11454c15ec3SPali Rohár reg = <0x6f>; 11554c15ec3SPali Rohár interrupt-parent = <&gpio>; 11654c15ec3SPali Rohár interrupts = <14 0>; /* GPIO14 - MFP pin */ 11754c15ec3SPali Rohár }; 11854c15ec3SPali Rohár }; 11954c15ec3SPali Rohár 12054c15ec3SPali Rohár /* SPI on connector P1 */ 12154c15ec3SPali Rohár spi0: spi@7000 { 12254c15ec3SPali Rohár }; 12354c15ec3SPali Rohár 12454c15ec3SPali Rohár gpio: gpio-controller@fc00 { 12554c15ec3SPali Rohár #interrupt-cells = <2>; 12654c15ec3SPali Rohár interrupt-controller; 12754c15ec3SPali Rohár }; 12854c15ec3SPali Rohár 12954c15ec3SPali Rohár /* Connected to SMSC USB2412-DZK 2-Port USB 2.0 Hub Controller */ 13054c15ec3SPali Rohár usb@22000 { 13154c15ec3SPali Rohár phy_type = "ulpi"; 13254c15ec3SPali Rohár dr_mode = "host"; 13354c15ec3SPali Rohár }; 13454c15ec3SPali Rohár 13554c15ec3SPali Rohár enet0: ethernet@24000 { 13654c15ec3SPali Rohár /* Connected to port 6 of QCA8337N-AL3C switch */ 13754c15ec3SPali Rohár phy-connection-type = "rgmii-id"; 13854c15ec3SPali Rohár 13954c15ec3SPali Rohár fixed-link { 14054c15ec3SPali Rohár speed = <1000>; 14154c15ec3SPali Rohár full-duplex; 14254c15ec3SPali Rohár }; 14354c15ec3SPali Rohár }; 14454c15ec3SPali Rohár 14554c15ec3SPali Rohár mdio@24520 { 14654c15ec3SPali Rohár /* KSZ9031RNXCA ethernet phy for WAN port */ 14754c15ec3SPali Rohár phy: ethernet-phy@7 { 14854c15ec3SPali Rohár interrupts = <3 1 0 0>; 14954c15ec3SPali Rohár reg = <0x7>; 15054c15ec3SPali Rohár }; 15154c15ec3SPali Rohár 15254c15ec3SPali Rohár /* QCA8337N-AL3C switch with integrated ethernet PHYs for LAN ports */ 15354c15ec3SPali Rohár switch@10 { 15454c15ec3SPali Rohár compatible = "qca,qca8337"; 15554c15ec3SPali Rohár interrupts = <2 1 0 0>; 15654c15ec3SPali Rohár reg = <0x10>; 15754c15ec3SPali Rohár 15854c15ec3SPali Rohár ports { 15954c15ec3SPali Rohár #address-cells = <1>; 16054c15ec3SPali Rohár #size-cells = <0>; 16154c15ec3SPali Rohár 16254c15ec3SPali Rohár port@0 { 16354c15ec3SPali Rohár reg = <0>; 1648bf056f5SPali Rohár label = "cpu"; 16554c15ec3SPali Rohár ethernet = <&enet1>; 16654c15ec3SPali Rohár phy-mode = "rgmii-id"; 16754c15ec3SPali Rohár 16854c15ec3SPali Rohár fixed-link { 16954c15ec3SPali Rohár speed = <1000>; 17054c15ec3SPali Rohár full-duplex; 17154c15ec3SPali Rohár }; 17254c15ec3SPali Rohár }; 17354c15ec3SPali Rohár 17454c15ec3SPali Rohár port@1 { 17554c15ec3SPali Rohár reg = <1>; 17654c15ec3SPali Rohár label = "lan5"; 17754c15ec3SPali Rohár }; 17854c15ec3SPali Rohár 17954c15ec3SPali Rohár port@2 { 18054c15ec3SPali Rohár reg = <2>; 18154c15ec3SPali Rohár label = "lan4"; 18254c15ec3SPali Rohár }; 18354c15ec3SPali Rohár 18454c15ec3SPali Rohár port@3 { 18554c15ec3SPali Rohár reg = <3>; 18654c15ec3SPali Rohár label = "lan3"; 18754c15ec3SPali Rohár }; 18854c15ec3SPali Rohár 18954c15ec3SPali Rohár port@4 { 19054c15ec3SPali Rohár reg = <4>; 19154c15ec3SPali Rohár label = "lan2"; 19254c15ec3SPali Rohár }; 19354c15ec3SPali Rohár 19454c15ec3SPali Rohár port@5 { 19554c15ec3SPali Rohár reg = <5>; 19654c15ec3SPali Rohár label = "lan1"; 19754c15ec3SPali Rohár }; 19854c15ec3SPali Rohár 19954c15ec3SPali Rohár port@6 { 20054c15ec3SPali Rohár reg = <6>; 2018bf056f5SPali Rohár label = "cpu"; 20254c15ec3SPali Rohár ethernet = <&enet0>; 20354c15ec3SPali Rohár phy-mode = "rgmii-id"; 20454c15ec3SPali Rohár 20554c15ec3SPali Rohár fixed-link { 20654c15ec3SPali Rohár speed = <1000>; 20754c15ec3SPali Rohár full-duplex; 20854c15ec3SPali Rohár }; 20954c15ec3SPali Rohár }; 21054c15ec3SPali Rohár }; 21154c15ec3SPali Rohár }; 21254c15ec3SPali Rohár }; 21354c15ec3SPali Rohár 21454c15ec3SPali Rohár ptp_clock@24e00 { 21554c15ec3SPali Rohár fsl,tclk-period = <5>; 21654c15ec3SPali Rohár fsl,tmr-prsc = <200>; 21754c15ec3SPali Rohár fsl,tmr-add = <0xcccccccd>; 21854c15ec3SPali Rohár fsl,tmr-fiper1 = <0x3b9ac9fb>; 21954c15ec3SPali Rohár fsl,tmr-fiper2 = <0x0001869b>; 22054c15ec3SPali Rohár fsl,max-adj = <249999999>; 22154c15ec3SPali Rohár }; 22254c15ec3SPali Rohár 22354c15ec3SPali Rohár enet1: ethernet@25000 { 22454c15ec3SPali Rohár /* Connected to port 0 of QCA8337N-AL3C switch */ 22554c15ec3SPali Rohár phy-connection-type = "rgmii-id"; 22654c15ec3SPali Rohár 22754c15ec3SPali Rohár fixed-link { 22854c15ec3SPali Rohár speed = <1000>; 22954c15ec3SPali Rohár full-duplex; 23054c15ec3SPali Rohár }; 23154c15ec3SPali Rohár }; 23254c15ec3SPali Rohár 23354c15ec3SPali Rohár mdio@25520 { 23454c15ec3SPali Rohár status = "disabled"; 23554c15ec3SPali Rohár }; 23654c15ec3SPali Rohár 23754c15ec3SPali Rohár enet2: ethernet@26000 { 23854c15ec3SPali Rohár /* Connected to KSZ9031RNXCA ethernet phy (WAN port) */ 23954c15ec3SPali Rohár label = "wan"; 24054c15ec3SPali Rohár phy-handle = <&phy>; 24154c15ec3SPali Rohár phy-connection-type = "rgmii-id"; 24254c15ec3SPali Rohár }; 24354c15ec3SPali Rohár 24454c15ec3SPali Rohár mdio@26520 { 24554c15ec3SPali Rohár status = "disabled"; 24654c15ec3SPali Rohár }; 24754c15ec3SPali Rohár 24854c15ec3SPali Rohár sdhc@2e000 { 24954c15ec3SPali Rohár bus-width = <4>; 25054c15ec3SPali Rohár cd-gpios = <&gpio 8 GPIO_ACTIVE_LOW>; 25154c15ec3SPali Rohár }; 25254c15ec3SPali Rohár }; 25354c15ec3SPali Rohár 25454c15ec3SPali Rohár lbc: localbus@ffe05000 { 25554c15ec3SPali Rohár reg = <0 0xffe05000 0 0x1000>; 25654c15ec3SPali Rohár 25754c15ec3SPali Rohár ranges = <0x0 0x0 0x0 0xef000000 0x01000000>, /* NOR */ 25854c15ec3SPali Rohár <0x1 0x0 0x0 0xff800000 0x00040000>, /* NAND */ 25954c15ec3SPali Rohár <0x3 0x0 0x0 0xffa00000 0x00020000>; /* CPLD */ 26054c15ec3SPali Rohár 26154c15ec3SPali Rohár /* S29GL128P90TFIR10 NOR */ 26254c15ec3SPali Rohár nor@0,0 { 26354c15ec3SPali Rohár compatible = "cfi-flash"; 26454c15ec3SPali Rohár reg = <0x0 0x0 0x01000000>; 26554c15ec3SPali Rohár bank-width = <2>; 26654c15ec3SPali Rohár device-width = <1>; 26754c15ec3SPali Rohár 26854c15ec3SPali Rohár partitions { 26954c15ec3SPali Rohár compatible = "fixed-partitions"; 27054c15ec3SPali Rohár #address-cells = <1>; 27154c15ec3SPali Rohár #size-cells = <1>; 27254c15ec3SPali Rohár 27354c15ec3SPali Rohár partition@0 { 27454c15ec3SPali Rohár /* 128 kB for Device Tree Blob */ 27554c15ec3SPali Rohár reg = <0x00000000 0x00020000>; 27654c15ec3SPali Rohár label = "dtb"; 27754c15ec3SPali Rohár }; 27854c15ec3SPali Rohár 27954c15ec3SPali Rohár partition@20000 { 280c9986f0aSPali Rohár /* 1.7 MB for Linux Kernel Image */ 28154c15ec3SPali Rohár reg = <0x00020000 0x001a0000>; 282c9986f0aSPali Rohár label = "kernel"; 28354c15ec3SPali Rohár }; 28454c15ec3SPali Rohár 28554c15ec3SPali Rohár partition@1c0000 { 28654c15ec3SPali Rohár /* 1.5 MB for Rescue JFFS2 Root File System */ 28754c15ec3SPali Rohár reg = <0x001c0000 0x00180000>; 288c9986f0aSPali Rohár label = "rescue"; 28954c15ec3SPali Rohár }; 29054c15ec3SPali Rohár 29154c15ec3SPali Rohár partition@340000 { 292c9986f0aSPali Rohár /* 11 MB for TAR.XZ Archive with Factory content of NAND Root File System */ 29354c15ec3SPali Rohár reg = <0x00340000 0x00b00000>; 294c9986f0aSPali Rohár label = "factory"; 29554c15ec3SPali Rohár }; 29654c15ec3SPali Rohár 29754c15ec3SPali Rohár partition@e40000 { 29854c15ec3SPali Rohár /* 768 kB for Certificates JFFS2 File System */ 29954c15ec3SPali Rohár reg = <0x00e40000 0x000c0000>; 30054c15ec3SPali Rohár label = "certificates"; 30154c15ec3SPali Rohár }; 30254c15ec3SPali Rohár 30354c15ec3SPali Rohár /* free unused space 0x00f00000-0x00f20000 */ 30454c15ec3SPali Rohár 30554c15ec3SPali Rohár partition@f20000 { 30654c15ec3SPali Rohár /* 128 kB for U-Boot Environment Variables */ 30754c15ec3SPali Rohár reg = <0x00f20000 0x00020000>; 30854c15ec3SPali Rohár label = "u-boot-env"; 30954c15ec3SPali Rohár }; 31054c15ec3SPali Rohár 31154c15ec3SPali Rohár partition@f40000 { 31254c15ec3SPali Rohár /* 768 kB for U-Boot Bootloader Image */ 31354c15ec3SPali Rohár reg = <0x00f40000 0x000c0000>; 31454c15ec3SPali Rohár label = "u-boot"; 31554c15ec3SPali Rohár }; 31654c15ec3SPali Rohár }; 31754c15ec3SPali Rohár }; 31854c15ec3SPali Rohár 31954c15ec3SPali Rohár /* MT29F2G08ABAEAWP:E NAND */ 32054c15ec3SPali Rohár nand@1,0 { 32154c15ec3SPali Rohár compatible = "fsl,p2020-fcm-nand", "fsl,elbc-fcm-nand"; 32254c15ec3SPali Rohár reg = <0x1 0x0 0x00040000>; 32354c15ec3SPali Rohár nand-ecc-mode = "soft"; 32454c15ec3SPali Rohár nand-ecc-algo = "bch"; 32554c15ec3SPali Rohár 32654c15ec3SPali Rohár partitions { 32754c15ec3SPali Rohár compatible = "fixed-partitions"; 32854c15ec3SPali Rohár #address-cells = <1>; 32954c15ec3SPali Rohár #size-cells = <1>; 33054c15ec3SPali Rohár 33154c15ec3SPali Rohár partition@0 { 33254c15ec3SPali Rohár /* 256 MB for UBI with one volume: UBIFS Root File System */ 33354c15ec3SPali Rohár reg = <0x00000000 0x10000000>; 33454c15ec3SPali Rohár label = "rootfs"; 33554c15ec3SPali Rohár }; 33654c15ec3SPali Rohár }; 33754c15ec3SPali Rohár }; 33854c15ec3SPali Rohár 33954c15ec3SPali Rohár /* LCMXO1200C-3FTN256C FPGA */ 34054c15ec3SPali Rohár cpld@3,0 { 34154c15ec3SPali Rohár /* 34254c15ec3SPali Rohár * Turris CPLD firmware which runs on this Lattice FPGA, 34354c15ec3SPali Rohár * is extended version of P1021RDB-PC CPLD v4.1 firmware. 34454c15ec3SPali Rohár * It is backward compatible with its original version 34554c15ec3SPali Rohár * and the only extension is support for Turris LEDs. 34654c15ec3SPali Rohár * Turris CPLD firmware is open source and available at: 34754c15ec3SPali Rohár * https://gitlab.nic.cz/turris/hw/turris_cpld/-/blob/master/CZ_NIC_Router_CPLD.v 34854c15ec3SPali Rohár */ 3490531a4abSPali Rohár compatible = "cznic,turris1x-cpld", "fsl,p1021rdb-pc-cpld", "simple-bus", "syscon"; 35054c15ec3SPali Rohár reg = <0x3 0x0 0x30>; 35154c15ec3SPali Rohár #address-cells = <1>; 35254c15ec3SPali Rohár #size-cells = <1>; 35354c15ec3SPali Rohár ranges = <0x0 0x3 0x0 0x00020000>; 35454c15ec3SPali Rohár 35554c15ec3SPali Rohár /* MAX6370KA+T watchdog */ 35654c15ec3SPali Rohár watchdog@2 { 35754c15ec3SPali Rohár /* 35854c15ec3SPali Rohár * CPLD firmware maps SET0, SET1 and SET2 35954c15ec3SPali Rohár * input logic of MAX6370KA+T chip to CPLD 36054c15ec3SPali Rohár * memory space at byte offset 0x2. WDI 36154c15ec3SPali Rohár * input logic is outside of the CPLD and 36254c15ec3SPali Rohár * connected via external GPIO. 36354c15ec3SPali Rohár */ 36454c15ec3SPali Rohár compatible = "maxim,max6370"; 36554c15ec3SPali Rohár reg = <0x02 0x01>; 36654c15ec3SPali Rohár gpios = <&gpio 11 GPIO_ACTIVE_LOW>; 36754c15ec3SPali Rohár }; 36854c15ec3SPali Rohár 3690531a4abSPali Rohár reboot@d { 370bec46462SPali Rohár /* 371bec46462SPali Rohár * CPLD firmware which manages system reset and 372bec46462SPali Rohár * watchdog registers has bugs. It does not 373bec46462SPali Rohár * autoclear system reset register after change 374bec46462SPali Rohár * and watchdog ignores reset line on immediate 375bec46462SPali Rohár * succeeding reset cycle triggered by watchdog. 376bec46462SPali Rohár * These bugs have to be workarounded in U-Boot 377bec46462SPali Rohár * bootloader. So use system reset via syscon as 378bec46462SPali Rohár * a last resort because older U-Boot versions 379bec46462SPali Rohár * do not have workaround for watchdog. 380bec46462SPali Rohár * 381bec46462SPali Rohár * Reset method via rstcr's global-utilities 382bec46462SPali Rohár * (the preferred one) has priority level 128, 383bec46462SPali Rohár * watchdog has priority level 0 and default 384bec46462SPali Rohár * syscon-reboot priority level is 192. 385bec46462SPali Rohár * 386bec46462SPali Rohár * So define syscon-reboot with custom priority 387bec46462SPali Rohár * level 64 (between rstcr and watchdog) because 388bec46462SPali Rohár * rstcr should stay as default preferred reset 389bec46462SPali Rohár * method and reset via watchdog is more broken 390bec46462SPali Rohár * than system reset via syscon. 391bec46462SPali Rohár */ 3920531a4abSPali Rohár compatible = "syscon-reboot"; 3930531a4abSPali Rohár reg = <0x0d 0x01>; 3940531a4abSPali Rohár offset = <0x0d>; 3950531a4abSPali Rohár mask = <0x01>; 3960531a4abSPali Rohár value = <0x01>; 397bec46462SPali Rohár priority = <64>; 3980531a4abSPali Rohár }; 3990531a4abSPali Rohár 40054c15ec3SPali Rohár led-controller@13 { 40154c15ec3SPali Rohár /* 40254c15ec3SPali Rohár * LEDs are controlled by CPLD firmware. 40354c15ec3SPali Rohár * All five LAN LEDs share common RGB settings 40454c15ec3SPali Rohár * and so it is not possible to set different 40554c15ec3SPali Rohár * colors on different LAN ports. 40654c15ec3SPali Rohár */ 40754c15ec3SPali Rohár compatible = "cznic,turris1x-leds"; 40854c15ec3SPali Rohár reg = <0x13 0x1d>; 40954c15ec3SPali Rohár #address-cells = <1>; 41054c15ec3SPali Rohár #size-cells = <0>; 41154c15ec3SPali Rohár 41254c15ec3SPali Rohár multi-led@0 { 41354c15ec3SPali Rohár reg = <0x0>; 41454c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 41554c15ec3SPali Rohár function = LED_FUNCTION_WAN; 41654c15ec3SPali Rohár }; 41754c15ec3SPali Rohár 41854c15ec3SPali Rohár multi-led@1 { 41954c15ec3SPali Rohár reg = <0x1>; 42054c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 42154c15ec3SPali Rohár function = LED_FUNCTION_LAN; 42254c15ec3SPali Rohár function-enumerator = <5>; 42354c15ec3SPali Rohár }; 42454c15ec3SPali Rohár 42554c15ec3SPali Rohár multi-led@2 { 42654c15ec3SPali Rohár reg = <0x2>; 42754c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 42854c15ec3SPali Rohár function = LED_FUNCTION_LAN; 42954c15ec3SPali Rohár function-enumerator = <4>; 43054c15ec3SPali Rohár }; 43154c15ec3SPali Rohár 43254c15ec3SPali Rohár multi-led@3 { 43354c15ec3SPali Rohár reg = <0x3>; 43454c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 43554c15ec3SPali Rohár function = LED_FUNCTION_LAN; 43654c15ec3SPali Rohár function-enumerator = <3>; 43754c15ec3SPali Rohár }; 43854c15ec3SPali Rohár 43954c15ec3SPali Rohár multi-led@4 { 44054c15ec3SPali Rohár reg = <0x4>; 44154c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 44254c15ec3SPali Rohár function = LED_FUNCTION_LAN; 44354c15ec3SPali Rohár function-enumerator = <2>; 44454c15ec3SPali Rohár }; 44554c15ec3SPali Rohár 44654c15ec3SPali Rohár multi-led@5 { 44754c15ec3SPali Rohár reg = <0x5>; 44854c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 44954c15ec3SPali Rohár function = LED_FUNCTION_LAN; 45054c15ec3SPali Rohár function-enumerator = <1>; 45154c15ec3SPali Rohár }; 45254c15ec3SPali Rohár 45354c15ec3SPali Rohár multi-led@6 { 45454c15ec3SPali Rohár reg = <0x6>; 45554c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 45654c15ec3SPali Rohár function = LED_FUNCTION_WLAN; 45754c15ec3SPali Rohár }; 45854c15ec3SPali Rohár 45954c15ec3SPali Rohár multi-led@7 { 46054c15ec3SPali Rohár reg = <0x7>; 46154c15ec3SPali Rohár color = <LED_COLOR_ID_RGB>; 46254c15ec3SPali Rohár function = LED_FUNCTION_POWER; 46354c15ec3SPali Rohár }; 46454c15ec3SPali Rohár }; 46554c15ec3SPali Rohár }; 46654c15ec3SPali Rohár }; 46754c15ec3SPali Rohár 46854c15ec3SPali Rohár pci2: pcie@ffe08000 { 46954c15ec3SPali Rohár /* 47054c15ec3SPali Rohár * PCIe bus for on-board TUSB7340RKM USB 3.0 xHCI controller. 47154c15ec3SPali Rohár * This xHCI controller is available only on Turris 1.1 boards. 47254c15ec3SPali Rohár * Turris 1.0 boards have nothing connected to this PCIe bus, 47354c15ec3SPali Rohár * so system would see only PCIe Root Port of this PCIe Root 47454c15ec3SPali Rohár * Complex. TUSB7340RKM xHCI controller has four SuperSpeed 47554c15ec3SPali Rohár * channels. Channel 0 is connected to the front USB 3.0 port, 47654c15ec3SPali Rohár * channel 1 (but only USB 2.0 subset) to USB 2.0 pins on mPCIe 47754c15ec3SPali Rohár * slot 1 (CN5), channels 2 and 3 to connector P600. 47854c15ec3SPali Rohár * 47954c15ec3SPali Rohár * P2020 PCIe Root Port uses 1MB of PCIe MEM and xHCI controller 48054c15ec3SPali Rohár * uses 64kB + 8kB of PCIe MEM. No PCIe IO is used or required. 48154c15ec3SPali Rohár * So allocate 2MB of PCIe MEM for this PCIe bus. 48254c15ec3SPali Rohár */ 48354c15ec3SPali Rohár reg = <0 0xffe08000 0 0x1000>; 48454c15ec3SPali Rohár ranges = <0x02000000 0x0 0xc0000000 0 0xc0000000 0x0 0x00200000>, /* MEM */ 48554c15ec3SPali Rohár <0x01000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; /* IO */ 48654c15ec3SPali Rohár 48754c15ec3SPali Rohár pcie@0 { 48854c15ec3SPali Rohár ranges; 48954c15ec3SPali Rohár }; 49054c15ec3SPali Rohár }; 49154c15ec3SPali Rohár 49254c15ec3SPali Rohár pci1: pcie@ffe09000 { 49354c15ec3SPali Rohár /* PCIe bus on mPCIe slot 2 (CN6) for expansion mPCIe card */ 49454c15ec3SPali Rohár reg = <0 0xffe09000 0 0x1000>; 49554c15ec3SPali Rohár ranges = <0x02000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000>, /* MEM */ 49654c15ec3SPali Rohár <0x01000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; /* IO */ 49754c15ec3SPali Rohár 49854c15ec3SPali Rohár pcie@0 { 49954c15ec3SPali Rohár ranges; 50054c15ec3SPali Rohár }; 50154c15ec3SPali Rohár }; 50254c15ec3SPali Rohár 50354c15ec3SPali Rohár pci0: pcie@ffe0a000 { 50454c15ec3SPali Rohár /* 50554c15ec3SPali Rohár * PCIe bus on mPCIe slot 1 (CN5) for expansion mPCIe card. 50654c15ec3SPali Rohár * Turris 1.1 boards have in this mPCIe slot additional USB 2.0 50754c15ec3SPali Rohár * pins via channel 1 of TUSB7340RKM xHCI controller and also 50854c15ec3SPali Rohár * additional SIM card slot, both for USB-based WWAN cards. 50954c15ec3SPali Rohár */ 51054c15ec3SPali Rohár reg = <0 0xffe0a000 0 0x1000>; 51154c15ec3SPali Rohár ranges = <0x02000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000>, /* MEM */ 51254c15ec3SPali Rohár <0x01000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>; /* IO */ 51354c15ec3SPali Rohár 51454c15ec3SPali Rohár pcie@0 { 51554c15ec3SPali Rohár ranges; 51654c15ec3SPali Rohár }; 51754c15ec3SPali Rohár }; 51854c15ec3SPali Rohár}; 51954c15ec3SPali Rohár 52054c15ec3SPali Rohár/include/ "fsl/p2020si-post.dtsi" 521