1/* 2 * TQM 8560 Device Tree Source 3 * 4 * Copyright 2008 Freescale Semiconductor Inc. 5 * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 */ 12 13/dts-v1/; 14 15/ { 16 model = "tqc,tqm8560"; 17 compatible = "tqc,tqm8560"; 18 #address-cells = <1>; 19 #size-cells = <1>; 20 21 aliases { 22 ethernet0 = &enet0; 23 ethernet1 = &enet1; 24 ethernet2 = &enet2; 25 serial0 = &serial0; 26 serial1 = &serial1; 27 pci0 = &pci0; 28 }; 29 30 cpus { 31 #address-cells = <1>; 32 #size-cells = <0>; 33 34 PowerPC,8560@0 { 35 device_type = "cpu"; 36 reg = <0>; 37 d-cache-line-size = <32>; 38 i-cache-line-size = <32>; 39 d-cache-size = <32768>; 40 i-cache-size = <32768>; 41 timebase-frequency = <0>; 42 bus-frequency = <0>; 43 clock-frequency = <0>; 44 next-level-cache = <&L2>; 45 }; 46 }; 47 48 memory { 49 device_type = "memory"; 50 reg = <0x00000000 0x10000000>; 51 }; 52 53 soc@e0000000 { 54 #address-cells = <1>; 55 #size-cells = <1>; 56 device_type = "soc"; 57 ranges = <0x0 0xe0000000 0x100000>; 58 reg = <0xe0000000 0x200>; 59 bus-frequency = <0>; 60 compatible = "fsl,mpc8560-immr", "simple-bus"; 61 62 ecm-law@0 { 63 compatible = "fsl,ecm-law"; 64 reg = <0x0 0x1000>; 65 fsl,num-laws = <8>; 66 }; 67 68 ecm@1000 { 69 compatible = "fsl,mpc8560-ecm", "fsl,ecm"; 70 reg = <0x1000 0x1000>; 71 interrupts = <17 2>; 72 interrupt-parent = <&mpic>; 73 }; 74 75 memory-controller@2000 { 76 compatible = "fsl,mpc8540-memory-controller"; 77 reg = <0x2000 0x1000>; 78 interrupt-parent = <&mpic>; 79 interrupts = <18 2>; 80 }; 81 82 L2: l2-cache-controller@20000 { 83 compatible = "fsl,mpc8540-l2-cache-controller"; 84 reg = <0x20000 0x1000>; 85 cache-line-size = <32>; 86 cache-size = <0x40000>; // L2, 256K 87 interrupt-parent = <&mpic>; 88 interrupts = <16 2>; 89 }; 90 91 i2c@3000 { 92 #address-cells = <1>; 93 #size-cells = <0>; 94 cell-index = <0>; 95 compatible = "fsl-i2c"; 96 reg = <0x3000 0x100>; 97 interrupts = <43 2>; 98 interrupt-parent = <&mpic>; 99 dfsrr; 100 101 dtt@48 { 102 compatible = "national,lm75"; 103 reg = <0x48>; 104 }; 105 106 rtc@68 { 107 compatible = "dallas,ds1337"; 108 reg = <0x68>; 109 }; 110 }; 111 112 dma@21300 { 113 #address-cells = <1>; 114 #size-cells = <1>; 115 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; 116 reg = <0x21300 0x4>; 117 ranges = <0x0 0x21100 0x200>; 118 cell-index = <0>; 119 dma-channel@0 { 120 compatible = "fsl,mpc8560-dma-channel", 121 "fsl,eloplus-dma-channel"; 122 reg = <0x0 0x80>; 123 cell-index = <0>; 124 interrupt-parent = <&mpic>; 125 interrupts = <20 2>; 126 }; 127 dma-channel@80 { 128 compatible = "fsl,mpc8560-dma-channel", 129 "fsl,eloplus-dma-channel"; 130 reg = <0x80 0x80>; 131 cell-index = <1>; 132 interrupt-parent = <&mpic>; 133 interrupts = <21 2>; 134 }; 135 dma-channel@100 { 136 compatible = "fsl,mpc8560-dma-channel", 137 "fsl,eloplus-dma-channel"; 138 reg = <0x100 0x80>; 139 cell-index = <2>; 140 interrupt-parent = <&mpic>; 141 interrupts = <22 2>; 142 }; 143 dma-channel@180 { 144 compatible = "fsl,mpc8560-dma-channel", 145 "fsl,eloplus-dma-channel"; 146 reg = <0x180 0x80>; 147 cell-index = <3>; 148 interrupt-parent = <&mpic>; 149 interrupts = <23 2>; 150 }; 151 }; 152 153 enet0: ethernet@24000 { 154 #address-cells = <1>; 155 #size-cells = <1>; 156 cell-index = <0>; 157 device_type = "network"; 158 model = "TSEC"; 159 compatible = "gianfar"; 160 reg = <0x24000 0x1000>; 161 ranges = <0x0 0x24000 0x1000>; 162 local-mac-address = [ 00 00 00 00 00 00 ]; 163 interrupts = <29 2 30 2 34 2>; 164 interrupt-parent = <&mpic>; 165 tbi-handle = <&tbi0>; 166 phy-handle = <&phy2>; 167 168 mdio@520 { 169 #address-cells = <1>; 170 #size-cells = <0>; 171 compatible = "fsl,gianfar-mdio"; 172 reg = <0x520 0x20>; 173 174 phy1: ethernet-phy@1 { 175 interrupt-parent = <&mpic>; 176 interrupts = <8 1>; 177 reg = <1>; 178 device_type = "ethernet-phy"; 179 }; 180 phy2: ethernet-phy@2 { 181 interrupt-parent = <&mpic>; 182 interrupts = <8 1>; 183 reg = <2>; 184 device_type = "ethernet-phy"; 185 }; 186 phy3: ethernet-phy@3 { 187 interrupt-parent = <&mpic>; 188 interrupts = <8 1>; 189 reg = <3>; 190 device_type = "ethernet-phy"; 191 }; 192 tbi0: tbi-phy@11 { 193 reg = <0x11>; 194 device_type = "tbi-phy"; 195 }; 196 }; 197 }; 198 199 enet1: ethernet@25000 { 200 #address-cells = <1>; 201 #size-cells = <1>; 202 cell-index = <1>; 203 device_type = "network"; 204 model = "TSEC"; 205 compatible = "gianfar"; 206 reg = <0x25000 0x1000>; 207 ranges = <0x0 0x25000 0x1000>; 208 local-mac-address = [ 00 00 00 00 00 00 ]; 209 interrupts = <35 2 36 2 40 2>; 210 interrupt-parent = <&mpic>; 211 tbi-handle = <&tbi1>; 212 phy-handle = <&phy1>; 213 214 mdio@520 { 215 #address-cells = <1>; 216 #size-cells = <0>; 217 compatible = "fsl,gianfar-tbi"; 218 reg = <0x520 0x20>; 219 220 tbi1: tbi-phy@11 { 221 reg = <0x11>; 222 device_type = "tbi-phy"; 223 }; 224 }; 225 }; 226 227 mpic: pic@40000 { 228 interrupt-controller; 229 #address-cells = <0>; 230 #interrupt-cells = <2>; 231 reg = <0x40000 0x40000>; 232 device_type = "open-pic"; 233 compatible = "chrp,open-pic"; 234 }; 235 236 cpm@919c0 { 237 #address-cells = <1>; 238 #size-cells = <1>; 239 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; 240 reg = <0x919c0 0x30>; 241 ranges; 242 243 muram@80000 { 244 #address-cells = <1>; 245 #size-cells = <1>; 246 ranges = <0 0x80000 0x10000>; 247 248 data@0 { 249 compatible = "fsl,cpm-muram-data"; 250 reg = <0 0x4000 0x9000 0x2000>; 251 }; 252 }; 253 254 brg@919f0 { 255 compatible = "fsl,mpc8560-brg", 256 "fsl,cpm2-brg", 257 "fsl,cpm-brg"; 258 reg = <0x919f0 0x10 0x915f0 0x10>; 259 clock-frequency = <0>; 260 }; 261 262 cpmpic: pic@90c00 { 263 interrupt-controller; 264 #address-cells = <0>; 265 #interrupt-cells = <2>; 266 interrupts = <46 2>; 267 interrupt-parent = <&mpic>; 268 reg = <0x90c00 0x80>; 269 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 270 }; 271 272 serial0: serial@91a00 { 273 device_type = "serial"; 274 compatible = "fsl,mpc8560-scc-uart", 275 "fsl,cpm2-scc-uart"; 276 reg = <0x91a00 0x20 0x88000 0x100>; 277 fsl,cpm-brg = <1>; 278 fsl,cpm-command = <0x800000>; 279 current-speed = <115200>; 280 interrupts = <40 8>; 281 interrupt-parent = <&cpmpic>; 282 }; 283 284 serial1: serial@91a20 { 285 device_type = "serial"; 286 compatible = "fsl,mpc8560-scc-uart", 287 "fsl,cpm2-scc-uart"; 288 reg = <0x91a20 0x20 0x88100 0x100>; 289 fsl,cpm-brg = <2>; 290 fsl,cpm-command = <0x4a00000>; 291 current-speed = <115200>; 292 interrupts = <41 8>; 293 interrupt-parent = <&cpmpic>; 294 }; 295 296 enet2: ethernet@91340 { 297 device_type = "network"; 298 compatible = "fsl,mpc8560-fcc-enet", 299 "fsl,cpm2-fcc-enet"; 300 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; 301 local-mac-address = [ 00 00 00 00 00 00 ]; 302 fsl,cpm-command = <0x1a400300>; 303 interrupts = <34 8>; 304 interrupt-parent = <&cpmpic>; 305 phy-handle = <&phy3>; 306 }; 307 }; 308 }; 309 310 localbus@e0005000 { 311 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus", 312 "simple-bus"; 313 #address-cells = <2>; 314 #size-cells = <1>; 315 reg = <0xe0005000 0x100>; // BRx, ORx, etc. 316 317 ranges = < 318 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 319 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 320 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) 321 >; 322 323 flash@1,0 { 324 #address-cells = <1>; 325 #size-cells = <1>; 326 compatible = "cfi-flash"; 327 reg = <1 0x0 0x8000000>; 328 bank-width = <4>; 329 device-width = <1>; 330 331 partition@0 { 332 label = "kernel"; 333 reg = <0x00000000 0x00200000>; 334 }; 335 partition@200000 { 336 label = "root"; 337 reg = <0x00200000 0x00300000>; 338 }; 339 partition@500000 { 340 label = "user"; 341 reg = <0x00500000 0x07a00000>; 342 }; 343 partition@7f00000 { 344 label = "env1"; 345 reg = <0x07f00000 0x00040000>; 346 }; 347 partition@7f40000 { 348 label = "env2"; 349 reg = <0x07f40000 0x00040000>; 350 }; 351 partition@7f80000 { 352 label = "u-boot"; 353 reg = <0x07f80000 0x00080000>; 354 read-only; 355 }; 356 }; 357 358 /* Note: CAN support needs be enabled in U-Boot */ 359 can0@2,0 { 360 compatible = "intel,82527"; // Bosch CC770 361 reg = <2 0x0 0x100>; 362 interrupts = <4 1>; 363 interrupt-parent = <&mpic>; 364 }; 365 366 can1@2,100 { 367 compatible = "intel,82527"; // Bosch CC770 368 reg = <2 0x100 0x100>; 369 interrupts = <4 1>; 370 interrupt-parent = <&mpic>; 371 }; 372 }; 373 374 pci0: pci@e0008000 { 375 #interrupt-cells = <1>; 376 #size-cells = <2>; 377 #address-cells = <3>; 378 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 379 device_type = "pci"; 380 reg = <0xe0008000 0x1000>; 381 clock-frequency = <66666666>; 382 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 383 interrupt-map = < 384 /* IDSEL 28 */ 385 0xe000 0 0 1 &mpic 2 1 386 0xe000 0 0 2 &mpic 3 1>; 387 388 interrupt-parent = <&mpic>; 389 interrupts = <24 2>; 390 bus-range = <0 0>; 391 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 392 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; 393 }; 394}; 395