1/*
2 * TQM 8560 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com>
6 *
7 * This program is free software; you can redistribute  it and/or modify it
8 * under  the terms of  the GNU General  Public License as published by the
9 * Free Software Foundation;  either version 2 of the  License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14
15/ {
16	model = "tqc,tqm8560";
17	compatible = "tqc,tqm8560";
18	#address-cells = <1>;
19	#size-cells = <1>;
20
21	aliases {
22		ethernet0 = &enet0;
23		ethernet1 = &enet1;
24		ethernet2 = &enet2;
25		serial0 = &serial0;
26		serial1 = &serial1;
27		pci0 = &pci0;
28	};
29
30	cpus {
31		#address-cells = <1>;
32		#size-cells = <0>;
33
34		PowerPC,8560@0 {
35			device_type = "cpu";
36			reg = <0>;
37			d-cache-line-size = <32>;
38			i-cache-line-size = <32>;
39			d-cache-size = <32768>;
40			i-cache-size = <32768>;
41			timebase-frequency = <0>;
42			bus-frequency = <0>;
43			clock-frequency = <0>;
44			next-level-cache = <&L2>;
45		};
46	};
47
48	memory {
49		device_type = "memory";
50		reg = <0x00000000 0x10000000>;
51	};
52
53	soc@e0000000 {
54		#address-cells = <1>;
55		#size-cells = <1>;
56		device_type = "soc";
57		ranges = <0x0 0xe0000000 0x100000>;
58		reg = <0xe0000000 0x200>;
59		bus-frequency = <0>;
60		compatible = "fsl,mpc8560-immr", "simple-bus";
61
62		memory-controller@2000 {
63			compatible = "fsl,8540-memory-controller";
64			reg = <0x2000 0x1000>;
65			interrupt-parent = <&mpic>;
66			interrupts = <18 2>;
67		};
68
69		L2: l2-cache-controller@20000 {
70			compatible = "fsl,8540-l2-cache-controller";
71			reg = <0x20000 0x1000>;
72			cache-line-size = <32>;
73			cache-size = <0x40000>;	// L2, 256K
74			interrupt-parent = <&mpic>;
75			interrupts = <16 2>;
76		};
77
78		i2c@3000 {
79			#address-cells = <1>;
80			#size-cells = <0>;
81			cell-index = <0>;
82			compatible = "fsl-i2c";
83			reg = <0x3000 0x100>;
84			interrupts = <43 2>;
85			interrupt-parent = <&mpic>;
86			dfsrr;
87
88			rtc@68 {
89				compatible = "dallas,ds1337";
90				reg = <0x68>;
91			};
92		};
93
94		dma@21300 {
95			#address-cells = <1>;
96			#size-cells = <1>;
97			compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
98			reg = <0x21300 0x4>;
99			ranges = <0x0 0x21100 0x200>;
100			cell-index = <0>;
101			dma-channel@0 {
102				compatible = "fsl,mpc8560-dma-channel",
103						"fsl,eloplus-dma-channel";
104				reg = <0x0 0x80>;
105				cell-index = <0>;
106				interrupt-parent = <&mpic>;
107				interrupts = <20 2>;
108			};
109			dma-channel@80 {
110				compatible = "fsl,mpc8560-dma-channel",
111						"fsl,eloplus-dma-channel";
112				reg = <0x80 0x80>;
113				cell-index = <1>;
114				interrupt-parent = <&mpic>;
115				interrupts = <21 2>;
116			};
117			dma-channel@100 {
118				compatible = "fsl,mpc8560-dma-channel",
119						"fsl,eloplus-dma-channel";
120				reg = <0x100 0x80>;
121				cell-index = <2>;
122				interrupt-parent = <&mpic>;
123				interrupts = <22 2>;
124			};
125			dma-channel@180 {
126				compatible = "fsl,mpc8560-dma-channel",
127						"fsl,eloplus-dma-channel";
128				reg = <0x180 0x80>;
129				cell-index = <3>;
130				interrupt-parent = <&mpic>;
131				interrupts = <23 2>;
132			};
133		};
134
135		mdio@24520 {
136			#address-cells = <1>;
137			#size-cells = <0>;
138			compatible = "fsl,gianfar-mdio";
139			reg = <0x24520 0x20>;
140
141			phy1: ethernet-phy@1 {
142				interrupt-parent = <&mpic>;
143				interrupts = <8 1>;
144				reg = <1>;
145				device_type = "ethernet-phy";
146			};
147			phy2: ethernet-phy@2 {
148				interrupt-parent = <&mpic>;
149				interrupts = <8 1>;
150				reg = <2>;
151				device_type = "ethernet-phy";
152			};
153			phy3: ethernet-phy@3 {
154				interrupt-parent = <&mpic>;
155				interrupts = <8 1>;
156				reg = <3>;
157				device_type = "ethernet-phy";
158			};
159			tbi0: tbi-phy@11 {
160				reg = <0x11>;
161				device_type = "tbi-phy";
162			};
163		};
164
165		mdio@25520 {
166			#address-cells = <1>;
167			#size-cells = <0>;
168			compatible = "fsl,gianfar-tbi";
169			reg = <0x25520 0x20>;
170
171			tbi1: tbi-phy@11 {
172				reg = <0x11>;
173				device_type = "tbi-phy";
174			};
175		};
176
177		enet0: ethernet@24000 {
178			cell-index = <0>;
179			device_type = "network";
180			model = "TSEC";
181			compatible = "gianfar";
182			reg = <0x24000 0x1000>;
183			local-mac-address = [ 00 00 00 00 00 00 ];
184			interrupts = <29 2 30 2 34 2>;
185			interrupt-parent = <&mpic>;
186			tbi-handle = <&tbi0>;
187			phy-handle = <&phy2>;
188		};
189
190		enet1: ethernet@25000 {
191			cell-index = <1>;
192			device_type = "network";
193			model = "TSEC";
194			compatible = "gianfar";
195			reg = <0x25000 0x1000>;
196			local-mac-address = [ 00 00 00 00 00 00 ];
197			interrupts = <35 2 36 2 40 2>;
198			interrupt-parent = <&mpic>;
199			tbi-handle = <&tbi1>;
200			phy-handle = <&phy1>;
201		};
202
203		mpic: pic@40000 {
204			interrupt-controller;
205			#address-cells = <0>;
206			#interrupt-cells = <2>;
207			reg = <0x40000 0x40000>;
208			device_type = "open-pic";
209			compatible = "chrp,open-pic";
210		};
211
212		cpm@919c0 {
213			#address-cells = <1>;
214			#size-cells = <1>;
215			compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
216			reg = <0x919c0 0x30>;
217			ranges;
218
219			muram@80000 {
220				#address-cells = <1>;
221				#size-cells = <1>;
222				ranges = <0 0x80000 0x10000>;
223
224				data@0 {
225					compatible = "fsl,cpm-muram-data";
226					reg = <0 0x4000 0x9000 0x2000>;
227				};
228			};
229
230			brg@919f0 {
231				compatible = "fsl,mpc8560-brg",
232				             "fsl,cpm2-brg",
233				             "fsl,cpm-brg";
234				reg = <0x919f0 0x10 0x915f0 0x10>;
235				clock-frequency = <0>;
236			};
237
238			cpmpic: pic@90c00 {
239				interrupt-controller;
240				#address-cells = <0>;
241				#interrupt-cells = <2>;
242				interrupts = <46 2>;
243				interrupt-parent = <&mpic>;
244				reg = <0x90c00 0x80>;
245				compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
246			};
247
248			serial0: serial@91a00 {
249				device_type = "serial";
250				compatible = "fsl,mpc8560-scc-uart",
251				             "fsl,cpm2-scc-uart";
252				reg = <0x91a00 0x20 0x88000 0x100>;
253				fsl,cpm-brg = <1>;
254				fsl,cpm-command = <0x800000>;
255				current-speed = <115200>;
256				interrupts = <40 8>;
257				interrupt-parent = <&cpmpic>;
258			};
259
260			serial1: serial@91a20 {
261				device_type = "serial";
262				compatible = "fsl,mpc8560-scc-uart",
263				             "fsl,cpm2-scc-uart";
264				reg = <0x91a20 0x20 0x88100 0x100>;
265				fsl,cpm-brg = <2>;
266				fsl,cpm-command = <0x4a00000>;
267				current-speed = <115200>;
268				interrupts = <41 8>;
269				interrupt-parent = <&cpmpic>;
270			};
271
272			enet2: ethernet@91340 {
273				device_type = "network";
274				compatible = "fsl,mpc8560-fcc-enet",
275				             "fsl,cpm2-fcc-enet";
276				reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
277				local-mac-address = [ 00 00 00 00 00 00 ];
278				fsl,cpm-command = <0x1a400300>;
279				interrupts = <34 8>;
280				interrupt-parent = <&cpmpic>;
281				phy-handle = <&phy3>;
282			};
283		};
284	};
285
286	localbus@e0005000 {
287		compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
288			     "simple-bus";
289		#address-cells = <2>;
290		#size-cells = <1>;
291		reg = <0xe0005000 0x100>;	// BRx, ORx, etc.
292
293		ranges = <
294			0 0x0 0xfc000000 0x04000000	// NOR FLASH bank 1
295			1 0x0 0xf8000000 0x08000000	// NOR FLASH bank 0
296			2 0x0 0xe3000000 0x00008000	// CAN (2 x i82527)
297		>;
298
299		flash@1,0 {
300			#address-cells = <1>;
301			#size-cells = <1>;
302			compatible = "cfi-flash";
303			reg = <1 0x0 0x8000000>;
304			bank-width = <4>;
305			device-width = <1>;
306
307			partition@0 {
308				label = "kernel";
309				reg = <0x00000000 0x00200000>;
310			};
311			partition@200000 {
312				label = "root";
313				reg = <0x00200000 0x00300000>;
314			};
315			partition@500000 {
316				label = "user";
317				reg = <0x00500000 0x07a00000>;
318			};
319			partition@7f00000 {
320				label = "env1";
321				reg = <0x07f00000 0x00040000>;
322			};
323			partition@7f40000 {
324				label = "env2";
325				reg = <0x07f40000 0x00040000>;
326			};
327			partition@7f80000 {
328				label = "u-boot";
329				reg = <0x07f80000 0x00080000>;
330				read-only;
331			};
332		};
333
334		/* Note: CAN support needs be enabled in U-Boot */
335		can0@2,0 {
336			compatible = "intel,82527"; // Bosch CC770
337			reg = <2 0x0 0x100>;
338			interrupts = <4 0>;
339			interrupt-parent = <&mpic>;
340		};
341
342		can1@2,100 {
343			compatible = "intel,82527"; // Bosch CC770
344			reg = <2 0x100 0x100>;
345			interrupts = <4 0>;
346			interrupt-parent = <&mpic>;
347		};
348	};
349
350	pci0: pci@e0008000 {
351		cell-index = <0>;
352		#interrupt-cells = <1>;
353		#size-cells = <2>;
354		#address-cells = <3>;
355		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
356		device_type = "pci";
357		reg = <0xe0008000 0x1000>;
358		clock-frequency = <66666666>;
359		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
360		interrupt-map = <
361				/* IDSEL 28 */
362				 0xe000 0 0 1 &mpic 2 1
363				 0xe000 0 0 2 &mpic 3 1>;
364
365		interrupt-parent = <&mpic>;
366		interrupts = <24 2>;
367		bus-range = <0 0>;
368		ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
369			  0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
370	};
371};
372