10052bc5dSKumar Gala/* 20052bc5dSKumar Gala * TQM 8560 Device Tree Source 30052bc5dSKumar Gala * 40052bc5dSKumar Gala * Copyright 2008 Freescale Semiconductor Inc. 55399be7fSWolfgang Grandegger * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com> 60052bc5dSKumar Gala * 70052bc5dSKumar Gala * This program is free software; you can redistribute it and/or modify it 80052bc5dSKumar Gala * under the terms of the GNU General Public License as published by the 90052bc5dSKumar Gala * Free Software Foundation; either version 2 of the License, or (at your 100052bc5dSKumar Gala * option) any later version. 110052bc5dSKumar Gala */ 120052bc5dSKumar Gala 130052bc5dSKumar Gala/dts-v1/; 140052bc5dSKumar Gala 150052bc5dSKumar Gala/ { 164fb035f6SWolfgang Grandegger model = "tqc,tqm8560"; 174fb035f6SWolfgang Grandegger compatible = "tqc,tqm8560"; 180052bc5dSKumar Gala #address-cells = <1>; 190052bc5dSKumar Gala #size-cells = <1>; 200052bc5dSKumar Gala 210052bc5dSKumar Gala aliases { 220052bc5dSKumar Gala ethernet0 = &enet0; 230052bc5dSKumar Gala ethernet1 = &enet1; 240052bc5dSKumar Gala ethernet2 = &enet2; 250052bc5dSKumar Gala serial0 = &serial0; 260052bc5dSKumar Gala serial1 = &serial1; 270052bc5dSKumar Gala pci0 = &pci0; 280052bc5dSKumar Gala }; 290052bc5dSKumar Gala 300052bc5dSKumar Gala cpus { 310052bc5dSKumar Gala #address-cells = <1>; 320052bc5dSKumar Gala #size-cells = <0>; 330052bc5dSKumar Gala 340052bc5dSKumar Gala PowerPC,8560@0 { 350052bc5dSKumar Gala device_type = "cpu"; 360052bc5dSKumar Gala reg = <0>; 370052bc5dSKumar Gala d-cache-line-size = <32>; 380052bc5dSKumar Gala i-cache-line-size = <32>; 390052bc5dSKumar Gala d-cache-size = <32768>; 400052bc5dSKumar Gala i-cache-size = <32768>; 410052bc5dSKumar Gala timebase-frequency = <0>; 420052bc5dSKumar Gala bus-frequency = <0>; 430052bc5dSKumar Gala clock-frequency = <0>; 44c054065bSKumar Gala next-level-cache = <&L2>; 450052bc5dSKumar Gala }; 460052bc5dSKumar Gala }; 470052bc5dSKumar Gala 480052bc5dSKumar Gala memory { 490052bc5dSKumar Gala device_type = "memory"; 500052bc5dSKumar Gala reg = <0x00000000 0x10000000>; 510052bc5dSKumar Gala }; 520052bc5dSKumar Gala 53f67be814SKumar Gala soc@e0000000 { 540052bc5dSKumar Gala #address-cells = <1>; 550052bc5dSKumar Gala #size-cells = <1>; 560052bc5dSKumar Gala device_type = "soc"; 570052bc5dSKumar Gala ranges = <0x0 0xe0000000 0x100000>; 580052bc5dSKumar Gala reg = <0xe0000000 0x200>; 590052bc5dSKumar Gala bus-frequency = <0>; 600052bc5dSKumar Gala compatible = "fsl,mpc8560-immr", "simple-bus"; 610052bc5dSKumar Gala 620052bc5dSKumar Gala memory-controller@2000 { 630052bc5dSKumar Gala compatible = "fsl,8540-memory-controller"; 640052bc5dSKumar Gala reg = <0x2000 0x1000>; 650052bc5dSKumar Gala interrupt-parent = <&mpic>; 660052bc5dSKumar Gala interrupts = <18 2>; 670052bc5dSKumar Gala }; 680052bc5dSKumar Gala 69c054065bSKumar Gala L2: l2-cache-controller@20000 { 700052bc5dSKumar Gala compatible = "fsl,8540-l2-cache-controller"; 710052bc5dSKumar Gala reg = <0x20000 0x1000>; 720052bc5dSKumar Gala cache-line-size = <32>; 730052bc5dSKumar Gala cache-size = <0x40000>; // L2, 256K 740052bc5dSKumar Gala interrupt-parent = <&mpic>; 750052bc5dSKumar Gala interrupts = <16 2>; 760052bc5dSKumar Gala }; 770052bc5dSKumar Gala 780052bc5dSKumar Gala i2c@3000 { 790052bc5dSKumar Gala #address-cells = <1>; 800052bc5dSKumar Gala #size-cells = <0>; 810052bc5dSKumar Gala cell-index = <0>; 820052bc5dSKumar Gala compatible = "fsl-i2c"; 830052bc5dSKumar Gala reg = <0x3000 0x100>; 840052bc5dSKumar Gala interrupts = <43 2>; 850052bc5dSKumar Gala interrupt-parent = <&mpic>; 860052bc5dSKumar Gala dfsrr; 870052bc5dSKumar Gala 880052bc5dSKumar Gala rtc@68 { 890052bc5dSKumar Gala compatible = "dallas,ds1337"; 900052bc5dSKumar Gala reg = <0x68>; 910052bc5dSKumar Gala }; 920052bc5dSKumar Gala }; 930052bc5dSKumar Gala 94dee80553SKumar Gala dma@21300 { 95dee80553SKumar Gala #address-cells = <1>; 96dee80553SKumar Gala #size-cells = <1>; 97dee80553SKumar Gala compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; 98dee80553SKumar Gala reg = <0x21300 0x4>; 99dee80553SKumar Gala ranges = <0x0 0x21100 0x200>; 100dee80553SKumar Gala cell-index = <0>; 101dee80553SKumar Gala dma-channel@0 { 102dee80553SKumar Gala compatible = "fsl,mpc8560-dma-channel", 103dee80553SKumar Gala "fsl,eloplus-dma-channel"; 104dee80553SKumar Gala reg = <0x0 0x80>; 105dee80553SKumar Gala cell-index = <0>; 106dee80553SKumar Gala interrupt-parent = <&mpic>; 107dee80553SKumar Gala interrupts = <20 2>; 108dee80553SKumar Gala }; 109dee80553SKumar Gala dma-channel@80 { 110dee80553SKumar Gala compatible = "fsl,mpc8560-dma-channel", 111dee80553SKumar Gala "fsl,eloplus-dma-channel"; 112dee80553SKumar Gala reg = <0x80 0x80>; 113dee80553SKumar Gala cell-index = <1>; 114dee80553SKumar Gala interrupt-parent = <&mpic>; 115dee80553SKumar Gala interrupts = <21 2>; 116dee80553SKumar Gala }; 117dee80553SKumar Gala dma-channel@100 { 118dee80553SKumar Gala compatible = "fsl,mpc8560-dma-channel", 119dee80553SKumar Gala "fsl,eloplus-dma-channel"; 120dee80553SKumar Gala reg = <0x100 0x80>; 121dee80553SKumar Gala cell-index = <2>; 122dee80553SKumar Gala interrupt-parent = <&mpic>; 123dee80553SKumar Gala interrupts = <22 2>; 124dee80553SKumar Gala }; 125dee80553SKumar Gala dma-channel@180 { 126dee80553SKumar Gala compatible = "fsl,mpc8560-dma-channel", 127dee80553SKumar Gala "fsl,eloplus-dma-channel"; 128dee80553SKumar Gala reg = <0x180 0x80>; 129dee80553SKumar Gala cell-index = <3>; 130dee80553SKumar Gala interrupt-parent = <&mpic>; 131dee80553SKumar Gala interrupts = <23 2>; 132dee80553SKumar Gala }; 133dee80553SKumar Gala }; 134dee80553SKumar Gala 1350052bc5dSKumar Gala mdio@24520 { 1360052bc5dSKumar Gala #address-cells = <1>; 1370052bc5dSKumar Gala #size-cells = <0>; 1380052bc5dSKumar Gala compatible = "fsl,gianfar-mdio"; 1390052bc5dSKumar Gala reg = <0x24520 0x20>; 1400052bc5dSKumar Gala 1410052bc5dSKumar Gala phy1: ethernet-phy@1 { 1420052bc5dSKumar Gala interrupt-parent = <&mpic>; 1430052bc5dSKumar Gala interrupts = <8 1>; 1440052bc5dSKumar Gala reg = <1>; 1450052bc5dSKumar Gala device_type = "ethernet-phy"; 1460052bc5dSKumar Gala }; 1470052bc5dSKumar Gala phy2: ethernet-phy@2 { 1480052bc5dSKumar Gala interrupt-parent = <&mpic>; 1490052bc5dSKumar Gala interrupts = <8 1>; 1500052bc5dSKumar Gala reg = <2>; 1510052bc5dSKumar Gala device_type = "ethernet-phy"; 1520052bc5dSKumar Gala }; 1530052bc5dSKumar Gala phy3: ethernet-phy@3 { 1540052bc5dSKumar Gala interrupt-parent = <&mpic>; 1550052bc5dSKumar Gala interrupts = <8 1>; 1560052bc5dSKumar Gala reg = <3>; 1570052bc5dSKumar Gala device_type = "ethernet-phy"; 1580052bc5dSKumar Gala }; 159b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 160b31a1d8bSAndy Fleming reg = <0x11>; 161b31a1d8bSAndy Fleming device_type = "tbi-phy"; 162b31a1d8bSAndy Fleming }; 163b31a1d8bSAndy Fleming }; 164b31a1d8bSAndy Fleming 165b31a1d8bSAndy Fleming mdio@25520 { 166b31a1d8bSAndy Fleming #address-cells = <1>; 167b31a1d8bSAndy Fleming #size-cells = <0>; 168b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 169b31a1d8bSAndy Fleming reg = <0x25520 0x20>; 170b31a1d8bSAndy Fleming 171b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 172b31a1d8bSAndy Fleming reg = <0x11>; 173b31a1d8bSAndy Fleming device_type = "tbi-phy"; 174b31a1d8bSAndy Fleming }; 1750052bc5dSKumar Gala }; 1760052bc5dSKumar Gala 1770052bc5dSKumar Gala enet0: ethernet@24000 { 1780052bc5dSKumar Gala cell-index = <0>; 1790052bc5dSKumar Gala device_type = "network"; 1800052bc5dSKumar Gala model = "TSEC"; 1810052bc5dSKumar Gala compatible = "gianfar"; 1820052bc5dSKumar Gala reg = <0x24000 0x1000>; 1830052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 1840052bc5dSKumar Gala interrupts = <29 2 30 2 34 2>; 1850052bc5dSKumar Gala interrupt-parent = <&mpic>; 186b31a1d8bSAndy Fleming tbi-handle = <&tbi0>; 1870052bc5dSKumar Gala phy-handle = <&phy2>; 1880052bc5dSKumar Gala }; 1890052bc5dSKumar Gala 1900052bc5dSKumar Gala enet1: ethernet@25000 { 1910052bc5dSKumar Gala cell-index = <1>; 1920052bc5dSKumar Gala device_type = "network"; 1930052bc5dSKumar Gala model = "TSEC"; 1940052bc5dSKumar Gala compatible = "gianfar"; 1950052bc5dSKumar Gala reg = <0x25000 0x1000>; 1960052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 1970052bc5dSKumar Gala interrupts = <35 2 36 2 40 2>; 1980052bc5dSKumar Gala interrupt-parent = <&mpic>; 199b31a1d8bSAndy Fleming tbi-handle = <&tbi1>; 2000052bc5dSKumar Gala phy-handle = <&phy1>; 2010052bc5dSKumar Gala }; 2020052bc5dSKumar Gala 2030052bc5dSKumar Gala mpic: pic@40000 { 2040052bc5dSKumar Gala interrupt-controller; 2050052bc5dSKumar Gala #address-cells = <0>; 2060052bc5dSKumar Gala #interrupt-cells = <2>; 2070052bc5dSKumar Gala reg = <0x40000 0x40000>; 2080052bc5dSKumar Gala device_type = "open-pic"; 209acd4b715SKumar Gala compatible = "chrp,open-pic"; 2100052bc5dSKumar Gala }; 2110052bc5dSKumar Gala 2120052bc5dSKumar Gala cpm@919c0 { 2130052bc5dSKumar Gala #address-cells = <1>; 2140052bc5dSKumar Gala #size-cells = <1>; 2150052bc5dSKumar Gala compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; 2160052bc5dSKumar Gala reg = <0x919c0 0x30>; 2170052bc5dSKumar Gala ranges; 2180052bc5dSKumar Gala 2190052bc5dSKumar Gala muram@80000 { 2200052bc5dSKumar Gala #address-cells = <1>; 2210052bc5dSKumar Gala #size-cells = <1>; 2220052bc5dSKumar Gala ranges = <0 0x80000 0x10000>; 2230052bc5dSKumar Gala 2240052bc5dSKumar Gala data@0 { 2250052bc5dSKumar Gala compatible = "fsl,cpm-muram-data"; 2260052bc5dSKumar Gala reg = <0 0x4000 0x9000 0x2000>; 2270052bc5dSKumar Gala }; 2280052bc5dSKumar Gala }; 2290052bc5dSKumar Gala 2300052bc5dSKumar Gala brg@919f0 { 2310052bc5dSKumar Gala compatible = "fsl,mpc8560-brg", 2320052bc5dSKumar Gala "fsl,cpm2-brg", 2330052bc5dSKumar Gala "fsl,cpm-brg"; 2340052bc5dSKumar Gala reg = <0x919f0 0x10 0x915f0 0x10>; 2350052bc5dSKumar Gala clock-frequency = <0>; 2360052bc5dSKumar Gala }; 2370052bc5dSKumar Gala 2380052bc5dSKumar Gala cpmpic: pic@90c00 { 2390052bc5dSKumar Gala interrupt-controller; 2400052bc5dSKumar Gala #address-cells = <0>; 2410052bc5dSKumar Gala #interrupt-cells = <2>; 2420052bc5dSKumar Gala interrupts = <46 2>; 2430052bc5dSKumar Gala interrupt-parent = <&mpic>; 2440052bc5dSKumar Gala reg = <0x90c00 0x80>; 2450052bc5dSKumar Gala compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 2460052bc5dSKumar Gala }; 2470052bc5dSKumar Gala 2480052bc5dSKumar Gala serial0: serial@91a00 { 2490052bc5dSKumar Gala device_type = "serial"; 2500052bc5dSKumar Gala compatible = "fsl,mpc8560-scc-uart", 2510052bc5dSKumar Gala "fsl,cpm2-scc-uart"; 2520052bc5dSKumar Gala reg = <0x91a00 0x20 0x88000 0x100>; 2530052bc5dSKumar Gala fsl,cpm-brg = <1>; 2540052bc5dSKumar Gala fsl,cpm-command = <0x800000>; 2550052bc5dSKumar Gala current-speed = <115200>; 2560052bc5dSKumar Gala interrupts = <40 8>; 2570052bc5dSKumar Gala interrupt-parent = <&cpmpic>; 2580052bc5dSKumar Gala }; 2590052bc5dSKumar Gala 2600052bc5dSKumar Gala serial1: serial@91a20 { 2610052bc5dSKumar Gala device_type = "serial"; 2620052bc5dSKumar Gala compatible = "fsl,mpc8560-scc-uart", 2630052bc5dSKumar Gala "fsl,cpm2-scc-uart"; 2640052bc5dSKumar Gala reg = <0x91a20 0x20 0x88100 0x100>; 2650052bc5dSKumar Gala fsl,cpm-brg = <2>; 2660052bc5dSKumar Gala fsl,cpm-command = <0x4a00000>; 2670052bc5dSKumar Gala current-speed = <115200>; 2680052bc5dSKumar Gala interrupts = <41 8>; 2690052bc5dSKumar Gala interrupt-parent = <&cpmpic>; 2700052bc5dSKumar Gala }; 2710052bc5dSKumar Gala 2720052bc5dSKumar Gala enet2: ethernet@91340 { 2730052bc5dSKumar Gala device_type = "network"; 2740052bc5dSKumar Gala compatible = "fsl,mpc8560-fcc-enet", 2750052bc5dSKumar Gala "fsl,cpm2-fcc-enet"; 2760052bc5dSKumar Gala reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; 2770052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 2780052bc5dSKumar Gala fsl,cpm-command = <0x1a400300>; 2790052bc5dSKumar Gala interrupts = <34 8>; 2800052bc5dSKumar Gala interrupt-parent = <&cpmpic>; 2810052bc5dSKumar Gala phy-handle = <&phy3>; 2820052bc5dSKumar Gala }; 2830052bc5dSKumar Gala }; 2840052bc5dSKumar Gala }; 2850052bc5dSKumar Gala 2865399be7fSWolfgang Grandegger localbus@e0005000 { 2875399be7fSWolfgang Grandegger compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus", 2885399be7fSWolfgang Grandegger "simple-bus"; 2895399be7fSWolfgang Grandegger #address-cells = <2>; 2905399be7fSWolfgang Grandegger #size-cells = <1>; 2915399be7fSWolfgang Grandegger reg = <0xe0005000 0x100>; // BRx, ORx, etc. 2925399be7fSWolfgang Grandegger 2935399be7fSWolfgang Grandegger ranges = < 2945399be7fSWolfgang Grandegger 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 2955399be7fSWolfgang Grandegger 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 2965399be7fSWolfgang Grandegger 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) 2975399be7fSWolfgang Grandegger >; 2985399be7fSWolfgang Grandegger 2995399be7fSWolfgang Grandegger flash@1,0 { 3005399be7fSWolfgang Grandegger #address-cells = <1>; 3015399be7fSWolfgang Grandegger #size-cells = <1>; 3025399be7fSWolfgang Grandegger compatible = "cfi-flash"; 3035399be7fSWolfgang Grandegger reg = <1 0x0 0x8000000>; 3045399be7fSWolfgang Grandegger bank-width = <4>; 3055399be7fSWolfgang Grandegger device-width = <1>; 3065399be7fSWolfgang Grandegger 3075399be7fSWolfgang Grandegger partition@0 { 3085399be7fSWolfgang Grandegger label = "kernel"; 3095399be7fSWolfgang Grandegger reg = <0x00000000 0x00200000>; 3105399be7fSWolfgang Grandegger }; 3115399be7fSWolfgang Grandegger partition@200000 { 3125399be7fSWolfgang Grandegger label = "root"; 3135399be7fSWolfgang Grandegger reg = <0x00200000 0x00300000>; 3145399be7fSWolfgang Grandegger }; 3155399be7fSWolfgang Grandegger partition@500000 { 3165399be7fSWolfgang Grandegger label = "user"; 3175399be7fSWolfgang Grandegger reg = <0x00500000 0x07a00000>; 3185399be7fSWolfgang Grandegger }; 3195399be7fSWolfgang Grandegger partition@7f00000 { 3205399be7fSWolfgang Grandegger label = "env1"; 3215399be7fSWolfgang Grandegger reg = <0x07f00000 0x00040000>; 3225399be7fSWolfgang Grandegger }; 3235399be7fSWolfgang Grandegger partition@7f40000 { 3245399be7fSWolfgang Grandegger label = "env2"; 3255399be7fSWolfgang Grandegger reg = <0x07f40000 0x00040000>; 3265399be7fSWolfgang Grandegger }; 3275399be7fSWolfgang Grandegger partition@7f80000 { 3285399be7fSWolfgang Grandegger label = "u-boot"; 3295399be7fSWolfgang Grandegger reg = <0x07f80000 0x00080000>; 3305399be7fSWolfgang Grandegger read-only; 3315399be7fSWolfgang Grandegger }; 3325399be7fSWolfgang Grandegger }; 3335399be7fSWolfgang Grandegger 3345399be7fSWolfgang Grandegger /* Note: CAN support needs be enabled in U-Boot */ 3355399be7fSWolfgang Grandegger can0@2,0 { 3365399be7fSWolfgang Grandegger compatible = "intel,82527"; // Bosch CC770 3375399be7fSWolfgang Grandegger reg = <2 0x0 0x100>; 3387a385241SWolfgang Grandegger interrupts = <4 1>; 3395399be7fSWolfgang Grandegger interrupt-parent = <&mpic>; 3405399be7fSWolfgang Grandegger }; 3415399be7fSWolfgang Grandegger 3425399be7fSWolfgang Grandegger can1@2,100 { 3435399be7fSWolfgang Grandegger compatible = "intel,82527"; // Bosch CC770 3445399be7fSWolfgang Grandegger reg = <2 0x100 0x100>; 3457a385241SWolfgang Grandegger interrupts = <4 1>; 3465399be7fSWolfgang Grandegger interrupt-parent = <&mpic>; 3475399be7fSWolfgang Grandegger }; 3485399be7fSWolfgang Grandegger }; 3495399be7fSWolfgang Grandegger 3500052bc5dSKumar Gala pci0: pci@e0008000 { 3510052bc5dSKumar Gala cell-index = <0>; 3520052bc5dSKumar Gala #interrupt-cells = <1>; 3530052bc5dSKumar Gala #size-cells = <2>; 3540052bc5dSKumar Gala #address-cells = <3>; 3550052bc5dSKumar Gala compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 3560052bc5dSKumar Gala device_type = "pci"; 3570052bc5dSKumar Gala reg = <0xe0008000 0x1000>; 3580052bc5dSKumar Gala clock-frequency = <66666666>; 3590052bc5dSKumar Gala interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 3600052bc5dSKumar Gala interrupt-map = < 3610052bc5dSKumar Gala /* IDSEL 28 */ 3620052bc5dSKumar Gala 0xe000 0 0 1 &mpic 2 1 3630052bc5dSKumar Gala 0xe000 0 0 2 &mpic 3 1>; 3640052bc5dSKumar Gala 3650052bc5dSKumar Gala interrupt-parent = <&mpic>; 3660052bc5dSKumar Gala interrupts = <24 2>; 3670052bc5dSKumar Gala bus-range = <0 0>; 3680052bc5dSKumar Gala ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 3690052bc5dSKumar Gala 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; 3700052bc5dSKumar Gala }; 3710052bc5dSKumar Gala}; 372