10052bc5dSKumar Gala/* 20052bc5dSKumar Gala * TQM 8560 Device Tree Source 30052bc5dSKumar Gala * 40052bc5dSKumar Gala * Copyright 2008 Freescale Semiconductor Inc. 55399be7fSWolfgang Grandegger * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com> 60052bc5dSKumar Gala * 70052bc5dSKumar Gala * This program is free software; you can redistribute it and/or modify it 80052bc5dSKumar Gala * under the terms of the GNU General Public License as published by the 90052bc5dSKumar Gala * Free Software Foundation; either version 2 of the License, or (at your 100052bc5dSKumar Gala * option) any later version. 110052bc5dSKumar Gala */ 120052bc5dSKumar Gala 130052bc5dSKumar Gala/dts-v1/; 140052bc5dSKumar Gala 150052bc5dSKumar Gala/ { 164fb035f6SWolfgang Grandegger model = "tqc,tqm8560"; 174fb035f6SWolfgang Grandegger compatible = "tqc,tqm8560"; 180052bc5dSKumar Gala #address-cells = <1>; 190052bc5dSKumar Gala #size-cells = <1>; 200052bc5dSKumar Gala 210052bc5dSKumar Gala aliases { 220052bc5dSKumar Gala ethernet0 = &enet0; 230052bc5dSKumar Gala ethernet1 = &enet1; 240052bc5dSKumar Gala ethernet2 = &enet2; 250052bc5dSKumar Gala serial0 = &serial0; 260052bc5dSKumar Gala serial1 = &serial1; 270052bc5dSKumar Gala pci0 = &pci0; 280052bc5dSKumar Gala }; 290052bc5dSKumar Gala 300052bc5dSKumar Gala cpus { 310052bc5dSKumar Gala #address-cells = <1>; 320052bc5dSKumar Gala #size-cells = <0>; 330052bc5dSKumar Gala 340052bc5dSKumar Gala PowerPC,8560@0 { 350052bc5dSKumar Gala device_type = "cpu"; 360052bc5dSKumar Gala reg = <0>; 370052bc5dSKumar Gala d-cache-line-size = <32>; 380052bc5dSKumar Gala i-cache-line-size = <32>; 390052bc5dSKumar Gala d-cache-size = <32768>; 400052bc5dSKumar Gala i-cache-size = <32768>; 410052bc5dSKumar Gala timebase-frequency = <0>; 420052bc5dSKumar Gala bus-frequency = <0>; 430052bc5dSKumar Gala clock-frequency = <0>; 44c054065bSKumar Gala next-level-cache = <&L2>; 450052bc5dSKumar Gala }; 460052bc5dSKumar Gala }; 470052bc5dSKumar Gala 480052bc5dSKumar Gala memory { 490052bc5dSKumar Gala device_type = "memory"; 500052bc5dSKumar Gala reg = <0x00000000 0x10000000>; 510052bc5dSKumar Gala }; 520052bc5dSKumar Gala 53f67be814SKumar Gala soc@e0000000 { 540052bc5dSKumar Gala #address-cells = <1>; 550052bc5dSKumar Gala #size-cells = <1>; 560052bc5dSKumar Gala device_type = "soc"; 570052bc5dSKumar Gala ranges = <0x0 0xe0000000 0x100000>; 580052bc5dSKumar Gala reg = <0xe0000000 0x200>; 590052bc5dSKumar Gala bus-frequency = <0>; 600052bc5dSKumar Gala compatible = "fsl,mpc8560-immr", "simple-bus"; 610052bc5dSKumar Gala 620052bc5dSKumar Gala memory-controller@2000 { 630052bc5dSKumar Gala compatible = "fsl,8540-memory-controller"; 640052bc5dSKumar Gala reg = <0x2000 0x1000>; 650052bc5dSKumar Gala interrupt-parent = <&mpic>; 660052bc5dSKumar Gala interrupts = <18 2>; 670052bc5dSKumar Gala }; 680052bc5dSKumar Gala 69c054065bSKumar Gala L2: l2-cache-controller@20000 { 700052bc5dSKumar Gala compatible = "fsl,8540-l2-cache-controller"; 710052bc5dSKumar Gala reg = <0x20000 0x1000>; 720052bc5dSKumar Gala cache-line-size = <32>; 730052bc5dSKumar Gala cache-size = <0x40000>; // L2, 256K 740052bc5dSKumar Gala interrupt-parent = <&mpic>; 750052bc5dSKumar Gala interrupts = <16 2>; 760052bc5dSKumar Gala }; 770052bc5dSKumar Gala 780052bc5dSKumar Gala i2c@3000 { 790052bc5dSKumar Gala #address-cells = <1>; 800052bc5dSKumar Gala #size-cells = <0>; 810052bc5dSKumar Gala cell-index = <0>; 820052bc5dSKumar Gala compatible = "fsl-i2c"; 830052bc5dSKumar Gala reg = <0x3000 0x100>; 840052bc5dSKumar Gala interrupts = <43 2>; 850052bc5dSKumar Gala interrupt-parent = <&mpic>; 860052bc5dSKumar Gala dfsrr; 870052bc5dSKumar Gala 880052bc5dSKumar Gala rtc@68 { 890052bc5dSKumar Gala compatible = "dallas,ds1337"; 900052bc5dSKumar Gala reg = <0x68>; 910052bc5dSKumar Gala }; 920052bc5dSKumar Gala }; 930052bc5dSKumar Gala 940052bc5dSKumar Gala mdio@24520 { 950052bc5dSKumar Gala #address-cells = <1>; 960052bc5dSKumar Gala #size-cells = <0>; 970052bc5dSKumar Gala compatible = "fsl,gianfar-mdio"; 980052bc5dSKumar Gala reg = <0x24520 0x20>; 990052bc5dSKumar Gala 1000052bc5dSKumar Gala phy1: ethernet-phy@1 { 1010052bc5dSKumar Gala interrupt-parent = <&mpic>; 1020052bc5dSKumar Gala interrupts = <8 1>; 1030052bc5dSKumar Gala reg = <1>; 1040052bc5dSKumar Gala device_type = "ethernet-phy"; 1050052bc5dSKumar Gala }; 1060052bc5dSKumar Gala phy2: ethernet-phy@2 { 1070052bc5dSKumar Gala interrupt-parent = <&mpic>; 1080052bc5dSKumar Gala interrupts = <8 1>; 1090052bc5dSKumar Gala reg = <2>; 1100052bc5dSKumar Gala device_type = "ethernet-phy"; 1110052bc5dSKumar Gala }; 1120052bc5dSKumar Gala phy3: ethernet-phy@3 { 1130052bc5dSKumar Gala interrupt-parent = <&mpic>; 1140052bc5dSKumar Gala interrupts = <8 1>; 1150052bc5dSKumar Gala reg = <3>; 1160052bc5dSKumar Gala device_type = "ethernet-phy"; 1170052bc5dSKumar Gala }; 1180052bc5dSKumar Gala }; 1190052bc5dSKumar Gala 1200052bc5dSKumar Gala enet0: ethernet@24000 { 1210052bc5dSKumar Gala cell-index = <0>; 1220052bc5dSKumar Gala device_type = "network"; 1230052bc5dSKumar Gala model = "TSEC"; 1240052bc5dSKumar Gala compatible = "gianfar"; 1250052bc5dSKumar Gala reg = <0x24000 0x1000>; 1260052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 1270052bc5dSKumar Gala interrupts = <29 2 30 2 34 2>; 1280052bc5dSKumar Gala interrupt-parent = <&mpic>; 1290052bc5dSKumar Gala phy-handle = <&phy2>; 1300052bc5dSKumar Gala }; 1310052bc5dSKumar Gala 1320052bc5dSKumar Gala enet1: ethernet@25000 { 1330052bc5dSKumar Gala cell-index = <1>; 1340052bc5dSKumar Gala device_type = "network"; 1350052bc5dSKumar Gala model = "TSEC"; 1360052bc5dSKumar Gala compatible = "gianfar"; 1370052bc5dSKumar Gala reg = <0x25000 0x1000>; 1380052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 1390052bc5dSKumar Gala interrupts = <35 2 36 2 40 2>; 1400052bc5dSKumar Gala interrupt-parent = <&mpic>; 1410052bc5dSKumar Gala phy-handle = <&phy1>; 1420052bc5dSKumar Gala }; 1430052bc5dSKumar Gala 1440052bc5dSKumar Gala mpic: pic@40000 { 1450052bc5dSKumar Gala interrupt-controller; 1460052bc5dSKumar Gala #address-cells = <0>; 1470052bc5dSKumar Gala #interrupt-cells = <2>; 1480052bc5dSKumar Gala reg = <0x40000 0x40000>; 1490052bc5dSKumar Gala device_type = "open-pic"; 150acd4b715SKumar Gala compatible = "chrp,open-pic"; 1510052bc5dSKumar Gala }; 1520052bc5dSKumar Gala 1530052bc5dSKumar Gala cpm@919c0 { 1540052bc5dSKumar Gala #address-cells = <1>; 1550052bc5dSKumar Gala #size-cells = <1>; 1560052bc5dSKumar Gala compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; 1570052bc5dSKumar Gala reg = <0x919c0 0x30>; 1580052bc5dSKumar Gala ranges; 1590052bc5dSKumar Gala 1600052bc5dSKumar Gala muram@80000 { 1610052bc5dSKumar Gala #address-cells = <1>; 1620052bc5dSKumar Gala #size-cells = <1>; 1630052bc5dSKumar Gala ranges = <0 0x80000 0x10000>; 1640052bc5dSKumar Gala 1650052bc5dSKumar Gala data@0 { 1660052bc5dSKumar Gala compatible = "fsl,cpm-muram-data"; 1670052bc5dSKumar Gala reg = <0 0x4000 0x9000 0x2000>; 1680052bc5dSKumar Gala }; 1690052bc5dSKumar Gala }; 1700052bc5dSKumar Gala 1710052bc5dSKumar Gala brg@919f0 { 1720052bc5dSKumar Gala compatible = "fsl,mpc8560-brg", 1730052bc5dSKumar Gala "fsl,cpm2-brg", 1740052bc5dSKumar Gala "fsl,cpm-brg"; 1750052bc5dSKumar Gala reg = <0x919f0 0x10 0x915f0 0x10>; 1760052bc5dSKumar Gala clock-frequency = <0>; 1770052bc5dSKumar Gala }; 1780052bc5dSKumar Gala 1790052bc5dSKumar Gala cpmpic: pic@90c00 { 1800052bc5dSKumar Gala interrupt-controller; 1810052bc5dSKumar Gala #address-cells = <0>; 1820052bc5dSKumar Gala #interrupt-cells = <2>; 1830052bc5dSKumar Gala interrupts = <46 2>; 1840052bc5dSKumar Gala interrupt-parent = <&mpic>; 1850052bc5dSKumar Gala reg = <0x90c00 0x80>; 1860052bc5dSKumar Gala compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 1870052bc5dSKumar Gala }; 1880052bc5dSKumar Gala 1890052bc5dSKumar Gala serial0: serial@91a00 { 1900052bc5dSKumar Gala device_type = "serial"; 1910052bc5dSKumar Gala compatible = "fsl,mpc8560-scc-uart", 1920052bc5dSKumar Gala "fsl,cpm2-scc-uart"; 1930052bc5dSKumar Gala reg = <0x91a00 0x20 0x88000 0x100>; 1940052bc5dSKumar Gala fsl,cpm-brg = <1>; 1950052bc5dSKumar Gala fsl,cpm-command = <0x800000>; 1960052bc5dSKumar Gala current-speed = <115200>; 1970052bc5dSKumar Gala interrupts = <40 8>; 1980052bc5dSKumar Gala interrupt-parent = <&cpmpic>; 1990052bc5dSKumar Gala }; 2000052bc5dSKumar Gala 2010052bc5dSKumar Gala serial1: serial@91a20 { 2020052bc5dSKumar Gala device_type = "serial"; 2030052bc5dSKumar Gala compatible = "fsl,mpc8560-scc-uart", 2040052bc5dSKumar Gala "fsl,cpm2-scc-uart"; 2050052bc5dSKumar Gala reg = <0x91a20 0x20 0x88100 0x100>; 2060052bc5dSKumar Gala fsl,cpm-brg = <2>; 2070052bc5dSKumar Gala fsl,cpm-command = <0x4a00000>; 2080052bc5dSKumar Gala current-speed = <115200>; 2090052bc5dSKumar Gala interrupts = <41 8>; 2100052bc5dSKumar Gala interrupt-parent = <&cpmpic>; 2110052bc5dSKumar Gala }; 2120052bc5dSKumar Gala 2130052bc5dSKumar Gala enet2: ethernet@91340 { 2140052bc5dSKumar Gala device_type = "network"; 2150052bc5dSKumar Gala compatible = "fsl,mpc8560-fcc-enet", 2160052bc5dSKumar Gala "fsl,cpm2-fcc-enet"; 2170052bc5dSKumar Gala reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; 2180052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 2190052bc5dSKumar Gala fsl,cpm-command = <0x1a400300>; 2200052bc5dSKumar Gala interrupts = <34 8>; 2210052bc5dSKumar Gala interrupt-parent = <&cpmpic>; 2220052bc5dSKumar Gala phy-handle = <&phy3>; 2230052bc5dSKumar Gala }; 2240052bc5dSKumar Gala }; 2250052bc5dSKumar Gala }; 2260052bc5dSKumar Gala 2275399be7fSWolfgang Grandegger localbus@e0005000 { 2285399be7fSWolfgang Grandegger compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus", 2295399be7fSWolfgang Grandegger "simple-bus"; 2305399be7fSWolfgang Grandegger #address-cells = <2>; 2315399be7fSWolfgang Grandegger #size-cells = <1>; 2325399be7fSWolfgang Grandegger reg = <0xe0005000 0x100>; // BRx, ORx, etc. 2335399be7fSWolfgang Grandegger 2345399be7fSWolfgang Grandegger ranges = < 2355399be7fSWolfgang Grandegger 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 2365399be7fSWolfgang Grandegger 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 2375399be7fSWolfgang Grandegger 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) 2385399be7fSWolfgang Grandegger >; 2395399be7fSWolfgang Grandegger 2405399be7fSWolfgang Grandegger flash@1,0 { 2415399be7fSWolfgang Grandegger #address-cells = <1>; 2425399be7fSWolfgang Grandegger #size-cells = <1>; 2435399be7fSWolfgang Grandegger compatible = "cfi-flash"; 2445399be7fSWolfgang Grandegger reg = <1 0x0 0x8000000>; 2455399be7fSWolfgang Grandegger bank-width = <4>; 2465399be7fSWolfgang Grandegger device-width = <1>; 2475399be7fSWolfgang Grandegger 2485399be7fSWolfgang Grandegger partition@0 { 2495399be7fSWolfgang Grandegger label = "kernel"; 2505399be7fSWolfgang Grandegger reg = <0x00000000 0x00200000>; 2515399be7fSWolfgang Grandegger }; 2525399be7fSWolfgang Grandegger partition@200000 { 2535399be7fSWolfgang Grandegger label = "root"; 2545399be7fSWolfgang Grandegger reg = <0x00200000 0x00300000>; 2555399be7fSWolfgang Grandegger }; 2565399be7fSWolfgang Grandegger partition@500000 { 2575399be7fSWolfgang Grandegger label = "user"; 2585399be7fSWolfgang Grandegger reg = <0x00500000 0x07a00000>; 2595399be7fSWolfgang Grandegger }; 2605399be7fSWolfgang Grandegger partition@7f00000 { 2615399be7fSWolfgang Grandegger label = "env1"; 2625399be7fSWolfgang Grandegger reg = <0x07f00000 0x00040000>; 2635399be7fSWolfgang Grandegger }; 2645399be7fSWolfgang Grandegger partition@7f40000 { 2655399be7fSWolfgang Grandegger label = "env2"; 2665399be7fSWolfgang Grandegger reg = <0x07f40000 0x00040000>; 2675399be7fSWolfgang Grandegger }; 2685399be7fSWolfgang Grandegger partition@7f80000 { 2695399be7fSWolfgang Grandegger label = "u-boot"; 2705399be7fSWolfgang Grandegger reg = <0x07f80000 0x00080000>; 2715399be7fSWolfgang Grandegger read-only; 2725399be7fSWolfgang Grandegger }; 2735399be7fSWolfgang Grandegger }; 2745399be7fSWolfgang Grandegger 2755399be7fSWolfgang Grandegger /* Note: CAN support needs be enabled in U-Boot */ 2765399be7fSWolfgang Grandegger can0@2,0 { 2775399be7fSWolfgang Grandegger compatible = "intel,82527"; // Bosch CC770 2785399be7fSWolfgang Grandegger reg = <2 0x0 0x100>; 2795399be7fSWolfgang Grandegger interrupts = <4 0>; 2805399be7fSWolfgang Grandegger interrupt-parent = <&mpic>; 2815399be7fSWolfgang Grandegger }; 2825399be7fSWolfgang Grandegger 2835399be7fSWolfgang Grandegger can1@2,100 { 2845399be7fSWolfgang Grandegger compatible = "intel,82527"; // Bosch CC770 2855399be7fSWolfgang Grandegger reg = <2 0x100 0x100>; 2865399be7fSWolfgang Grandegger interrupts = <4 0>; 2875399be7fSWolfgang Grandegger interrupt-parent = <&mpic>; 2885399be7fSWolfgang Grandegger }; 2895399be7fSWolfgang Grandegger }; 2905399be7fSWolfgang Grandegger 2910052bc5dSKumar Gala pci0: pci@e0008000 { 2920052bc5dSKumar Gala cell-index = <0>; 2930052bc5dSKumar Gala #interrupt-cells = <1>; 2940052bc5dSKumar Gala #size-cells = <2>; 2950052bc5dSKumar Gala #address-cells = <3>; 2960052bc5dSKumar Gala compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 2970052bc5dSKumar Gala device_type = "pci"; 2980052bc5dSKumar Gala reg = <0xe0008000 0x1000>; 2990052bc5dSKumar Gala clock-frequency = <66666666>; 3000052bc5dSKumar Gala interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 3010052bc5dSKumar Gala interrupt-map = < 3020052bc5dSKumar Gala /* IDSEL 28 */ 3030052bc5dSKumar Gala 0xe000 0 0 1 &mpic 2 1 3040052bc5dSKumar Gala 0xe000 0 0 2 &mpic 3 1>; 3050052bc5dSKumar Gala 3060052bc5dSKumar Gala interrupt-parent = <&mpic>; 3070052bc5dSKumar Gala interrupts = <24 2>; 3080052bc5dSKumar Gala bus-range = <0 0>; 3090052bc5dSKumar Gala ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 3100052bc5dSKumar Gala 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; 3110052bc5dSKumar Gala }; 3120052bc5dSKumar Gala}; 313