12874c5fdSThomas Gleixner// SPDX-License-Identifier: GPL-2.0-or-later 20052bc5dSKumar Gala/* 30052bc5dSKumar Gala * TQM 8560 Device Tree Source 40052bc5dSKumar Gala * 50052bc5dSKumar Gala * Copyright 2008 Freescale Semiconductor Inc. 65399be7fSWolfgang Grandegger * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com> 70052bc5dSKumar Gala */ 80052bc5dSKumar Gala 90052bc5dSKumar Gala/dts-v1/; 100052bc5dSKumar Gala 110052bc5dSKumar Gala/ { 124fb035f6SWolfgang Grandegger model = "tqc,tqm8560"; 134fb035f6SWolfgang Grandegger compatible = "tqc,tqm8560"; 140052bc5dSKumar Gala #address-cells = <1>; 150052bc5dSKumar Gala #size-cells = <1>; 160052bc5dSKumar Gala 170052bc5dSKumar Gala aliases { 180052bc5dSKumar Gala ethernet0 = &enet0; 190052bc5dSKumar Gala ethernet1 = &enet1; 200052bc5dSKumar Gala ethernet2 = &enet2; 210052bc5dSKumar Gala serial0 = &serial0; 220052bc5dSKumar Gala serial1 = &serial1; 230052bc5dSKumar Gala pci0 = &pci0; 240052bc5dSKumar Gala }; 250052bc5dSKumar Gala 260052bc5dSKumar Gala cpus { 270052bc5dSKumar Gala #address-cells = <1>; 280052bc5dSKumar Gala #size-cells = <0>; 290052bc5dSKumar Gala 300052bc5dSKumar Gala PowerPC,8560@0 { 310052bc5dSKumar Gala device_type = "cpu"; 320052bc5dSKumar Gala reg = <0>; 330052bc5dSKumar Gala d-cache-line-size = <32>; 340052bc5dSKumar Gala i-cache-line-size = <32>; 350052bc5dSKumar Gala d-cache-size = <32768>; 360052bc5dSKumar Gala i-cache-size = <32768>; 370052bc5dSKumar Gala timebase-frequency = <0>; 380052bc5dSKumar Gala bus-frequency = <0>; 390052bc5dSKumar Gala clock-frequency = <0>; 40c054065bSKumar Gala next-level-cache = <&L2>; 410052bc5dSKumar Gala }; 420052bc5dSKumar Gala }; 430052bc5dSKumar Gala 440052bc5dSKumar Gala memory { 450052bc5dSKumar Gala device_type = "memory"; 460052bc5dSKumar Gala reg = <0x00000000 0x10000000>; 470052bc5dSKumar Gala }; 480052bc5dSKumar Gala 49f67be814SKumar Gala soc@e0000000 { 500052bc5dSKumar Gala #address-cells = <1>; 510052bc5dSKumar Gala #size-cells = <1>; 520052bc5dSKumar Gala device_type = "soc"; 530052bc5dSKumar Gala ranges = <0x0 0xe0000000 0x100000>; 540052bc5dSKumar Gala bus-frequency = <0>; 550052bc5dSKumar Gala compatible = "fsl,mpc8560-immr", "simple-bus"; 560052bc5dSKumar Gala 57e1a22897SKumar Gala ecm-law@0 { 58e1a22897SKumar Gala compatible = "fsl,ecm-law"; 59e1a22897SKumar Gala reg = <0x0 0x1000>; 60e1a22897SKumar Gala fsl,num-laws = <8>; 61e1a22897SKumar Gala }; 62e1a22897SKumar Gala 63e1a22897SKumar Gala ecm@1000 { 64e1a22897SKumar Gala compatible = "fsl,mpc8560-ecm", "fsl,ecm"; 65e1a22897SKumar Gala reg = <0x1000 0x1000>; 66e1a22897SKumar Gala interrupts = <17 2>; 67e1a22897SKumar Gala interrupt-parent = <&mpic>; 68e1a22897SKumar Gala }; 69e1a22897SKumar Gala 700052bc5dSKumar Gala memory-controller@2000 { 71fe671772SKumar Gala compatible = "fsl,mpc8540-memory-controller"; 720052bc5dSKumar Gala reg = <0x2000 0x1000>; 730052bc5dSKumar Gala interrupt-parent = <&mpic>; 740052bc5dSKumar Gala interrupts = <18 2>; 750052bc5dSKumar Gala }; 760052bc5dSKumar Gala 77c054065bSKumar Gala L2: l2-cache-controller@20000 { 78fe671772SKumar Gala compatible = "fsl,mpc8540-l2-cache-controller"; 790052bc5dSKumar Gala reg = <0x20000 0x1000>; 800052bc5dSKumar Gala cache-line-size = <32>; 810052bc5dSKumar Gala cache-size = <0x40000>; // L2, 256K 820052bc5dSKumar Gala interrupt-parent = <&mpic>; 830052bc5dSKumar Gala interrupts = <16 2>; 840052bc5dSKumar Gala }; 850052bc5dSKumar Gala 860052bc5dSKumar Gala i2c@3000 { 870052bc5dSKumar Gala #address-cells = <1>; 880052bc5dSKumar Gala #size-cells = <0>; 890052bc5dSKumar Gala cell-index = <0>; 900052bc5dSKumar Gala compatible = "fsl-i2c"; 910052bc5dSKumar Gala reg = <0x3000 0x100>; 920052bc5dSKumar Gala interrupts = <43 2>; 930052bc5dSKumar Gala interrupt-parent = <&mpic>; 940052bc5dSKumar Gala dfsrr; 950052bc5dSKumar Gala 966467cae3SWolfgang Grandegger dtt@48 { 970f73a449SWolfgang Grandegger compatible = "national,lm75"; 986467cae3SWolfgang Grandegger reg = <0x48>; 990f73a449SWolfgang Grandegger }; 1000f73a449SWolfgang Grandegger 1010052bc5dSKumar Gala rtc@68 { 1020052bc5dSKumar Gala compatible = "dallas,ds1337"; 1030052bc5dSKumar Gala reg = <0x68>; 1040052bc5dSKumar Gala }; 1050052bc5dSKumar Gala }; 1060052bc5dSKumar Gala 107dee80553SKumar Gala dma@21300 { 108dee80553SKumar Gala #address-cells = <1>; 109dee80553SKumar Gala #size-cells = <1>; 110dee80553SKumar Gala compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; 111dee80553SKumar Gala reg = <0x21300 0x4>; 112dee80553SKumar Gala ranges = <0x0 0x21100 0x200>; 113dee80553SKumar Gala cell-index = <0>; 114dee80553SKumar Gala dma-channel@0 { 115dee80553SKumar Gala compatible = "fsl,mpc8560-dma-channel", 116dee80553SKumar Gala "fsl,eloplus-dma-channel"; 117dee80553SKumar Gala reg = <0x0 0x80>; 118dee80553SKumar Gala cell-index = <0>; 119dee80553SKumar Gala interrupt-parent = <&mpic>; 120dee80553SKumar Gala interrupts = <20 2>; 121dee80553SKumar Gala }; 122dee80553SKumar Gala dma-channel@80 { 123dee80553SKumar Gala compatible = "fsl,mpc8560-dma-channel", 124dee80553SKumar Gala "fsl,eloplus-dma-channel"; 125dee80553SKumar Gala reg = <0x80 0x80>; 126dee80553SKumar Gala cell-index = <1>; 127dee80553SKumar Gala interrupt-parent = <&mpic>; 128dee80553SKumar Gala interrupts = <21 2>; 129dee80553SKumar Gala }; 130dee80553SKumar Gala dma-channel@100 { 131dee80553SKumar Gala compatible = "fsl,mpc8560-dma-channel", 132dee80553SKumar Gala "fsl,eloplus-dma-channel"; 133dee80553SKumar Gala reg = <0x100 0x80>; 134dee80553SKumar Gala cell-index = <2>; 135dee80553SKumar Gala interrupt-parent = <&mpic>; 136dee80553SKumar Gala interrupts = <22 2>; 137dee80553SKumar Gala }; 138dee80553SKumar Gala dma-channel@180 { 139dee80553SKumar Gala compatible = "fsl,mpc8560-dma-channel", 140dee80553SKumar Gala "fsl,eloplus-dma-channel"; 141dee80553SKumar Gala reg = <0x180 0x80>; 142dee80553SKumar Gala cell-index = <3>; 143dee80553SKumar Gala interrupt-parent = <&mpic>; 144dee80553SKumar Gala interrupts = <23 2>; 145dee80553SKumar Gala }; 146dee80553SKumar Gala }; 147dee80553SKumar Gala 14884ba4a58SAnton Vorontsov enet0: ethernet@24000 { 14984ba4a58SAnton Vorontsov #address-cells = <1>; 15084ba4a58SAnton Vorontsov #size-cells = <1>; 15184ba4a58SAnton Vorontsov cell-index = <0>; 15284ba4a58SAnton Vorontsov device_type = "network"; 15384ba4a58SAnton Vorontsov model = "TSEC"; 15484ba4a58SAnton Vorontsov compatible = "gianfar"; 15584ba4a58SAnton Vorontsov reg = <0x24000 0x1000>; 15684ba4a58SAnton Vorontsov ranges = <0x0 0x24000 0x1000>; 15784ba4a58SAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 15884ba4a58SAnton Vorontsov interrupts = <29 2 30 2 34 2>; 15984ba4a58SAnton Vorontsov interrupt-parent = <&mpic>; 16084ba4a58SAnton Vorontsov tbi-handle = <&tbi0>; 16184ba4a58SAnton Vorontsov phy-handle = <&phy2>; 16284ba4a58SAnton Vorontsov 16384ba4a58SAnton Vorontsov mdio@520 { 1640052bc5dSKumar Gala #address-cells = <1>; 1650052bc5dSKumar Gala #size-cells = <0>; 1660052bc5dSKumar Gala compatible = "fsl,gianfar-mdio"; 16784ba4a58SAnton Vorontsov reg = <0x520 0x20>; 1680052bc5dSKumar Gala 1690052bc5dSKumar Gala phy1: ethernet-phy@1 { 1700052bc5dSKumar Gala interrupt-parent = <&mpic>; 1710052bc5dSKumar Gala interrupts = <8 1>; 1720052bc5dSKumar Gala reg = <1>; 1730052bc5dSKumar Gala }; 1740052bc5dSKumar Gala phy2: ethernet-phy@2 { 1750052bc5dSKumar Gala interrupt-parent = <&mpic>; 1760052bc5dSKumar Gala interrupts = <8 1>; 1770052bc5dSKumar Gala reg = <2>; 1780052bc5dSKumar Gala }; 1790052bc5dSKumar Gala phy3: ethernet-phy@3 { 1800052bc5dSKumar Gala interrupt-parent = <&mpic>; 1810052bc5dSKumar Gala interrupts = <8 1>; 1820052bc5dSKumar Gala reg = <3>; 1830052bc5dSKumar Gala }; 184b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 185b31a1d8bSAndy Fleming reg = <0x11>; 186b31a1d8bSAndy Fleming device_type = "tbi-phy"; 187b31a1d8bSAndy Fleming }; 188b31a1d8bSAndy Fleming }; 18984ba4a58SAnton Vorontsov }; 190b31a1d8bSAndy Fleming 19184ba4a58SAnton Vorontsov enet1: ethernet@25000 { 19284ba4a58SAnton Vorontsov #address-cells = <1>; 19384ba4a58SAnton Vorontsov #size-cells = <1>; 19484ba4a58SAnton Vorontsov cell-index = <1>; 19584ba4a58SAnton Vorontsov device_type = "network"; 19684ba4a58SAnton Vorontsov model = "TSEC"; 19784ba4a58SAnton Vorontsov compatible = "gianfar"; 19884ba4a58SAnton Vorontsov reg = <0x25000 0x1000>; 19984ba4a58SAnton Vorontsov ranges = <0x0 0x25000 0x1000>; 20084ba4a58SAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 20184ba4a58SAnton Vorontsov interrupts = <35 2 36 2 40 2>; 20284ba4a58SAnton Vorontsov interrupt-parent = <&mpic>; 20384ba4a58SAnton Vorontsov tbi-handle = <&tbi1>; 20484ba4a58SAnton Vorontsov phy-handle = <&phy1>; 20584ba4a58SAnton Vorontsov 20684ba4a58SAnton Vorontsov mdio@520 { 207b31a1d8bSAndy Fleming #address-cells = <1>; 208b31a1d8bSAndy Fleming #size-cells = <0>; 209b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 21084ba4a58SAnton Vorontsov reg = <0x520 0x20>; 211b31a1d8bSAndy Fleming 212b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 213b31a1d8bSAndy Fleming reg = <0x11>; 214b31a1d8bSAndy Fleming device_type = "tbi-phy"; 215b31a1d8bSAndy Fleming }; 2160052bc5dSKumar Gala }; 2170052bc5dSKumar Gala }; 2180052bc5dSKumar Gala 2190052bc5dSKumar Gala mpic: pic@40000 { 2200052bc5dSKumar Gala interrupt-controller; 2210052bc5dSKumar Gala #address-cells = <0>; 2220052bc5dSKumar Gala #interrupt-cells = <2>; 2230052bc5dSKumar Gala reg = <0x40000 0x40000>; 2240052bc5dSKumar Gala device_type = "open-pic"; 225acd4b715SKumar Gala compatible = "chrp,open-pic"; 2260052bc5dSKumar Gala }; 2270052bc5dSKumar Gala 2280052bc5dSKumar Gala cpm@919c0 { 2290052bc5dSKumar Gala #address-cells = <1>; 2300052bc5dSKumar Gala #size-cells = <1>; 2310052bc5dSKumar Gala compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; 2320052bc5dSKumar Gala reg = <0x919c0 0x30>; 2330052bc5dSKumar Gala ranges; 2340052bc5dSKumar Gala 2350052bc5dSKumar Gala muram@80000 { 2360052bc5dSKumar Gala #address-cells = <1>; 2370052bc5dSKumar Gala #size-cells = <1>; 2380052bc5dSKumar Gala ranges = <0 0x80000 0x10000>; 2390052bc5dSKumar Gala 2400052bc5dSKumar Gala data@0 { 2410052bc5dSKumar Gala compatible = "fsl,cpm-muram-data"; 2420052bc5dSKumar Gala reg = <0 0x4000 0x9000 0x2000>; 2430052bc5dSKumar Gala }; 2440052bc5dSKumar Gala }; 2450052bc5dSKumar Gala 2460052bc5dSKumar Gala brg@919f0 { 2470052bc5dSKumar Gala compatible = "fsl,mpc8560-brg", 2480052bc5dSKumar Gala "fsl,cpm2-brg", 2490052bc5dSKumar Gala "fsl,cpm-brg"; 2500052bc5dSKumar Gala reg = <0x919f0 0x10 0x915f0 0x10>; 2510052bc5dSKumar Gala clock-frequency = <0>; 2520052bc5dSKumar Gala }; 2530052bc5dSKumar Gala 2540052bc5dSKumar Gala cpmpic: pic@90c00 { 2550052bc5dSKumar Gala interrupt-controller; 2560052bc5dSKumar Gala #address-cells = <0>; 2570052bc5dSKumar Gala #interrupt-cells = <2>; 2580052bc5dSKumar Gala interrupts = <46 2>; 2590052bc5dSKumar Gala interrupt-parent = <&mpic>; 2600052bc5dSKumar Gala reg = <0x90c00 0x80>; 2610052bc5dSKumar Gala compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 2620052bc5dSKumar Gala }; 2630052bc5dSKumar Gala 2640052bc5dSKumar Gala serial0: serial@91a00 { 2650052bc5dSKumar Gala device_type = "serial"; 2660052bc5dSKumar Gala compatible = "fsl,mpc8560-scc-uart", 2670052bc5dSKumar Gala "fsl,cpm2-scc-uart"; 2680052bc5dSKumar Gala reg = <0x91a00 0x20 0x88000 0x100>; 2690052bc5dSKumar Gala fsl,cpm-brg = <1>; 2700052bc5dSKumar Gala fsl,cpm-command = <0x800000>; 2710052bc5dSKumar Gala current-speed = <115200>; 2720052bc5dSKumar Gala interrupts = <40 8>; 2730052bc5dSKumar Gala interrupt-parent = <&cpmpic>; 2740052bc5dSKumar Gala }; 2750052bc5dSKumar Gala 2760052bc5dSKumar Gala serial1: serial@91a20 { 2770052bc5dSKumar Gala device_type = "serial"; 2780052bc5dSKumar Gala compatible = "fsl,mpc8560-scc-uart", 2790052bc5dSKumar Gala "fsl,cpm2-scc-uart"; 2800052bc5dSKumar Gala reg = <0x91a20 0x20 0x88100 0x100>; 2810052bc5dSKumar Gala fsl,cpm-brg = <2>; 2820052bc5dSKumar Gala fsl,cpm-command = <0x4a00000>; 2830052bc5dSKumar Gala current-speed = <115200>; 2840052bc5dSKumar Gala interrupts = <41 8>; 2850052bc5dSKumar Gala interrupt-parent = <&cpmpic>; 2860052bc5dSKumar Gala }; 2870052bc5dSKumar Gala 2880052bc5dSKumar Gala enet2: ethernet@91340 { 2890052bc5dSKumar Gala device_type = "network"; 2900052bc5dSKumar Gala compatible = "fsl,mpc8560-fcc-enet", 2910052bc5dSKumar Gala "fsl,cpm2-fcc-enet"; 2920052bc5dSKumar Gala reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; 2930052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 2940052bc5dSKumar Gala fsl,cpm-command = <0x1a400300>; 2950052bc5dSKumar Gala interrupts = <34 8>; 2960052bc5dSKumar Gala interrupt-parent = <&cpmpic>; 2970052bc5dSKumar Gala phy-handle = <&phy3>; 2980052bc5dSKumar Gala }; 2990052bc5dSKumar Gala }; 3000052bc5dSKumar Gala }; 3010052bc5dSKumar Gala 3025399be7fSWolfgang Grandegger localbus@e0005000 { 3035399be7fSWolfgang Grandegger compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus", 3045399be7fSWolfgang Grandegger "simple-bus"; 3055399be7fSWolfgang Grandegger #address-cells = <2>; 3065399be7fSWolfgang Grandegger #size-cells = <1>; 3075399be7fSWolfgang Grandegger reg = <0xe0005000 0x100>; // BRx, ORx, etc. 308c0f58950SDmitry Eremin-Solenikov interrupt-parent = <&mpic>; 309c0f58950SDmitry Eremin-Solenikov interrupts = <19 2>; 3105399be7fSWolfgang Grandegger 3115399be7fSWolfgang Grandegger ranges = < 3125399be7fSWolfgang Grandegger 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 3135399be7fSWolfgang Grandegger 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 3145399be7fSWolfgang Grandegger 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) 3155399be7fSWolfgang Grandegger >; 3165399be7fSWolfgang Grandegger 3175399be7fSWolfgang Grandegger flash@1,0 { 3185399be7fSWolfgang Grandegger #address-cells = <1>; 3195399be7fSWolfgang Grandegger #size-cells = <1>; 3205399be7fSWolfgang Grandegger compatible = "cfi-flash"; 3215399be7fSWolfgang Grandegger reg = <1 0x0 0x8000000>; 3225399be7fSWolfgang Grandegger bank-width = <4>; 3235399be7fSWolfgang Grandegger device-width = <1>; 3245399be7fSWolfgang Grandegger 3255399be7fSWolfgang Grandegger partition@0 { 3265399be7fSWolfgang Grandegger label = "kernel"; 3275399be7fSWolfgang Grandegger reg = <0x00000000 0x00200000>; 3285399be7fSWolfgang Grandegger }; 3295399be7fSWolfgang Grandegger partition@200000 { 3305399be7fSWolfgang Grandegger label = "root"; 3315399be7fSWolfgang Grandegger reg = <0x00200000 0x00300000>; 3325399be7fSWolfgang Grandegger }; 3335399be7fSWolfgang Grandegger partition@500000 { 3345399be7fSWolfgang Grandegger label = "user"; 3355399be7fSWolfgang Grandegger reg = <0x00500000 0x07a00000>; 3365399be7fSWolfgang Grandegger }; 3375399be7fSWolfgang Grandegger partition@7f00000 { 3385399be7fSWolfgang Grandegger label = "env1"; 3395399be7fSWolfgang Grandegger reg = <0x07f00000 0x00040000>; 3405399be7fSWolfgang Grandegger }; 3415399be7fSWolfgang Grandegger partition@7f40000 { 3425399be7fSWolfgang Grandegger label = "env2"; 3435399be7fSWolfgang Grandegger reg = <0x07f40000 0x00040000>; 3445399be7fSWolfgang Grandegger }; 3455399be7fSWolfgang Grandegger partition@7f80000 { 3465399be7fSWolfgang Grandegger label = "u-boot"; 3475399be7fSWolfgang Grandegger reg = <0x07f80000 0x00080000>; 3485399be7fSWolfgang Grandegger read-only; 3495399be7fSWolfgang Grandegger }; 3505399be7fSWolfgang Grandegger }; 3515399be7fSWolfgang Grandegger 3525399be7fSWolfgang Grandegger /* Note: CAN support needs be enabled in U-Boot */ 3535399be7fSWolfgang Grandegger can0@2,0 { 3545399be7fSWolfgang Grandegger compatible = "intel,82527"; // Bosch CC770 3555399be7fSWolfgang Grandegger reg = <2 0x0 0x100>; 3567a385241SWolfgang Grandegger interrupts = <4 1>; 3575399be7fSWolfgang Grandegger interrupt-parent = <&mpic>; 3585399be7fSWolfgang Grandegger }; 3595399be7fSWolfgang Grandegger 3605399be7fSWolfgang Grandegger can1@2,100 { 3615399be7fSWolfgang Grandegger compatible = "intel,82527"; // Bosch CC770 3625399be7fSWolfgang Grandegger reg = <2 0x100 0x100>; 3637a385241SWolfgang Grandegger interrupts = <4 1>; 3645399be7fSWolfgang Grandegger interrupt-parent = <&mpic>; 3655399be7fSWolfgang Grandegger }; 3665399be7fSWolfgang Grandegger }; 3675399be7fSWolfgang Grandegger 3680052bc5dSKumar Gala pci0: pci@e0008000 { 3690052bc5dSKumar Gala #interrupt-cells = <1>; 3700052bc5dSKumar Gala #size-cells = <2>; 3710052bc5dSKumar Gala #address-cells = <3>; 3720052bc5dSKumar Gala compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 3730052bc5dSKumar Gala device_type = "pci"; 3740052bc5dSKumar Gala reg = <0xe0008000 0x1000>; 3750052bc5dSKumar Gala clock-frequency = <66666666>; 3760052bc5dSKumar Gala interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 3770052bc5dSKumar Gala interrupt-map = < 3780052bc5dSKumar Gala /* IDSEL 28 */ 3790052bc5dSKumar Gala 0xe000 0 0 1 &mpic 2 1 38007c63839SDmitry Eremin-Solenikov 0xe000 0 0 2 &mpic 3 1 38107c63839SDmitry Eremin-Solenikov 0xe000 0 0 3 &mpic 6 1 38207c63839SDmitry Eremin-Solenikov 0xe000 0 0 4 &mpic 5 1 38307c63839SDmitry Eremin-Solenikov 38407c63839SDmitry Eremin-Solenikov /* IDSEL 11 */ 38507c63839SDmitry Eremin-Solenikov 0x5800 0 0 1 &mpic 6 1 38607c63839SDmitry Eremin-Solenikov 0x5800 0 0 2 &mpic 5 1 38707c63839SDmitry Eremin-Solenikov >; 3880052bc5dSKumar Gala 3890052bc5dSKumar Gala interrupt-parent = <&mpic>; 3900052bc5dSKumar Gala interrupts = <24 2>; 3910052bc5dSKumar Gala bus-range = <0 0>; 3920052bc5dSKumar Gala ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 3930052bc5dSKumar Gala 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; 3940052bc5dSKumar Gala }; 3950052bc5dSKumar Gala}; 396