10052bc5dSKumar Gala/* 20052bc5dSKumar Gala * TQM 8555 Device Tree Source 30052bc5dSKumar Gala * 40052bc5dSKumar Gala * Copyright 2008 Freescale Semiconductor Inc. 50052bc5dSKumar Gala * 60052bc5dSKumar Gala * This program is free software; you can redistribute it and/or modify it 70052bc5dSKumar Gala * under the terms of the GNU General Public License as published by the 80052bc5dSKumar Gala * Free Software Foundation; either version 2 of the License, or (at your 90052bc5dSKumar Gala * option) any later version. 100052bc5dSKumar Gala */ 110052bc5dSKumar Gala 120052bc5dSKumar Gala/dts-v1/; 130052bc5dSKumar Gala 140052bc5dSKumar Gala/ { 150052bc5dSKumar Gala model = "tqm,8555"; 160052bc5dSKumar Gala compatible = "tqm,8555", "tqm,85xx"; 170052bc5dSKumar Gala #address-cells = <1>; 180052bc5dSKumar Gala #size-cells = <1>; 190052bc5dSKumar Gala 200052bc5dSKumar Gala aliases { 210052bc5dSKumar Gala ethernet0 = &enet0; 220052bc5dSKumar Gala ethernet1 = &enet1; 230052bc5dSKumar Gala serial0 = &serial0; 240052bc5dSKumar Gala serial1 = &serial1; 250052bc5dSKumar Gala pci0 = &pci0; 260052bc5dSKumar Gala }; 270052bc5dSKumar Gala 280052bc5dSKumar Gala cpus { 290052bc5dSKumar Gala #address-cells = <1>; 300052bc5dSKumar Gala #size-cells = <0>; 310052bc5dSKumar Gala 320052bc5dSKumar Gala PowerPC,8555@0 { 330052bc5dSKumar Gala device_type = "cpu"; 340052bc5dSKumar Gala reg = <0>; 350052bc5dSKumar Gala d-cache-line-size = <32>; 360052bc5dSKumar Gala i-cache-line-size = <32>; 370052bc5dSKumar Gala d-cache-size = <32768>; 380052bc5dSKumar Gala i-cache-size = <32768>; 390052bc5dSKumar Gala timebase-frequency = <0>; 400052bc5dSKumar Gala bus-frequency = <0>; 410052bc5dSKumar Gala clock-frequency = <0>; 420052bc5dSKumar Gala }; 430052bc5dSKumar Gala }; 440052bc5dSKumar Gala 450052bc5dSKumar Gala memory { 460052bc5dSKumar Gala device_type = "memory"; 470052bc5dSKumar Gala reg = <0x00000000 0x10000000>; 480052bc5dSKumar Gala }; 490052bc5dSKumar Gala 500052bc5dSKumar Gala soc8555@e0000000 { 510052bc5dSKumar Gala #address-cells = <1>; 520052bc5dSKumar Gala #size-cells = <1>; 530052bc5dSKumar Gala device_type = "soc"; 540052bc5dSKumar Gala ranges = <0x0 0xe0000000 0x100000>; 550052bc5dSKumar Gala reg = <0xe0000000 0x200>; 560052bc5dSKumar Gala bus-frequency = <0>; 570052bc5dSKumar Gala compatible = "fsl,mpc8555-immr", "simple-bus"; 580052bc5dSKumar Gala 590052bc5dSKumar Gala memory-controller@2000 { 600052bc5dSKumar Gala compatible = "fsl,8540-memory-controller"; 610052bc5dSKumar Gala reg = <0x2000 0x1000>; 620052bc5dSKumar Gala interrupt-parent = <&mpic>; 630052bc5dSKumar Gala interrupts = <18 2>; 640052bc5dSKumar Gala }; 650052bc5dSKumar Gala 660052bc5dSKumar Gala l2-cache-controller@20000 { 670052bc5dSKumar Gala compatible = "fsl,8540-l2-cache-controller"; 680052bc5dSKumar Gala reg = <0x20000 0x1000>; 690052bc5dSKumar Gala cache-line-size = <32>; 700052bc5dSKumar Gala cache-size = <0x40000>; // L2, 256K 710052bc5dSKumar Gala interrupt-parent = <&mpic>; 720052bc5dSKumar Gala interrupts = <16 2>; 730052bc5dSKumar Gala }; 740052bc5dSKumar Gala 750052bc5dSKumar Gala i2c@3000 { 760052bc5dSKumar Gala #address-cells = <1>; 770052bc5dSKumar Gala #size-cells = <0>; 780052bc5dSKumar Gala cell-index = <0>; 790052bc5dSKumar Gala compatible = "fsl-i2c"; 800052bc5dSKumar Gala reg = <0x3000 0x100>; 810052bc5dSKumar Gala interrupts = <43 2>; 820052bc5dSKumar Gala interrupt-parent = <&mpic>; 830052bc5dSKumar Gala dfsrr; 840052bc5dSKumar Gala 850052bc5dSKumar Gala rtc@68 { 860052bc5dSKumar Gala compatible = "dallas,ds1337"; 870052bc5dSKumar Gala reg = <0x68>; 880052bc5dSKumar Gala }; 890052bc5dSKumar Gala }; 900052bc5dSKumar Gala 910052bc5dSKumar Gala mdio@24520 { 920052bc5dSKumar Gala #address-cells = <1>; 930052bc5dSKumar Gala #size-cells = <0>; 940052bc5dSKumar Gala compatible = "fsl,gianfar-mdio"; 950052bc5dSKumar Gala reg = <0x24520 0x20>; 960052bc5dSKumar Gala 970052bc5dSKumar Gala phy1: ethernet-phy@1 { 980052bc5dSKumar Gala interrupt-parent = <&mpic>; 990052bc5dSKumar Gala interrupts = <8 1>; 1000052bc5dSKumar Gala reg = <1>; 1010052bc5dSKumar Gala device_type = "ethernet-phy"; 1020052bc5dSKumar Gala }; 1030052bc5dSKumar Gala phy2: ethernet-phy@2 { 1040052bc5dSKumar Gala interrupt-parent = <&mpic>; 1050052bc5dSKumar Gala interrupts = <8 1>; 1060052bc5dSKumar Gala reg = <2>; 1070052bc5dSKumar Gala device_type = "ethernet-phy"; 1080052bc5dSKumar Gala }; 1090052bc5dSKumar Gala phy3: ethernet-phy@3 { 1100052bc5dSKumar Gala interrupt-parent = <&mpic>; 1110052bc5dSKumar Gala interrupts = <8 1>; 1120052bc5dSKumar Gala reg = <3>; 1130052bc5dSKumar Gala device_type = "ethernet-phy"; 1140052bc5dSKumar Gala }; 1150052bc5dSKumar Gala }; 1160052bc5dSKumar Gala 1170052bc5dSKumar Gala enet0: ethernet@24000 { 1180052bc5dSKumar Gala cell-index = <0>; 1190052bc5dSKumar Gala device_type = "network"; 1200052bc5dSKumar Gala model = "TSEC"; 1210052bc5dSKumar Gala compatible = "gianfar"; 1220052bc5dSKumar Gala reg = <0x24000 0x1000>; 1230052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 1240052bc5dSKumar Gala interrupts = <29 2 30 2 34 2>; 1250052bc5dSKumar Gala interrupt-parent = <&mpic>; 1260052bc5dSKumar Gala phy-handle = <&phy2>; 1270052bc5dSKumar Gala }; 1280052bc5dSKumar Gala 1290052bc5dSKumar Gala enet1: ethernet@25000 { 1300052bc5dSKumar Gala cell-index = <1>; 1310052bc5dSKumar Gala device_type = "network"; 1320052bc5dSKumar Gala model = "TSEC"; 1330052bc5dSKumar Gala compatible = "gianfar"; 1340052bc5dSKumar Gala reg = <0x25000 0x1000>; 1350052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 1360052bc5dSKumar Gala interrupts = <35 2 36 2 40 2>; 1370052bc5dSKumar Gala interrupt-parent = <&mpic>; 1380052bc5dSKumar Gala phy-handle = <&phy1>; 1390052bc5dSKumar Gala }; 1400052bc5dSKumar Gala 1410052bc5dSKumar Gala serial0: serial@4500 { 1420052bc5dSKumar Gala cell-index = <0>; 1430052bc5dSKumar Gala device_type = "serial"; 1440052bc5dSKumar Gala compatible = "ns16550"; 1450052bc5dSKumar Gala reg = <0x4500 0x100>; // reg base, size 1460052bc5dSKumar Gala clock-frequency = <0>; // should we fill in in uboot? 1470052bc5dSKumar Gala interrupts = <42 2>; 1480052bc5dSKumar Gala interrupt-parent = <&mpic>; 1490052bc5dSKumar Gala }; 1500052bc5dSKumar Gala 1510052bc5dSKumar Gala serial1: serial@4600 { 1520052bc5dSKumar Gala cell-index = <1>; 1530052bc5dSKumar Gala device_type = "serial"; 1540052bc5dSKumar Gala compatible = "ns16550"; 1550052bc5dSKumar Gala reg = <0x4600 0x100>; // reg base, size 1560052bc5dSKumar Gala clock-frequency = <0>; // should we fill in in uboot? 1570052bc5dSKumar Gala interrupts = <42 2>; 1580052bc5dSKumar Gala interrupt-parent = <&mpic>; 1590052bc5dSKumar Gala }; 1600052bc5dSKumar Gala 1610052bc5dSKumar Gala mpic: pic@40000 { 1620052bc5dSKumar Gala interrupt-controller; 1630052bc5dSKumar Gala #address-cells = <0>; 1640052bc5dSKumar Gala #interrupt-cells = <2>; 1650052bc5dSKumar Gala reg = <0x40000 0x40000>; 1660052bc5dSKumar Gala device_type = "open-pic"; 1670052bc5dSKumar Gala }; 1680052bc5dSKumar Gala 1690052bc5dSKumar Gala cpm@919c0 { 1700052bc5dSKumar Gala #address-cells = <1>; 1710052bc5dSKumar Gala #size-cells = <1>; 1720052bc5dSKumar Gala compatible = "fsl,mpc8555-cpm", "fsl,cpm2", "simple-bus"; 1730052bc5dSKumar Gala reg = <0x919c0 0x30>; 1740052bc5dSKumar Gala ranges; 1750052bc5dSKumar Gala 1760052bc5dSKumar Gala muram@80000 { 1770052bc5dSKumar Gala #address-cells = <1>; 1780052bc5dSKumar Gala #size-cells = <1>; 1790052bc5dSKumar Gala ranges = <0 0x80000 0x10000>; 1800052bc5dSKumar Gala 1810052bc5dSKumar Gala data@0 { 1820052bc5dSKumar Gala compatible = "fsl,cpm-muram-data"; 1830052bc5dSKumar Gala reg = <0 0x2000 0x9000 0x1000>; 1840052bc5dSKumar Gala }; 1850052bc5dSKumar Gala }; 1860052bc5dSKumar Gala 1870052bc5dSKumar Gala brg@919f0 { 1880052bc5dSKumar Gala compatible = "fsl,mpc8555-brg", 1890052bc5dSKumar Gala "fsl,cpm2-brg", 1900052bc5dSKumar Gala "fsl,cpm-brg"; 1910052bc5dSKumar Gala reg = <0x919f0 0x10 0x915f0 0x10>; 1920052bc5dSKumar Gala clock-frequency = <0>; 1930052bc5dSKumar Gala }; 1940052bc5dSKumar Gala 1950052bc5dSKumar Gala cpmpic: pic@90c00 { 1960052bc5dSKumar Gala interrupt-controller; 1970052bc5dSKumar Gala #address-cells = <0>; 1980052bc5dSKumar Gala #interrupt-cells = <2>; 1990052bc5dSKumar Gala interrupts = <46 2>; 2000052bc5dSKumar Gala interrupt-parent = <&mpic>; 2010052bc5dSKumar Gala reg = <0x90c00 0x80>; 2020052bc5dSKumar Gala compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; 2030052bc5dSKumar Gala }; 2040052bc5dSKumar Gala }; 2050052bc5dSKumar Gala }; 2060052bc5dSKumar Gala 2070052bc5dSKumar Gala pci0: pci@e0008000 { 2080052bc5dSKumar Gala cell-index = <0>; 2090052bc5dSKumar Gala #interrupt-cells = <1>; 2100052bc5dSKumar Gala #size-cells = <2>; 2110052bc5dSKumar Gala #address-cells = <3>; 2120052bc5dSKumar Gala compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 2130052bc5dSKumar Gala device_type = "pci"; 2140052bc5dSKumar Gala reg = <0xe0008000 0x1000>; 2150052bc5dSKumar Gala clock-frequency = <66666666>; 2160052bc5dSKumar Gala interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 2170052bc5dSKumar Gala interrupt-map = < 2180052bc5dSKumar Gala /* IDSEL 28 */ 2190052bc5dSKumar Gala 0xe000 0 0 1 &mpic 2 1 2200052bc5dSKumar Gala 0xe000 0 0 2 &mpic 3 1>; 2210052bc5dSKumar Gala 2220052bc5dSKumar Gala interrupt-parent = <&mpic>; 2230052bc5dSKumar Gala interrupts = <24 2>; 2240052bc5dSKumar Gala bus-range = <0 0>; 2250052bc5dSKumar Gala ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 2260052bc5dSKumar Gala 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; 2270052bc5dSKumar Gala }; 2280052bc5dSKumar Gala}; 229