16dd1b64aSWolfgang Grandegger/* 26dd1b64aSWolfgang Grandegger * TQM8548 Device Tree Source 36dd1b64aSWolfgang Grandegger * 46dd1b64aSWolfgang Grandegger * Copyright 2006 Freescale Semiconductor Inc. 56dd1b64aSWolfgang Grandegger * Copyright 2008 Wolfgang Grandegger <wg@denx.de> 66dd1b64aSWolfgang Grandegger * 76dd1b64aSWolfgang Grandegger * This program is free software; you can redistribute it and/or modify it 86dd1b64aSWolfgang Grandegger * under the terms of the GNU General Public License as published by the 96dd1b64aSWolfgang Grandegger * Free Software Foundation; either version 2 of the License, or (at your 106dd1b64aSWolfgang Grandegger * option) any later version. 116dd1b64aSWolfgang Grandegger */ 126dd1b64aSWolfgang Grandegger 136dd1b64aSWolfgang Grandegger/dts-v1/; 146dd1b64aSWolfgang Grandegger 156dd1b64aSWolfgang Grandegger/ { 166dd1b64aSWolfgang Grandegger model = "tqc,tqm8548"; 176dd1b64aSWolfgang Grandegger compatible = "tqc,tqm8548"; 186dd1b64aSWolfgang Grandegger #address-cells = <1>; 196dd1b64aSWolfgang Grandegger #size-cells = <1>; 206dd1b64aSWolfgang Grandegger 216dd1b64aSWolfgang Grandegger aliases { 226dd1b64aSWolfgang Grandegger ethernet0 = &enet0; 236dd1b64aSWolfgang Grandegger ethernet1 = &enet1; 246dd1b64aSWolfgang Grandegger ethernet2 = &enet2; 256dd1b64aSWolfgang Grandegger ethernet3 = &enet3; 266dd1b64aSWolfgang Grandegger 276dd1b64aSWolfgang Grandegger serial0 = &serial0; 286dd1b64aSWolfgang Grandegger serial1 = &serial1; 296dd1b64aSWolfgang Grandegger pci0 = &pci0; 306dd1b64aSWolfgang Grandegger pci1 = &pci1; 316dd1b64aSWolfgang Grandegger }; 326dd1b64aSWolfgang Grandegger 336dd1b64aSWolfgang Grandegger cpus { 346dd1b64aSWolfgang Grandegger #address-cells = <1>; 356dd1b64aSWolfgang Grandegger #size-cells = <0>; 366dd1b64aSWolfgang Grandegger 376dd1b64aSWolfgang Grandegger PowerPC,8548@0 { 386dd1b64aSWolfgang Grandegger device_type = "cpu"; 396dd1b64aSWolfgang Grandegger reg = <0>; 406dd1b64aSWolfgang Grandegger d-cache-line-size = <32>; // 32 bytes 416dd1b64aSWolfgang Grandegger i-cache-line-size = <32>; // 32 bytes 426dd1b64aSWolfgang Grandegger d-cache-size = <0x8000>; // L1, 32K 436dd1b64aSWolfgang Grandegger i-cache-size = <0x8000>; // L1, 32K 446dd1b64aSWolfgang Grandegger next-level-cache = <&L2>; 456dd1b64aSWolfgang Grandegger }; 466dd1b64aSWolfgang Grandegger }; 476dd1b64aSWolfgang Grandegger 486dd1b64aSWolfgang Grandegger memory { 496dd1b64aSWolfgang Grandegger device_type = "memory"; 506dd1b64aSWolfgang Grandegger reg = <0x00000000 0x00000000>; // Filled in by U-Boot 516dd1b64aSWolfgang Grandegger }; 526dd1b64aSWolfgang Grandegger 53d27a736cSWolfgang Grandegger soc@e0000000 { 546dd1b64aSWolfgang Grandegger #address-cells = <1>; 556dd1b64aSWolfgang Grandegger #size-cells = <1>; 566dd1b64aSWolfgang Grandegger device_type = "soc"; 576dd1b64aSWolfgang Grandegger ranges = <0x0 0xe0000000 0x100000>; 586dd1b64aSWolfgang Grandegger reg = <0xe0000000 0x1000>; // CCSRBAR 596dd1b64aSWolfgang Grandegger bus-frequency = <0>; 60d27a736cSWolfgang Grandegger compatible = "fsl,mpc8548-immr", "simple-bus"; 616dd1b64aSWolfgang Grandegger 626dd1b64aSWolfgang Grandegger memory-controller@2000 { 636dd1b64aSWolfgang Grandegger compatible = "fsl,mpc8548-memory-controller"; 646dd1b64aSWolfgang Grandegger reg = <0x2000 0x1000>; 656dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 666dd1b64aSWolfgang Grandegger interrupts = <18 2>; 676dd1b64aSWolfgang Grandegger }; 686dd1b64aSWolfgang Grandegger 696dd1b64aSWolfgang Grandegger L2: l2-cache-controller@20000 { 706dd1b64aSWolfgang Grandegger compatible = "fsl,mpc8548-l2-cache-controller"; 716dd1b64aSWolfgang Grandegger reg = <0x20000 0x1000>; 726dd1b64aSWolfgang Grandegger cache-line-size = <32>; // 32 bytes 736dd1b64aSWolfgang Grandegger cache-size = <0x80000>; // L2, 512K 746dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 756dd1b64aSWolfgang Grandegger interrupts = <16 2>; 766dd1b64aSWolfgang Grandegger }; 776dd1b64aSWolfgang Grandegger 786dd1b64aSWolfgang Grandegger i2c@3000 { 796dd1b64aSWolfgang Grandegger #address-cells = <1>; 806dd1b64aSWolfgang Grandegger #size-cells = <0>; 816dd1b64aSWolfgang Grandegger cell-index = <0>; 826dd1b64aSWolfgang Grandegger compatible = "fsl-i2c"; 836dd1b64aSWolfgang Grandegger reg = <0x3000 0x100>; 846dd1b64aSWolfgang Grandegger interrupts = <43 2>; 856dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 866dd1b64aSWolfgang Grandegger dfsrr; 87a3083220SWolfgang Grandegger 886467cae3SWolfgang Grandegger dtt@48 { 890f73a449SWolfgang Grandegger compatible = "national,lm75"; 906467cae3SWolfgang Grandegger reg = <0x48>; 910f73a449SWolfgang Grandegger }; 920f73a449SWolfgang Grandegger 93a3083220SWolfgang Grandegger rtc@68 { 94a3083220SWolfgang Grandegger compatible = "dallas,ds1337"; 95a3083220SWolfgang Grandegger reg = <0x68>; 96a3083220SWolfgang Grandegger }; 976dd1b64aSWolfgang Grandegger }; 986dd1b64aSWolfgang Grandegger 996dd1b64aSWolfgang Grandegger i2c@3100 { 1006dd1b64aSWolfgang Grandegger #address-cells = <1>; 1016dd1b64aSWolfgang Grandegger #size-cells = <0>; 1026dd1b64aSWolfgang Grandegger cell-index = <1>; 1036dd1b64aSWolfgang Grandegger compatible = "fsl-i2c"; 1046dd1b64aSWolfgang Grandegger reg = <0x3100 0x100>; 1056dd1b64aSWolfgang Grandegger interrupts = <43 2>; 1066dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 1076dd1b64aSWolfgang Grandegger dfsrr; 1086dd1b64aSWolfgang Grandegger }; 1096dd1b64aSWolfgang Grandegger 110dee80553SKumar Gala dma@21300 { 111dee80553SKumar Gala #address-cells = <1>; 112dee80553SKumar Gala #size-cells = <1>; 113dee80553SKumar Gala compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; 114dee80553SKumar Gala reg = <0x21300 0x4>; 115dee80553SKumar Gala ranges = <0x0 0x21100 0x200>; 116dee80553SKumar Gala cell-index = <0>; 117dee80553SKumar Gala dma-channel@0 { 118dee80553SKumar Gala compatible = "fsl,mpc8548-dma-channel", 119dee80553SKumar Gala "fsl,eloplus-dma-channel"; 120dee80553SKumar Gala reg = <0x0 0x80>; 121dee80553SKumar Gala cell-index = <0>; 122dee80553SKumar Gala interrupt-parent = <&mpic>; 123dee80553SKumar Gala interrupts = <20 2>; 124dee80553SKumar Gala }; 125dee80553SKumar Gala dma-channel@80 { 126dee80553SKumar Gala compatible = "fsl,mpc8548-dma-channel", 127dee80553SKumar Gala "fsl,eloplus-dma-channel"; 128dee80553SKumar Gala reg = <0x80 0x80>; 129dee80553SKumar Gala cell-index = <1>; 130dee80553SKumar Gala interrupt-parent = <&mpic>; 131dee80553SKumar Gala interrupts = <21 2>; 132dee80553SKumar Gala }; 133dee80553SKumar Gala dma-channel@100 { 134dee80553SKumar Gala compatible = "fsl,mpc8548-dma-channel", 135dee80553SKumar Gala "fsl,eloplus-dma-channel"; 136dee80553SKumar Gala reg = <0x100 0x80>; 137dee80553SKumar Gala cell-index = <2>; 138dee80553SKumar Gala interrupt-parent = <&mpic>; 139dee80553SKumar Gala interrupts = <22 2>; 140dee80553SKumar Gala }; 141dee80553SKumar Gala dma-channel@180 { 142dee80553SKumar Gala compatible = "fsl,mpc8548-dma-channel", 143dee80553SKumar Gala "fsl,eloplus-dma-channel"; 144dee80553SKumar Gala reg = <0x180 0x80>; 145dee80553SKumar Gala cell-index = <3>; 146dee80553SKumar Gala interrupt-parent = <&mpic>; 147dee80553SKumar Gala interrupts = <23 2>; 148dee80553SKumar Gala }; 149dee80553SKumar Gala }; 150dee80553SKumar Gala 15184ba4a58SAnton Vorontsov enet0: ethernet@24000 { 15284ba4a58SAnton Vorontsov #address-cells = <1>; 15384ba4a58SAnton Vorontsov #size-cells = <1>; 15484ba4a58SAnton Vorontsov cell-index = <0>; 15584ba4a58SAnton Vorontsov device_type = "network"; 15684ba4a58SAnton Vorontsov model = "eTSEC"; 15784ba4a58SAnton Vorontsov compatible = "gianfar"; 15884ba4a58SAnton Vorontsov reg = <0x24000 0x1000>; 15984ba4a58SAnton Vorontsov ranges = <0x0 0x24000 0x1000>; 16084ba4a58SAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 16184ba4a58SAnton Vorontsov interrupts = <29 2 30 2 34 2>; 16284ba4a58SAnton Vorontsov interrupt-parent = <&mpic>; 16384ba4a58SAnton Vorontsov tbi-handle = <&tbi0>; 16484ba4a58SAnton Vorontsov phy-handle = <&phy2>; 16584ba4a58SAnton Vorontsov 16684ba4a58SAnton Vorontsov mdio@520 { 1676dd1b64aSWolfgang Grandegger #address-cells = <1>; 1686dd1b64aSWolfgang Grandegger #size-cells = <0>; 1696dd1b64aSWolfgang Grandegger compatible = "fsl,gianfar-mdio"; 17084ba4a58SAnton Vorontsov reg = <0x520 0x20>; 1716dd1b64aSWolfgang Grandegger 1726dd1b64aSWolfgang Grandegger phy1: ethernet-phy@0 { 1736dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 1746dd1b64aSWolfgang Grandegger interrupts = <8 1>; 1756dd1b64aSWolfgang Grandegger reg = <1>; 1766dd1b64aSWolfgang Grandegger device_type = "ethernet-phy"; 1776dd1b64aSWolfgang Grandegger }; 1786dd1b64aSWolfgang Grandegger phy2: ethernet-phy@1 { 1796dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 1806dd1b64aSWolfgang Grandegger interrupts = <8 1>; 1816dd1b64aSWolfgang Grandegger reg = <2>; 1826dd1b64aSWolfgang Grandegger device_type = "ethernet-phy"; 1836dd1b64aSWolfgang Grandegger }; 1846dd1b64aSWolfgang Grandegger phy3: ethernet-phy@3 { 1856dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 1866dd1b64aSWolfgang Grandegger interrupts = <8 1>; 1876dd1b64aSWolfgang Grandegger reg = <3>; 1886dd1b64aSWolfgang Grandegger device_type = "ethernet-phy"; 1896dd1b64aSWolfgang Grandegger }; 1906dd1b64aSWolfgang Grandegger phy4: ethernet-phy@4 { 1916dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 1926dd1b64aSWolfgang Grandegger interrupts = <8 1>; 1936dd1b64aSWolfgang Grandegger reg = <4>; 1946dd1b64aSWolfgang Grandegger device_type = "ethernet-phy"; 1956dd1b64aSWolfgang Grandegger }; 1966dd1b64aSWolfgang Grandegger phy5: ethernet-phy@5 { 1976dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 1986dd1b64aSWolfgang Grandegger interrupts = <8 1>; 1996dd1b64aSWolfgang Grandegger reg = <5>; 2006dd1b64aSWolfgang Grandegger device_type = "ethernet-phy"; 2016dd1b64aSWolfgang Grandegger }; 202b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 203b31a1d8bSAndy Fleming reg = <0x11>; 204b31a1d8bSAndy Fleming device_type = "tbi-phy"; 205b31a1d8bSAndy Fleming }; 206b31a1d8bSAndy Fleming }; 20784ba4a58SAnton Vorontsov }; 208b31a1d8bSAndy Fleming 20984ba4a58SAnton Vorontsov enet1: ethernet@25000 { 21084ba4a58SAnton Vorontsov #address-cells = <1>; 21184ba4a58SAnton Vorontsov #size-cells = <1>; 21284ba4a58SAnton Vorontsov cell-index = <1>; 21384ba4a58SAnton Vorontsov device_type = "network"; 21484ba4a58SAnton Vorontsov model = "eTSEC"; 21584ba4a58SAnton Vorontsov compatible = "gianfar"; 21684ba4a58SAnton Vorontsov reg = <0x25000 0x1000>; 21784ba4a58SAnton Vorontsov ranges = <0x0 0x25000 0x1000>; 21884ba4a58SAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 21984ba4a58SAnton Vorontsov interrupts = <35 2 36 2 40 2>; 22084ba4a58SAnton Vorontsov interrupt-parent = <&mpic>; 22184ba4a58SAnton Vorontsov tbi-handle = <&tbi1>; 22284ba4a58SAnton Vorontsov phy-handle = <&phy1>; 22384ba4a58SAnton Vorontsov 22484ba4a58SAnton Vorontsov mdio@520 { 225b31a1d8bSAndy Fleming #address-cells = <1>; 226b31a1d8bSAndy Fleming #size-cells = <0>; 227b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 22884ba4a58SAnton Vorontsov reg = <0x520 0x20>; 229b31a1d8bSAndy Fleming 230b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 231b31a1d8bSAndy Fleming reg = <0x11>; 232b31a1d8bSAndy Fleming device_type = "tbi-phy"; 233b31a1d8bSAndy Fleming }; 234b31a1d8bSAndy Fleming }; 23584ba4a58SAnton Vorontsov }; 236b31a1d8bSAndy Fleming 23784ba4a58SAnton Vorontsov enet2: ethernet@26000 { 23884ba4a58SAnton Vorontsov #address-cells = <1>; 23984ba4a58SAnton Vorontsov #size-cells = <1>; 24084ba4a58SAnton Vorontsov cell-index = <2>; 24184ba4a58SAnton Vorontsov device_type = "network"; 24284ba4a58SAnton Vorontsov model = "eTSEC"; 24384ba4a58SAnton Vorontsov compatible = "gianfar"; 24484ba4a58SAnton Vorontsov reg = <0x26000 0x1000>; 24584ba4a58SAnton Vorontsov ranges = <0x0 0x26000 0x1000>; 24684ba4a58SAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 24784ba4a58SAnton Vorontsov interrupts = <31 2 32 2 33 2>; 24884ba4a58SAnton Vorontsov interrupt-parent = <&mpic>; 24984ba4a58SAnton Vorontsov tbi-handle = <&tbi2>; 250655544c6SWolfgang Grandegger phy-handle = <&phy4>; 25184ba4a58SAnton Vorontsov 25284ba4a58SAnton Vorontsov mdio@520 { 253b31a1d8bSAndy Fleming #address-cells = <1>; 254b31a1d8bSAndy Fleming #size-cells = <0>; 255b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 25684ba4a58SAnton Vorontsov reg = <0x520 0x20>; 257b31a1d8bSAndy Fleming 258b31a1d8bSAndy Fleming tbi2: tbi-phy@11 { 259b31a1d8bSAndy Fleming reg = <0x11>; 260b31a1d8bSAndy Fleming device_type = "tbi-phy"; 261b31a1d8bSAndy Fleming }; 262b31a1d8bSAndy Fleming }; 26384ba4a58SAnton Vorontsov }; 264b31a1d8bSAndy Fleming 26584ba4a58SAnton Vorontsov enet3: ethernet@27000 { 26684ba4a58SAnton Vorontsov #address-cells = <1>; 26784ba4a58SAnton Vorontsov #size-cells = <1>; 26884ba4a58SAnton Vorontsov cell-index = <3>; 26984ba4a58SAnton Vorontsov device_type = "network"; 27084ba4a58SAnton Vorontsov model = "eTSEC"; 27184ba4a58SAnton Vorontsov compatible = "gianfar"; 27284ba4a58SAnton Vorontsov reg = <0x27000 0x1000>; 27384ba4a58SAnton Vorontsov ranges = <0x0 0x27000 0x1000>; 27484ba4a58SAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 27584ba4a58SAnton Vorontsov interrupts = <37 2 38 2 39 2>; 27684ba4a58SAnton Vorontsov interrupt-parent = <&mpic>; 27784ba4a58SAnton Vorontsov tbi-handle = <&tbi3>; 278655544c6SWolfgang Grandegger phy-handle = <&phy5>; 27984ba4a58SAnton Vorontsov 28084ba4a58SAnton Vorontsov mdio@520 { 281b31a1d8bSAndy Fleming #address-cells = <1>; 282b31a1d8bSAndy Fleming #size-cells = <0>; 283b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 28484ba4a58SAnton Vorontsov reg = <0x520 0x20>; 285b31a1d8bSAndy Fleming 286b31a1d8bSAndy Fleming tbi3: tbi-phy@11 { 287b31a1d8bSAndy Fleming reg = <0x11>; 288b31a1d8bSAndy Fleming device_type = "tbi-phy"; 289b31a1d8bSAndy Fleming }; 2906dd1b64aSWolfgang Grandegger }; 2916dd1b64aSWolfgang Grandegger }; 2926dd1b64aSWolfgang Grandegger 2936dd1b64aSWolfgang Grandegger serial0: serial@4500 { 2946dd1b64aSWolfgang Grandegger cell-index = <0>; 2956dd1b64aSWolfgang Grandegger device_type = "serial"; 2966dd1b64aSWolfgang Grandegger compatible = "ns16550"; 2976dd1b64aSWolfgang Grandegger reg = <0x4500 0x100>; // reg base, size 2986dd1b64aSWolfgang Grandegger clock-frequency = <0>; // should we fill in in uboot? 2996dd1b64aSWolfgang Grandegger current-speed = <115200>; 3006dd1b64aSWolfgang Grandegger interrupts = <42 2>; 3016dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 3026dd1b64aSWolfgang Grandegger }; 3036dd1b64aSWolfgang Grandegger 3046dd1b64aSWolfgang Grandegger serial1: serial@4600 { 3056dd1b64aSWolfgang Grandegger cell-index = <1>; 3066dd1b64aSWolfgang Grandegger device_type = "serial"; 3076dd1b64aSWolfgang Grandegger compatible = "ns16550"; 3086dd1b64aSWolfgang Grandegger reg = <0x4600 0x100>; // reg base, size 3096dd1b64aSWolfgang Grandegger clock-frequency = <0>; // should we fill in in uboot? 3106dd1b64aSWolfgang Grandegger current-speed = <115200>; 3116dd1b64aSWolfgang Grandegger interrupts = <42 2>; 3126dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 3136dd1b64aSWolfgang Grandegger }; 3146dd1b64aSWolfgang Grandegger 3156dd1b64aSWolfgang Grandegger global-utilities@e0000 { // global utilities reg 3166dd1b64aSWolfgang Grandegger compatible = "fsl,mpc8548-guts"; 3176dd1b64aSWolfgang Grandegger reg = <0xe0000 0x1000>; 3186dd1b64aSWolfgang Grandegger fsl,has-rstcr; 3196dd1b64aSWolfgang Grandegger }; 3206dd1b64aSWolfgang Grandegger 3216dd1b64aSWolfgang Grandegger mpic: pic@40000 { 3226dd1b64aSWolfgang Grandegger interrupt-controller; 3236dd1b64aSWolfgang Grandegger #address-cells = <0>; 3246dd1b64aSWolfgang Grandegger #interrupt-cells = <2>; 3256dd1b64aSWolfgang Grandegger reg = <0x40000 0x40000>; 3266dd1b64aSWolfgang Grandegger compatible = "chrp,open-pic"; 3276dd1b64aSWolfgang Grandegger device_type = "open-pic"; 3286dd1b64aSWolfgang Grandegger }; 3296dd1b64aSWolfgang Grandegger }; 3306dd1b64aSWolfgang Grandegger 3316dd1b64aSWolfgang Grandegger localbus@e0005000 { 3326dd1b64aSWolfgang Grandegger compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", 3336dd1b64aSWolfgang Grandegger "simple-bus"; 3346dd1b64aSWolfgang Grandegger #address-cells = <2>; 3356dd1b64aSWolfgang Grandegger #size-cells = <1>; 3366dd1b64aSWolfgang Grandegger reg = <0xe0005000 0x100>; // BRx, ORx, etc. 3376dd1b64aSWolfgang Grandegger 3386dd1b64aSWolfgang Grandegger ranges = < 3396dd1b64aSWolfgang Grandegger 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 3406dd1b64aSWolfgang Grandegger 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 3416dd1b64aSWolfgang Grandegger 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) 3426dd1b64aSWolfgang Grandegger 3 0x0 0xe3010000 0x00008000 // NAND FLASH 3436dd1b64aSWolfgang Grandegger 3446dd1b64aSWolfgang Grandegger >; 3456dd1b64aSWolfgang Grandegger 3466dd1b64aSWolfgang Grandegger flash@1,0 { 3476dd1b64aSWolfgang Grandegger #address-cells = <1>; 3486dd1b64aSWolfgang Grandegger #size-cells = <1>; 3496dd1b64aSWolfgang Grandegger compatible = "cfi-flash"; 3506dd1b64aSWolfgang Grandegger reg = <1 0x0 0x8000000>; 3516dd1b64aSWolfgang Grandegger bank-width = <4>; 3526dd1b64aSWolfgang Grandegger device-width = <1>; 3536dd1b64aSWolfgang Grandegger 3546dd1b64aSWolfgang Grandegger partition@0 { 3556dd1b64aSWolfgang Grandegger label = "kernel"; 3566dd1b64aSWolfgang Grandegger reg = <0x00000000 0x00200000>; 3576dd1b64aSWolfgang Grandegger }; 3586dd1b64aSWolfgang Grandegger partition@200000 { 3596dd1b64aSWolfgang Grandegger label = "root"; 3606dd1b64aSWolfgang Grandegger reg = <0x00200000 0x00300000>; 3616dd1b64aSWolfgang Grandegger }; 3626dd1b64aSWolfgang Grandegger partition@500000 { 3636dd1b64aSWolfgang Grandegger label = "user"; 3646dd1b64aSWolfgang Grandegger reg = <0x00500000 0x07a00000>; 3656dd1b64aSWolfgang Grandegger }; 3666dd1b64aSWolfgang Grandegger partition@7f00000 { 3676dd1b64aSWolfgang Grandegger label = "env1"; 3686dd1b64aSWolfgang Grandegger reg = <0x07f00000 0x00040000>; 3696dd1b64aSWolfgang Grandegger }; 3706dd1b64aSWolfgang Grandegger partition@7f40000 { 3716dd1b64aSWolfgang Grandegger label = "env2"; 3726dd1b64aSWolfgang Grandegger reg = <0x07f40000 0x00040000>; 3736dd1b64aSWolfgang Grandegger }; 3746dd1b64aSWolfgang Grandegger partition@7f80000 { 3756dd1b64aSWolfgang Grandegger label = "u-boot"; 3766dd1b64aSWolfgang Grandegger reg = <0x07f80000 0x00080000>; 3776dd1b64aSWolfgang Grandegger read-only; 3786dd1b64aSWolfgang Grandegger }; 3796dd1b64aSWolfgang Grandegger }; 3806dd1b64aSWolfgang Grandegger 3816dd1b64aSWolfgang Grandegger /* Note: CAN support needs be enabled in U-Boot */ 3826dd1b64aSWolfgang Grandegger can0@2,0 { 3836dd1b64aSWolfgang Grandegger compatible = "intel,82527"; // Bosch CC770 3846dd1b64aSWolfgang Grandegger reg = <2 0x0 0x100>; 3857a385241SWolfgang Grandegger interrupts = <4 1>; 3866dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 3876dd1b64aSWolfgang Grandegger }; 3886dd1b64aSWolfgang Grandegger 3896dd1b64aSWolfgang Grandegger can1@2,100 { 3906dd1b64aSWolfgang Grandegger compatible = "intel,82527"; // Bosch CC770 3916dd1b64aSWolfgang Grandegger reg = <2 0x100 0x100>; 3927a385241SWolfgang Grandegger interrupts = <4 1>; 3936dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 3946dd1b64aSWolfgang Grandegger }; 3956dd1b64aSWolfgang Grandegger 3966dd1b64aSWolfgang Grandegger /* Note: NAND support needs to be enabled in U-Boot */ 3976dd1b64aSWolfgang Grandegger upm@3,0 { 3986dd1b64aSWolfgang Grandegger #address-cells = <0>; 3996dd1b64aSWolfgang Grandegger #size-cells = <0>; 4006dd1b64aSWolfgang Grandegger compatible = "fsl,upm-nand"; 4016dd1b64aSWolfgang Grandegger reg = <3 0x0 0x800>; 4026dd1b64aSWolfgang Grandegger fsl,upm-addr-offset = <0x10>; 4036dd1b64aSWolfgang Grandegger fsl,upm-cmd-offset = <0x08>; 4046dd1b64aSWolfgang Grandegger chip-delay = <25>; // in micro-seconds 4056dd1b64aSWolfgang Grandegger 4066dd1b64aSWolfgang Grandegger nand@0 { 4076dd1b64aSWolfgang Grandegger #address-cells = <1>; 4086dd1b64aSWolfgang Grandegger #size-cells = <1>; 4096dd1b64aSWolfgang Grandegger 4106dd1b64aSWolfgang Grandegger partition@0 { 4116dd1b64aSWolfgang Grandegger label = "fs"; 4126dd1b64aSWolfgang Grandegger reg = <0x00000000 0x01000000>; 4136dd1b64aSWolfgang Grandegger }; 4146dd1b64aSWolfgang Grandegger }; 4156dd1b64aSWolfgang Grandegger }; 4166dd1b64aSWolfgang Grandegger }; 4176dd1b64aSWolfgang Grandegger 4186dd1b64aSWolfgang Grandegger pci0: pci@e0008000 { 4196dd1b64aSWolfgang Grandegger cell-index = <0>; 4206dd1b64aSWolfgang Grandegger #interrupt-cells = <1>; 4216dd1b64aSWolfgang Grandegger #size-cells = <2>; 4226dd1b64aSWolfgang Grandegger #address-cells = <3>; 4236dd1b64aSWolfgang Grandegger compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 4246dd1b64aSWolfgang Grandegger device_type = "pci"; 4256dd1b64aSWolfgang Grandegger reg = <0xe0008000 0x1000>; 4266dd1b64aSWolfgang Grandegger clock-frequency = <33333333>; 4276dd1b64aSWolfgang Grandegger interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 4286dd1b64aSWolfgang Grandegger interrupt-map = < 4296dd1b64aSWolfgang Grandegger /* IDSEL 28 */ 4306dd1b64aSWolfgang Grandegger 0xe000 0 0 1 &mpic 2 1 4316dd1b64aSWolfgang Grandegger 0xe000 0 0 2 &mpic 3 1>; 4326dd1b64aSWolfgang Grandegger 4336dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 4346dd1b64aSWolfgang Grandegger interrupts = <24 2>; 4356dd1b64aSWolfgang Grandegger bus-range = <0 0>; 4366dd1b64aSWolfgang Grandegger ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 4376dd1b64aSWolfgang Grandegger 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; 4386dd1b64aSWolfgang Grandegger }; 4396dd1b64aSWolfgang Grandegger 4406dd1b64aSWolfgang Grandegger pci1: pcie@e000a000 { 4416dd1b64aSWolfgang Grandegger cell-index = <2>; 4426dd1b64aSWolfgang Grandegger interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 4436dd1b64aSWolfgang Grandegger interrupt-map = < 4446dd1b64aSWolfgang Grandegger /* IDSEL 0x0 (PEX) */ 4456dd1b64aSWolfgang Grandegger 0x00000 0 0 1 &mpic 0 1 4466dd1b64aSWolfgang Grandegger 0x00000 0 0 2 &mpic 1 1 4476dd1b64aSWolfgang Grandegger 0x00000 0 0 3 &mpic 2 1 4486dd1b64aSWolfgang Grandegger 0x00000 0 0 4 &mpic 3 1>; 4496dd1b64aSWolfgang Grandegger 4506dd1b64aSWolfgang Grandegger interrupt-parent = <&mpic>; 4516dd1b64aSWolfgang Grandegger interrupts = <26 2>; 4526dd1b64aSWolfgang Grandegger bus-range = <0 0xff>; 4536dd1b64aSWolfgang Grandegger ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x20000000 4546dd1b64aSWolfgang Grandegger 0x01000000 0 0x00000000 0xef000000 0 0x08000000>; 4556dd1b64aSWolfgang Grandegger clock-frequency = <33333333>; 4566dd1b64aSWolfgang Grandegger #interrupt-cells = <1>; 4576dd1b64aSWolfgang Grandegger #size-cells = <2>; 4586dd1b64aSWolfgang Grandegger #address-cells = <3>; 4596dd1b64aSWolfgang Grandegger reg = <0xe000a000 0x1000>; 4606dd1b64aSWolfgang Grandegger compatible = "fsl,mpc8548-pcie"; 4616dd1b64aSWolfgang Grandegger device_type = "pci"; 4626dd1b64aSWolfgang Grandegger pcie@0 { 4636dd1b64aSWolfgang Grandegger reg = <0 0 0 0 0>; 4646dd1b64aSWolfgang Grandegger #size-cells = <2>; 4656dd1b64aSWolfgang Grandegger #address-cells = <3>; 4666dd1b64aSWolfgang Grandegger device_type = "pci"; 4676dd1b64aSWolfgang Grandegger ranges = <0x02000000 0 0xc0000000 0x02000000 0 4686dd1b64aSWolfgang Grandegger 0xc0000000 0 0x20000000 4696dd1b64aSWolfgang Grandegger 0x01000000 0 0x00000000 0x01000000 0 4706dd1b64aSWolfgang Grandegger 0x00000000 0 0x08000000>; 4716dd1b64aSWolfgang Grandegger }; 4726dd1b64aSWolfgang Grandegger }; 4736dd1b64aSWolfgang Grandegger}; 474