1/*
2 * TQM 8541 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute  it and/or modify it
7 * under  the terms of  the GNU General  Public License as published by the
8 * Free Software Foundation;  either version 2 of the  License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15	model = "tqm,8541";
16	compatible = "tqm,8541", "tqm,85xx";
17	#address-cells = <1>;
18	#size-cells = <1>;
19
20	aliases {
21		ethernet0 = &enet0;
22		ethernet1 = &enet1;
23		serial0 = &serial0;
24		serial1 = &serial1;
25		pci0 = &pci0;
26	};
27
28	cpus {
29		#address-cells = <1>;
30		#size-cells = <0>;
31
32		PowerPC,8541@0 {
33			device_type = "cpu";
34			reg = <0>;
35			d-cache-line-size = <32>;
36			i-cache-line-size = <32>;
37			d-cache-size = <32768>;
38			i-cache-size = <32768>;
39			timebase-frequency = <0>;
40			bus-frequency = <0>;
41			clock-frequency = <0>;
42			next-level-cache = <&L2>;
43		};
44	};
45
46	memory {
47		device_type = "memory";
48		reg = <0x00000000 0x10000000>;
49	};
50
51	soc@e0000000 {
52		#address-cells = <1>;
53		#size-cells = <1>;
54		device_type = "soc";
55		ranges = <0x0 0xe0000000 0x100000>;
56		reg = <0xe0000000 0x200>;
57		bus-frequency = <0>;
58		compatible = "fsl,mpc8541-immr", "simple-bus";
59
60		memory-controller@2000 {
61			compatible = "fsl,8540-memory-controller";
62			reg = <0x2000 0x1000>;
63			interrupt-parent = <&mpic>;
64			interrupts = <18 2>;
65		};
66
67		L2: l2-cache-controller@20000 {
68			compatible = "fsl,8540-l2-cache-controller";
69			reg = <0x20000 0x1000>;
70			cache-line-size = <32>;
71			cache-size = <0x40000>;	// L2, 256K
72			interrupt-parent = <&mpic>;
73			interrupts = <16 2>;
74		};
75
76		i2c@3000 {
77			#address-cells = <1>;
78			#size-cells = <0>;
79			cell-index = <0>;
80			compatible = "fsl-i2c";
81			reg = <0x3000 0x100>;
82			interrupts = <43 2>;
83			interrupt-parent = <&mpic>;
84			dfsrr;
85
86			rtc@68 {
87				compatible = "dallas,ds1337";
88				reg = <0x68>;
89			};
90		};
91
92		mdio@24520 {
93			#address-cells = <1>;
94			#size-cells = <0>;
95			compatible = "fsl,gianfar-mdio";
96			reg = <0x24520 0x20>;
97
98			phy1: ethernet-phy@1 {
99				interrupt-parent = <&mpic>;
100				interrupts = <8 1>;
101				reg = <1>;
102				device_type = "ethernet-phy";
103			};
104			phy2: ethernet-phy@2 {
105				interrupt-parent = <&mpic>;
106				interrupts = <8 1>;
107				reg = <2>;
108				device_type = "ethernet-phy";
109			};
110			phy3: ethernet-phy@3 {
111				interrupt-parent = <&mpic>;
112				interrupts = <8 1>;
113				reg = <3>;
114				device_type = "ethernet-phy";
115			};
116		};
117
118		enet0: ethernet@24000 {
119			cell-index = <0>;
120			device_type = "network";
121			model = "TSEC";
122			compatible = "gianfar";
123			reg = <0x24000 0x1000>;
124			local-mac-address = [ 00 00 00 00 00 00 ];
125			interrupts = <29 2 30 2 34 2>;
126			interrupt-parent = <&mpic>;
127			phy-handle = <&phy2>;
128		};
129
130		enet1: ethernet@25000 {
131			cell-index = <1>;
132			device_type = "network";
133			model = "TSEC";
134			compatible = "gianfar";
135			reg = <0x25000 0x1000>;
136			local-mac-address = [ 00 00 00 00 00 00 ];
137			interrupts = <35 2 36 2 40 2>;
138			interrupt-parent = <&mpic>;
139			phy-handle = <&phy1>;
140		};
141
142		serial0: serial@4500 {
143			cell-index = <0>;
144			device_type = "serial";
145			compatible = "ns16550";
146			reg = <0x4500 0x100>; 	// reg base, size
147			clock-frequency = <0>; 	// should we fill in in uboot?
148			interrupts = <42 2>;
149			interrupt-parent = <&mpic>;
150		};
151
152		serial1: serial@4600 {
153			cell-index = <1>;
154			device_type = "serial";
155			compatible = "ns16550";
156			reg = <0x4600 0x100>;	// reg base, size
157			clock-frequency = <0>; 	// should we fill in in uboot?
158			interrupts = <42 2>;
159			interrupt-parent = <&mpic>;
160		};
161
162		mpic: pic@40000 {
163			interrupt-controller;
164			#address-cells = <0>;
165			#interrupt-cells = <2>;
166			reg = <0x40000 0x40000>;
167			device_type = "open-pic";
168			compatible = "chrp,open-pic";
169		};
170
171		cpm@919c0 {
172			#address-cells = <1>;
173			#size-cells = <1>;
174			compatible = "fsl,mpc8541-cpm", "fsl,cpm2", "simple-bus";
175			reg = <0x919c0 0x30>;
176			ranges;
177
178			muram@80000 {
179				#address-cells = <1>;
180				#size-cells = <1>;
181				ranges = <0 0x80000 0x10000>;
182
183				data@0 {
184					compatible = "fsl,cpm-muram-data";
185					reg = <0 0x2000 0x9000 0x1000>;
186				};
187			};
188
189			brg@919f0 {
190				compatible = "fsl,mpc8541-brg",
191				             "fsl,cpm2-brg",
192				             "fsl,cpm-brg";
193				reg = <0x919f0 0x10 0x915f0 0x10>;
194				clock-frequency = <0>;
195			};
196
197			cpmpic: pic@90c00 {
198				interrupt-controller;
199				#address-cells = <0>;
200				#interrupt-cells = <2>;
201				interrupts = <46 2>;
202				interrupt-parent = <&mpic>;
203				reg = <0x90c00 0x80>;
204				compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic";
205			};
206		};
207	};
208
209	pci0: pci@e0008000 {
210		cell-index = <0>;
211		#interrupt-cells = <1>;
212		#size-cells = <2>;
213		#address-cells = <3>;
214		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
215		device_type = "pci";
216		reg = <0xe0008000 0x1000>;
217		clock-frequency = <66666666>;
218		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
219		interrupt-map = <
220				/* IDSEL 28 */
221				 0xe000 0 0 1 &mpic 2 1
222				 0xe000 0 0 2 &mpic 3 1>;
223
224		interrupt-parent = <&mpic>;
225		interrupts = <24 2>;
226		bus-range = <0 0>;
227		ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
228			  0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
229	};
230};
231