10052bc5dSKumar Gala/*
20052bc5dSKumar Gala * TQM 8540 Device Tree Source
30052bc5dSKumar Gala *
40052bc5dSKumar Gala * Copyright 2008 Freescale Semiconductor Inc.
50052bc5dSKumar Gala *
60052bc5dSKumar Gala * This program is free software; you can redistribute  it and/or modify it
70052bc5dSKumar Gala * under  the terms of  the GNU General  Public License as published by the
80052bc5dSKumar Gala * Free Software Foundation;  either version 2 of the  License, or (at your
90052bc5dSKumar Gala * option) any later version.
100052bc5dSKumar Gala */
110052bc5dSKumar Gala
120052bc5dSKumar Gala/dts-v1/;
130052bc5dSKumar Gala
140052bc5dSKumar Gala/ {
150052bc5dSKumar Gala	model = "tqm,8540";
160052bc5dSKumar Gala	compatible = "tqm,8540", "tqm,85xx";
170052bc5dSKumar Gala	#address-cells = <1>;
180052bc5dSKumar Gala	#size-cells = <1>;
190052bc5dSKumar Gala
200052bc5dSKumar Gala	aliases {
210052bc5dSKumar Gala		ethernet0 = &enet0;
220052bc5dSKumar Gala		ethernet1 = &enet1;
230052bc5dSKumar Gala		ethernet2 = &enet2;
240052bc5dSKumar Gala		serial0 = &serial0;
250052bc5dSKumar Gala		serial1 = &serial1;
260052bc5dSKumar Gala		pci0 = &pci0;
270052bc5dSKumar Gala	};
280052bc5dSKumar Gala
290052bc5dSKumar Gala	cpus {
300052bc5dSKumar Gala		#address-cells = <1>;
310052bc5dSKumar Gala		#size-cells = <0>;
320052bc5dSKumar Gala
330052bc5dSKumar Gala		PowerPC,8540@0 {
340052bc5dSKumar Gala			device_type = "cpu";
350052bc5dSKumar Gala			reg = <0>;
360052bc5dSKumar Gala			d-cache-line-size = <32>;
370052bc5dSKumar Gala			i-cache-line-size = <32>;
380052bc5dSKumar Gala			d-cache-size = <32768>;
390052bc5dSKumar Gala			i-cache-size = <32768>;
400052bc5dSKumar Gala			timebase-frequency = <0>;
410052bc5dSKumar Gala			bus-frequency = <0>;
420052bc5dSKumar Gala			clock-frequency = <0>;
430052bc5dSKumar Gala		};
440052bc5dSKumar Gala	};
450052bc5dSKumar Gala
460052bc5dSKumar Gala	memory {
470052bc5dSKumar Gala		device_type = "memory";
480052bc5dSKumar Gala		reg = <0x00000000 0x10000000>;
490052bc5dSKumar Gala	};
500052bc5dSKumar Gala
51f67be814SKumar Gala	soc@e0000000 {
520052bc5dSKumar Gala		#address-cells = <1>;
530052bc5dSKumar Gala		#size-cells = <1>;
540052bc5dSKumar Gala		device_type = "soc";
550052bc5dSKumar Gala		ranges = <0x0 0xe0000000 0x100000>;
560052bc5dSKumar Gala		reg = <0xe0000000 0x200>;
570052bc5dSKumar Gala		bus-frequency = <0>;
580052bc5dSKumar Gala		compatible = "fsl,mpc8540-immr", "simple-bus";
590052bc5dSKumar Gala
600052bc5dSKumar Gala		memory-controller@2000 {
610052bc5dSKumar Gala			compatible = "fsl,8540-memory-controller";
620052bc5dSKumar Gala			reg = <0x2000 0x1000>;
630052bc5dSKumar Gala			interrupt-parent = <&mpic>;
640052bc5dSKumar Gala			interrupts = <18 2>;
650052bc5dSKumar Gala		};
660052bc5dSKumar Gala
670052bc5dSKumar Gala		l2-cache-controller@20000 {
680052bc5dSKumar Gala			compatible = "fsl,8540-l2-cache-controller";
690052bc5dSKumar Gala			reg = <0x20000 0x1000>;
700052bc5dSKumar Gala			cache-line-size = <32>;
710052bc5dSKumar Gala			cache-size = <0x40000>;	// L2, 256K
720052bc5dSKumar Gala			interrupt-parent = <&mpic>;
730052bc5dSKumar Gala			interrupts = <16 2>;
740052bc5dSKumar Gala		};
750052bc5dSKumar Gala
760052bc5dSKumar Gala		i2c@3000 {
770052bc5dSKumar Gala			#address-cells = <1>;
780052bc5dSKumar Gala			#size-cells = <0>;
790052bc5dSKumar Gala			cell-index = <0>;
800052bc5dSKumar Gala			compatible = "fsl-i2c";
810052bc5dSKumar Gala			reg = <0x3000 0x100>;
820052bc5dSKumar Gala			interrupts = <43 2>;
830052bc5dSKumar Gala			interrupt-parent = <&mpic>;
840052bc5dSKumar Gala			dfsrr;
850052bc5dSKumar Gala
860052bc5dSKumar Gala			rtc@68 {
870052bc5dSKumar Gala				compatible = "dallas,ds1337";
880052bc5dSKumar Gala				reg = <0x68>;
890052bc5dSKumar Gala			};
900052bc5dSKumar Gala		};
910052bc5dSKumar Gala
920052bc5dSKumar Gala		mdio@24520 {
930052bc5dSKumar Gala			#address-cells = <1>;
940052bc5dSKumar Gala			#size-cells = <0>;
950052bc5dSKumar Gala			compatible = "fsl,gianfar-mdio";
960052bc5dSKumar Gala			reg = <0x24520 0x20>;
970052bc5dSKumar Gala
980052bc5dSKumar Gala			phy1: ethernet-phy@1 {
990052bc5dSKumar Gala				interrupt-parent = <&mpic>;
1000052bc5dSKumar Gala				interrupts = <8 1>;
1010052bc5dSKumar Gala				reg = <1>;
1020052bc5dSKumar Gala				device_type = "ethernet-phy";
1030052bc5dSKumar Gala			};
1040052bc5dSKumar Gala			phy2: ethernet-phy@2 {
1050052bc5dSKumar Gala				interrupt-parent = <&mpic>;
1060052bc5dSKumar Gala				interrupts = <8 1>;
1070052bc5dSKumar Gala				reg = <2>;
1080052bc5dSKumar Gala				device_type = "ethernet-phy";
1090052bc5dSKumar Gala			};
1100052bc5dSKumar Gala			phy3: ethernet-phy@3 {
1110052bc5dSKumar Gala				interrupt-parent = <&mpic>;
1120052bc5dSKumar Gala				interrupts = <8 1>;
1130052bc5dSKumar Gala				reg = <3>;
1140052bc5dSKumar Gala				device_type = "ethernet-phy";
1150052bc5dSKumar Gala			};
1160052bc5dSKumar Gala		};
1170052bc5dSKumar Gala
1180052bc5dSKumar Gala		enet0: ethernet@24000 {
1190052bc5dSKumar Gala			cell-index = <0>;
1200052bc5dSKumar Gala			device_type = "network";
1210052bc5dSKumar Gala			model = "TSEC";
1220052bc5dSKumar Gala			compatible = "gianfar";
1230052bc5dSKumar Gala			reg = <0x24000 0x1000>;
1240052bc5dSKumar Gala			local-mac-address = [ 00 00 00 00 00 00 ];
1250052bc5dSKumar Gala			interrupts = <29 2 30 2 34 2>;
1260052bc5dSKumar Gala			interrupt-parent = <&mpic>;
1270052bc5dSKumar Gala			phy-handle = <&phy2>;
1280052bc5dSKumar Gala		};
1290052bc5dSKumar Gala
1300052bc5dSKumar Gala		enet1: ethernet@25000 {
1310052bc5dSKumar Gala			cell-index = <1>;
1320052bc5dSKumar Gala			device_type = "network";
1330052bc5dSKumar Gala			model = "TSEC";
1340052bc5dSKumar Gala			compatible = "gianfar";
1350052bc5dSKumar Gala			reg = <0x25000 0x1000>;
1360052bc5dSKumar Gala			local-mac-address = [ 00 00 00 00 00 00 ];
1370052bc5dSKumar Gala			interrupts = <35 2 36 2 40 2>;
1380052bc5dSKumar Gala			interrupt-parent = <&mpic>;
1390052bc5dSKumar Gala			phy-handle = <&phy1>;
1400052bc5dSKumar Gala		};
1410052bc5dSKumar Gala
1420052bc5dSKumar Gala		enet2: ethernet@26000 {
1430052bc5dSKumar Gala			cell-index = <2>;
1440052bc5dSKumar Gala			device_type = "network";
1450052bc5dSKumar Gala			model = "FEC";
1460052bc5dSKumar Gala			compatible = "gianfar";
1470052bc5dSKumar Gala			reg = <0x26000 0x1000>;
1480052bc5dSKumar Gala			local-mac-address = [ 00 00 00 00 00 00 ];
1490052bc5dSKumar Gala			interrupts = <41 2>;
1500052bc5dSKumar Gala			interrupt-parent = <&mpic>;
1510052bc5dSKumar Gala			phy-handle = <&phy3>;
1520052bc5dSKumar Gala		};
1530052bc5dSKumar Gala
1540052bc5dSKumar Gala		serial0: serial@4500 {
1550052bc5dSKumar Gala			cell-index = <0>;
1560052bc5dSKumar Gala			device_type = "serial";
1570052bc5dSKumar Gala			compatible = "ns16550";
1580052bc5dSKumar Gala			reg = <0x4500 0x100>; 	// reg base, size
1590052bc5dSKumar Gala			clock-frequency = <0>; 	// should we fill in in uboot?
1600052bc5dSKumar Gala			interrupts = <42 2>;
1610052bc5dSKumar Gala			interrupt-parent = <&mpic>;
1620052bc5dSKumar Gala		};
1630052bc5dSKumar Gala
1640052bc5dSKumar Gala		serial1: serial@4600 {
1650052bc5dSKumar Gala			cell-index = <1>;
1660052bc5dSKumar Gala			device_type = "serial";
1670052bc5dSKumar Gala			compatible = "ns16550";
1680052bc5dSKumar Gala			reg = <0x4600 0x100>;	// reg base, size
1690052bc5dSKumar Gala			clock-frequency = <0>; 	// should we fill in in uboot?
1700052bc5dSKumar Gala			interrupts = <42 2>;
1710052bc5dSKumar Gala			interrupt-parent = <&mpic>;
1720052bc5dSKumar Gala		};
1730052bc5dSKumar Gala
1740052bc5dSKumar Gala		mpic: pic@40000 {
1750052bc5dSKumar Gala			interrupt-controller;
1760052bc5dSKumar Gala			#address-cells = <0>;
1770052bc5dSKumar Gala			#interrupt-cells = <2>;
1780052bc5dSKumar Gala			reg = <0x40000 0x40000>;
1790052bc5dSKumar Gala			device_type = "open-pic";
1800052bc5dSKumar Gala		};
1810052bc5dSKumar Gala	};
1820052bc5dSKumar Gala
1830052bc5dSKumar Gala	pci0: pci@e0008000 {
1840052bc5dSKumar Gala		cell-index = <0>;
1850052bc5dSKumar Gala		#interrupt-cells = <1>;
1860052bc5dSKumar Gala		#size-cells = <2>;
1870052bc5dSKumar Gala		#address-cells = <3>;
1880052bc5dSKumar Gala		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
1890052bc5dSKumar Gala		device_type = "pci";
1900052bc5dSKumar Gala		reg = <0xe0008000 0x1000>;
1910052bc5dSKumar Gala		clock-frequency = <66666666>;
1920052bc5dSKumar Gala		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
1930052bc5dSKumar Gala		interrupt-map = <
1940052bc5dSKumar Gala				/* IDSEL 28 */
1950052bc5dSKumar Gala				 0xe000 0 0 1 &mpic 2 1
1960052bc5dSKumar Gala				 0xe000 0 0 2 &mpic 3 1>;
1970052bc5dSKumar Gala
1980052bc5dSKumar Gala		interrupt-parent = <&mpic>;
1990052bc5dSKumar Gala		interrupts = <24 2>;
2000052bc5dSKumar Gala		bus-range = <0 0>;
2010052bc5dSKumar Gala		ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
2020052bc5dSKumar Gala			  0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
2030052bc5dSKumar Gala	};
2040052bc5dSKumar Gala};
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