10052bc5dSKumar Gala/* 20052bc5dSKumar Gala * TQM 8540 Device Tree Source 30052bc5dSKumar Gala * 40052bc5dSKumar Gala * Copyright 2008 Freescale Semiconductor Inc. 50052bc5dSKumar Gala * 60052bc5dSKumar Gala * This program is free software; you can redistribute it and/or modify it 70052bc5dSKumar Gala * under the terms of the GNU General Public License as published by the 80052bc5dSKumar Gala * Free Software Foundation; either version 2 of the License, or (at your 90052bc5dSKumar Gala * option) any later version. 100052bc5dSKumar Gala */ 110052bc5dSKumar Gala 120052bc5dSKumar Gala/dts-v1/; 130052bc5dSKumar Gala 140052bc5dSKumar Gala/ { 154fb035f6SWolfgang Grandegger model = "tqc,tqm8540"; 164fb035f6SWolfgang Grandegger compatible = "tqc,tqm8540"; 170052bc5dSKumar Gala #address-cells = <1>; 180052bc5dSKumar Gala #size-cells = <1>; 190052bc5dSKumar Gala 200052bc5dSKumar Gala aliases { 210052bc5dSKumar Gala ethernet0 = &enet0; 220052bc5dSKumar Gala ethernet1 = &enet1; 230052bc5dSKumar Gala ethernet2 = &enet2; 240052bc5dSKumar Gala serial0 = &serial0; 250052bc5dSKumar Gala serial1 = &serial1; 260052bc5dSKumar Gala pci0 = &pci0; 270052bc5dSKumar Gala }; 280052bc5dSKumar Gala 290052bc5dSKumar Gala cpus { 300052bc5dSKumar Gala #address-cells = <1>; 310052bc5dSKumar Gala #size-cells = <0>; 320052bc5dSKumar Gala 330052bc5dSKumar Gala PowerPC,8540@0 { 340052bc5dSKumar Gala device_type = "cpu"; 350052bc5dSKumar Gala reg = <0>; 360052bc5dSKumar Gala d-cache-line-size = <32>; 370052bc5dSKumar Gala i-cache-line-size = <32>; 380052bc5dSKumar Gala d-cache-size = <32768>; 390052bc5dSKumar Gala i-cache-size = <32768>; 400052bc5dSKumar Gala timebase-frequency = <0>; 410052bc5dSKumar Gala bus-frequency = <0>; 420052bc5dSKumar Gala clock-frequency = <0>; 43c054065bSKumar Gala next-level-cache = <&L2>; 440052bc5dSKumar Gala }; 450052bc5dSKumar Gala }; 460052bc5dSKumar Gala 470052bc5dSKumar Gala memory { 480052bc5dSKumar Gala device_type = "memory"; 490052bc5dSKumar Gala reg = <0x00000000 0x10000000>; 500052bc5dSKumar Gala }; 510052bc5dSKumar Gala 52f67be814SKumar Gala soc@e0000000 { 530052bc5dSKumar Gala #address-cells = <1>; 540052bc5dSKumar Gala #size-cells = <1>; 550052bc5dSKumar Gala device_type = "soc"; 560052bc5dSKumar Gala ranges = <0x0 0xe0000000 0x100000>; 570052bc5dSKumar Gala reg = <0xe0000000 0x200>; 580052bc5dSKumar Gala bus-frequency = <0>; 590052bc5dSKumar Gala compatible = "fsl,mpc8540-immr", "simple-bus"; 600052bc5dSKumar Gala 610052bc5dSKumar Gala memory-controller@2000 { 620052bc5dSKumar Gala compatible = "fsl,8540-memory-controller"; 630052bc5dSKumar Gala reg = <0x2000 0x1000>; 640052bc5dSKumar Gala interrupt-parent = <&mpic>; 650052bc5dSKumar Gala interrupts = <18 2>; 660052bc5dSKumar Gala }; 670052bc5dSKumar Gala 68c054065bSKumar Gala L2: l2-cache-controller@20000 { 690052bc5dSKumar Gala compatible = "fsl,8540-l2-cache-controller"; 700052bc5dSKumar Gala reg = <0x20000 0x1000>; 710052bc5dSKumar Gala cache-line-size = <32>; 720052bc5dSKumar Gala cache-size = <0x40000>; // L2, 256K 730052bc5dSKumar Gala interrupt-parent = <&mpic>; 740052bc5dSKumar Gala interrupts = <16 2>; 750052bc5dSKumar Gala }; 760052bc5dSKumar Gala 770052bc5dSKumar Gala i2c@3000 { 780052bc5dSKumar Gala #address-cells = <1>; 790052bc5dSKumar Gala #size-cells = <0>; 800052bc5dSKumar Gala cell-index = <0>; 810052bc5dSKumar Gala compatible = "fsl-i2c"; 820052bc5dSKumar Gala reg = <0x3000 0x100>; 830052bc5dSKumar Gala interrupts = <43 2>; 840052bc5dSKumar Gala interrupt-parent = <&mpic>; 850052bc5dSKumar Gala dfsrr; 860052bc5dSKumar Gala 870f73a449SWolfgang Grandegger dtt@50 { 880f73a449SWolfgang Grandegger compatible = "national,lm75"; 890f73a449SWolfgang Grandegger reg = <0x50>; 900f73a449SWolfgang Grandegger }; 910f73a449SWolfgang Grandegger 920052bc5dSKumar Gala rtc@68 { 930052bc5dSKumar Gala compatible = "dallas,ds1337"; 940052bc5dSKumar Gala reg = <0x68>; 950052bc5dSKumar Gala }; 960052bc5dSKumar Gala }; 970052bc5dSKumar Gala 98dee80553SKumar Gala dma@21300 { 99dee80553SKumar Gala #address-cells = <1>; 100dee80553SKumar Gala #size-cells = <1>; 101dee80553SKumar Gala compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; 102dee80553SKumar Gala reg = <0x21300 0x4>; 103dee80553SKumar Gala ranges = <0x0 0x21100 0x200>; 104dee80553SKumar Gala cell-index = <0>; 105dee80553SKumar Gala dma-channel@0 { 106dee80553SKumar Gala compatible = "fsl,mpc8540-dma-channel", 107dee80553SKumar Gala "fsl,eloplus-dma-channel"; 108dee80553SKumar Gala reg = <0x0 0x80>; 109dee80553SKumar Gala cell-index = <0>; 110dee80553SKumar Gala interrupt-parent = <&mpic>; 111dee80553SKumar Gala interrupts = <20 2>; 112dee80553SKumar Gala }; 113dee80553SKumar Gala dma-channel@80 { 114dee80553SKumar Gala compatible = "fsl,mpc8540-dma-channel", 115dee80553SKumar Gala "fsl,eloplus-dma-channel"; 116dee80553SKumar Gala reg = <0x80 0x80>; 117dee80553SKumar Gala cell-index = <1>; 118dee80553SKumar Gala interrupt-parent = <&mpic>; 119dee80553SKumar Gala interrupts = <21 2>; 120dee80553SKumar Gala }; 121dee80553SKumar Gala dma-channel@100 { 122dee80553SKumar Gala compatible = "fsl,mpc8540-dma-channel", 123dee80553SKumar Gala "fsl,eloplus-dma-channel"; 124dee80553SKumar Gala reg = <0x100 0x80>; 125dee80553SKumar Gala cell-index = <2>; 126dee80553SKumar Gala interrupt-parent = <&mpic>; 127dee80553SKumar Gala interrupts = <22 2>; 128dee80553SKumar Gala }; 129dee80553SKumar Gala dma-channel@180 { 130dee80553SKumar Gala compatible = "fsl,mpc8540-dma-channel", 131dee80553SKumar Gala "fsl,eloplus-dma-channel"; 132dee80553SKumar Gala reg = <0x180 0x80>; 133dee80553SKumar Gala cell-index = <3>; 134dee80553SKumar Gala interrupt-parent = <&mpic>; 135dee80553SKumar Gala interrupts = <23 2>; 136dee80553SKumar Gala }; 137dee80553SKumar Gala }; 138dee80553SKumar Gala 1390052bc5dSKumar Gala mdio@24520 { 1400052bc5dSKumar Gala #address-cells = <1>; 1410052bc5dSKumar Gala #size-cells = <0>; 1420052bc5dSKumar Gala compatible = "fsl,gianfar-mdio"; 1430052bc5dSKumar Gala reg = <0x24520 0x20>; 1440052bc5dSKumar Gala 1450052bc5dSKumar Gala phy1: ethernet-phy@1 { 1460052bc5dSKumar Gala interrupt-parent = <&mpic>; 1470052bc5dSKumar Gala interrupts = <8 1>; 1480052bc5dSKumar Gala reg = <1>; 1490052bc5dSKumar Gala device_type = "ethernet-phy"; 1500052bc5dSKumar Gala }; 1510052bc5dSKumar Gala phy2: ethernet-phy@2 { 1520052bc5dSKumar Gala interrupt-parent = <&mpic>; 1530052bc5dSKumar Gala interrupts = <8 1>; 1540052bc5dSKumar Gala reg = <2>; 1550052bc5dSKumar Gala device_type = "ethernet-phy"; 1560052bc5dSKumar Gala }; 1570052bc5dSKumar Gala phy3: ethernet-phy@3 { 1580052bc5dSKumar Gala interrupt-parent = <&mpic>; 1590052bc5dSKumar Gala interrupts = <8 1>; 1600052bc5dSKumar Gala reg = <3>; 1610052bc5dSKumar Gala device_type = "ethernet-phy"; 1620052bc5dSKumar Gala }; 163b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 164b31a1d8bSAndy Fleming reg = <0x11>; 165b31a1d8bSAndy Fleming device_type = "tbi-phy"; 166b31a1d8bSAndy Fleming }; 167b31a1d8bSAndy Fleming }; 168b31a1d8bSAndy Fleming 169b31a1d8bSAndy Fleming mdio@25520 { 170b31a1d8bSAndy Fleming #address-cells = <1>; 171b31a1d8bSAndy Fleming #size-cells = <0>; 172b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 173b31a1d8bSAndy Fleming reg = <0x25520 0x20>; 174b31a1d8bSAndy Fleming 175b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 176b31a1d8bSAndy Fleming reg = <0x11>; 177b31a1d8bSAndy Fleming device_type = "tbi-phy"; 178b31a1d8bSAndy Fleming }; 179b31a1d8bSAndy Fleming }; 180b31a1d8bSAndy Fleming 181b31a1d8bSAndy Fleming mdio@26520 { 182b31a1d8bSAndy Fleming #address-cells = <1>; 183b31a1d8bSAndy Fleming #size-cells = <0>; 184b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 185b31a1d8bSAndy Fleming reg = <0x26520 0x20>; 186b31a1d8bSAndy Fleming 187b31a1d8bSAndy Fleming tbi2: tbi-phy@11 { 188b31a1d8bSAndy Fleming reg = <0x11>; 189b31a1d8bSAndy Fleming device_type = "tbi-phy"; 190b31a1d8bSAndy Fleming }; 1910052bc5dSKumar Gala }; 1920052bc5dSKumar Gala 1930052bc5dSKumar Gala enet0: ethernet@24000 { 1940052bc5dSKumar Gala cell-index = <0>; 1950052bc5dSKumar Gala device_type = "network"; 1960052bc5dSKumar Gala model = "TSEC"; 1970052bc5dSKumar Gala compatible = "gianfar"; 1980052bc5dSKumar Gala reg = <0x24000 0x1000>; 1990052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 2000052bc5dSKumar Gala interrupts = <29 2 30 2 34 2>; 2010052bc5dSKumar Gala interrupt-parent = <&mpic>; 2020052bc5dSKumar Gala phy-handle = <&phy2>; 2030052bc5dSKumar Gala }; 2040052bc5dSKumar Gala 2050052bc5dSKumar Gala enet1: ethernet@25000 { 2060052bc5dSKumar Gala cell-index = <1>; 2070052bc5dSKumar Gala device_type = "network"; 2080052bc5dSKumar Gala model = "TSEC"; 2090052bc5dSKumar Gala compatible = "gianfar"; 2100052bc5dSKumar Gala reg = <0x25000 0x1000>; 2110052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 2120052bc5dSKumar Gala interrupts = <35 2 36 2 40 2>; 2130052bc5dSKumar Gala interrupt-parent = <&mpic>; 2140052bc5dSKumar Gala phy-handle = <&phy1>; 2150052bc5dSKumar Gala }; 2160052bc5dSKumar Gala 2170052bc5dSKumar Gala enet2: ethernet@26000 { 2180052bc5dSKumar Gala cell-index = <2>; 2190052bc5dSKumar Gala device_type = "network"; 2200052bc5dSKumar Gala model = "FEC"; 2210052bc5dSKumar Gala compatible = "gianfar"; 2220052bc5dSKumar Gala reg = <0x26000 0x1000>; 2230052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 2240052bc5dSKumar Gala interrupts = <41 2>; 2250052bc5dSKumar Gala interrupt-parent = <&mpic>; 2260052bc5dSKumar Gala phy-handle = <&phy3>; 2270052bc5dSKumar Gala }; 2280052bc5dSKumar Gala 2290052bc5dSKumar Gala serial0: serial@4500 { 2300052bc5dSKumar Gala cell-index = <0>; 2310052bc5dSKumar Gala device_type = "serial"; 2320052bc5dSKumar Gala compatible = "ns16550"; 2330052bc5dSKumar Gala reg = <0x4500 0x100>; // reg base, size 2340052bc5dSKumar Gala clock-frequency = <0>; // should we fill in in uboot? 2350052bc5dSKumar Gala interrupts = <42 2>; 2360052bc5dSKumar Gala interrupt-parent = <&mpic>; 2370052bc5dSKumar Gala }; 2380052bc5dSKumar Gala 2390052bc5dSKumar Gala serial1: serial@4600 { 2400052bc5dSKumar Gala cell-index = <1>; 2410052bc5dSKumar Gala device_type = "serial"; 2420052bc5dSKumar Gala compatible = "ns16550"; 2430052bc5dSKumar Gala reg = <0x4600 0x100>; // reg base, size 2440052bc5dSKumar Gala clock-frequency = <0>; // should we fill in in uboot? 2450052bc5dSKumar Gala interrupts = <42 2>; 2460052bc5dSKumar Gala interrupt-parent = <&mpic>; 2470052bc5dSKumar Gala }; 2480052bc5dSKumar Gala 2490052bc5dSKumar Gala mpic: pic@40000 { 2500052bc5dSKumar Gala interrupt-controller; 2510052bc5dSKumar Gala #address-cells = <0>; 2520052bc5dSKumar Gala #interrupt-cells = <2>; 2530052bc5dSKumar Gala reg = <0x40000 0x40000>; 2540052bc5dSKumar Gala device_type = "open-pic"; 255acd4b715SKumar Gala compatible = "chrp,open-pic"; 2560052bc5dSKumar Gala }; 2570052bc5dSKumar Gala }; 2580052bc5dSKumar Gala 2590052bc5dSKumar Gala pci0: pci@e0008000 { 2600052bc5dSKumar Gala cell-index = <0>; 2610052bc5dSKumar Gala #interrupt-cells = <1>; 2620052bc5dSKumar Gala #size-cells = <2>; 2630052bc5dSKumar Gala #address-cells = <3>; 2640052bc5dSKumar Gala compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 2650052bc5dSKumar Gala device_type = "pci"; 2660052bc5dSKumar Gala reg = <0xe0008000 0x1000>; 2670052bc5dSKumar Gala clock-frequency = <66666666>; 2680052bc5dSKumar Gala interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 2690052bc5dSKumar Gala interrupt-map = < 2700052bc5dSKumar Gala /* IDSEL 28 */ 2710052bc5dSKumar Gala 0xe000 0 0 1 &mpic 2 1 2720052bc5dSKumar Gala 0xe000 0 0 2 &mpic 3 1>; 2730052bc5dSKumar Gala 2740052bc5dSKumar Gala interrupt-parent = <&mpic>; 2750052bc5dSKumar Gala interrupts = <24 2>; 2760052bc5dSKumar Gala bus-range = <0 0>; 2770052bc5dSKumar Gala ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 2780052bc5dSKumar Gala 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; 2790052bc5dSKumar Gala }; 2800052bc5dSKumar Gala}; 281