151974d31SBradley Hughes/* 251974d31SBradley Hughes * MPC8555-based STx GP3 Device Tree Source 351974d31SBradley Hughes * 451974d31SBradley Hughes * Copyright 2006, 2008 Freescale Semiconductor Inc. 551974d31SBradley Hughes * 651974d31SBradley Hughes * Copyright 2010 Silicon Turnkey Express LLC. 751974d31SBradley Hughes * 851974d31SBradley Hughes * This program is free software; you can redistribute it and/or modify it 951974d31SBradley Hughes * under the terms of the GNU General Public License as published by the 1051974d31SBradley Hughes * Free Software Foundation; either version 2 of the License, or (at your 1151974d31SBradley Hughes * option) any later version. 1251974d31SBradley Hughes */ 1351974d31SBradley Hughes 1451974d31SBradley Hughes/dts-v1/; 1551974d31SBradley Hughes 1651974d31SBradley Hughes/ { 1751974d31SBradley Hughes model = "stx,gp3"; 1851974d31SBradley Hughes compatible = "stx,gp3-8560", "stx,gp3"; 1951974d31SBradley Hughes #address-cells = <1>; 2051974d31SBradley Hughes #size-cells = <1>; 2151974d31SBradley Hughes 2251974d31SBradley Hughes aliases { 2351974d31SBradley Hughes ethernet0 = &enet0; 2451974d31SBradley Hughes ethernet1 = &enet1; 2551974d31SBradley Hughes serial0 = &serial0; 2651974d31SBradley Hughes serial1 = &serial1; 2751974d31SBradley Hughes pci0 = &pci0; 2851974d31SBradley Hughes }; 2951974d31SBradley Hughes 3051974d31SBradley Hughes cpus { 3151974d31SBradley Hughes #address-cells = <1>; 3251974d31SBradley Hughes #size-cells = <0>; 3351974d31SBradley Hughes 3451974d31SBradley Hughes PowerPC,8555@0 { 3551974d31SBradley Hughes device_type = "cpu"; 3651974d31SBradley Hughes reg = <0x0>; 3751974d31SBradley Hughes d-cache-line-size = <32>; // 32 bytes 3851974d31SBradley Hughes i-cache-line-size = <32>; // 32 bytes 3951974d31SBradley Hughes d-cache-size = <0x8000>; // L1, 32K 4051974d31SBradley Hughes i-cache-size = <0x8000>; // L1, 32K 4151974d31SBradley Hughes timebase-frequency = <0>; // 33 MHz, from uboot 4251974d31SBradley Hughes bus-frequency = <0>; // 166 MHz 4351974d31SBradley Hughes clock-frequency = <0>; // 825 MHz, from uboot 4451974d31SBradley Hughes next-level-cache = <&L2>; 4551974d31SBradley Hughes }; 4651974d31SBradley Hughes }; 4751974d31SBradley Hughes 4851974d31SBradley Hughes memory { 4951974d31SBradley Hughes device_type = "memory"; 5051974d31SBradley Hughes reg = <0x00000000 0x10000000>; 5151974d31SBradley Hughes }; 5251974d31SBradley Hughes 5351974d31SBradley Hughes soc8555@e0000000 { 5451974d31SBradley Hughes #address-cells = <1>; 5551974d31SBradley Hughes #size-cells = <1>; 5651974d31SBradley Hughes device_type = "soc"; 5751974d31SBradley Hughes compatible = "simple-bus"; 5851974d31SBradley Hughes ranges = <0x0 0xe0000000 0x100000>; 5951974d31SBradley Hughes bus-frequency = <0>; 6051974d31SBradley Hughes 6151974d31SBradley Hughes ecm-law@0 { 6251974d31SBradley Hughes compatible = "fsl,ecm-law"; 6351974d31SBradley Hughes reg = <0x0 0x1000>; 6451974d31SBradley Hughes fsl,num-laws = <8>; 6551974d31SBradley Hughes }; 6651974d31SBradley Hughes 6751974d31SBradley Hughes ecm@1000 { 6851974d31SBradley Hughes compatible = "fsl,mpc8555-ecm", "fsl,ecm"; 6951974d31SBradley Hughes reg = <0x1000 0x1000>; 7051974d31SBradley Hughes interrupts = <17 2>; 7151974d31SBradley Hughes interrupt-parent = <&mpic>; 7251974d31SBradley Hughes }; 7351974d31SBradley Hughes 7451974d31SBradley Hughes memory-controller@2000 { 7551974d31SBradley Hughes compatible = "fsl,mpc8555-memory-controller"; 7651974d31SBradley Hughes reg = <0x2000 0x1000>; 7751974d31SBradley Hughes interrupt-parent = <&mpic>; 7851974d31SBradley Hughes interrupts = <18 2>; 7951974d31SBradley Hughes }; 8051974d31SBradley Hughes 8151974d31SBradley Hughes L2: l2-cache-controller@20000 { 8251974d31SBradley Hughes compatible = "fsl,mpc8555-l2-cache-controller"; 8351974d31SBradley Hughes reg = <0x20000 0x1000>; 8451974d31SBradley Hughes cache-line-size = <32>; // 32 bytes 8551974d31SBradley Hughes cache-size = <0x40000>; // L2, 256K 8651974d31SBradley Hughes interrupt-parent = <&mpic>; 8751974d31SBradley Hughes interrupts = <16 2>; 8851974d31SBradley Hughes }; 8951974d31SBradley Hughes 9051974d31SBradley Hughes i2c@3000 { 9151974d31SBradley Hughes #address-cells = <1>; 9251974d31SBradley Hughes #size-cells = <0>; 9351974d31SBradley Hughes cell-index = <0>; 9451974d31SBradley Hughes compatible = "fsl-i2c"; 9551974d31SBradley Hughes reg = <0x3000 0x100>; 9651974d31SBradley Hughes interrupts = <43 2>; 9751974d31SBradley Hughes interrupt-parent = <&mpic>; 9851974d31SBradley Hughes dfsrr; 9951974d31SBradley Hughes }; 10051974d31SBradley Hughes 10151974d31SBradley Hughes dma@21300 { 10251974d31SBradley Hughes #address-cells = <1>; 10351974d31SBradley Hughes #size-cells = <1>; 10451974d31SBradley Hughes compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; 10551974d31SBradley Hughes reg = <0x21300 0x4>; 10651974d31SBradley Hughes ranges = <0x0 0x21100 0x200>; 10751974d31SBradley Hughes cell-index = <0>; 10851974d31SBradley Hughes dma-channel@0 { 10951974d31SBradley Hughes compatible = "fsl,mpc8555-dma-channel", 11051974d31SBradley Hughes "fsl,eloplus-dma-channel"; 11151974d31SBradley Hughes reg = <0x0 0x80>; 11251974d31SBradley Hughes cell-index = <0>; 11351974d31SBradley Hughes interrupt-parent = <&mpic>; 11451974d31SBradley Hughes interrupts = <20 2>; 11551974d31SBradley Hughes }; 11651974d31SBradley Hughes dma-channel@80 { 11751974d31SBradley Hughes compatible = "fsl,mpc8555-dma-channel", 11851974d31SBradley Hughes "fsl,eloplus-dma-channel"; 11951974d31SBradley Hughes reg = <0x80 0x80>; 12051974d31SBradley Hughes cell-index = <1>; 12151974d31SBradley Hughes interrupt-parent = <&mpic>; 12251974d31SBradley Hughes interrupts = <21 2>; 12351974d31SBradley Hughes }; 12451974d31SBradley Hughes dma-channel@100 { 12551974d31SBradley Hughes compatible = "fsl,mpc8555-dma-channel", 12651974d31SBradley Hughes "fsl,eloplus-dma-channel"; 12751974d31SBradley Hughes reg = <0x100 0x80>; 12851974d31SBradley Hughes cell-index = <2>; 12951974d31SBradley Hughes interrupt-parent = <&mpic>; 13051974d31SBradley Hughes interrupts = <22 2>; 13151974d31SBradley Hughes }; 13251974d31SBradley Hughes dma-channel@180 { 13351974d31SBradley Hughes compatible = "fsl,mpc8555-dma-channel", 13451974d31SBradley Hughes "fsl,eloplus-dma-channel"; 13551974d31SBradley Hughes reg = <0x180 0x80>; 13651974d31SBradley Hughes cell-index = <3>; 13751974d31SBradley Hughes interrupt-parent = <&mpic>; 13851974d31SBradley Hughes interrupts = <23 2>; 13951974d31SBradley Hughes }; 14051974d31SBradley Hughes }; 14151974d31SBradley Hughes 14251974d31SBradley Hughes enet0: ethernet@24000 { 14351974d31SBradley Hughes #address-cells = <1>; 14451974d31SBradley Hughes #size-cells = <1>; 14551974d31SBradley Hughes cell-index = <0>; 14651974d31SBradley Hughes device_type = "network"; 14751974d31SBradley Hughes model = "TSEC"; 14851974d31SBradley Hughes compatible = "gianfar"; 14951974d31SBradley Hughes reg = <0x24000 0x1000>; 15051974d31SBradley Hughes ranges = <0x0 0x24000 0x1000>; 15151974d31SBradley Hughes local-mac-address = [ 00 00 00 00 00 00 ]; 15251974d31SBradley Hughes interrupts = <29 2 30 2 34 2>; 15351974d31SBradley Hughes interrupt-parent = <&mpic>; 15451974d31SBradley Hughes tbi-handle = <&tbi0>; 15551974d31SBradley Hughes phy-handle = <&phy0>; 15651974d31SBradley Hughes 15751974d31SBradley Hughes mdio@520 { 15851974d31SBradley Hughes #address-cells = <1>; 15951974d31SBradley Hughes #size-cells = <0>; 16051974d31SBradley Hughes compatible = "fsl,gianfar-mdio"; 16151974d31SBradley Hughes reg = <0x520 0x20>; 16251974d31SBradley Hughes 16351974d31SBradley Hughes phy0: ethernet-phy@2 { 16451974d31SBradley Hughes interrupt-parent = <&mpic>; 16551974d31SBradley Hughes interrupts = <5 1>; 16651974d31SBradley Hughes reg = <0x2>; 16751974d31SBradley Hughes device_type = "ethernet-phy"; 16851974d31SBradley Hughes }; 16951974d31SBradley Hughes phy1: ethernet-phy@4 { 17051974d31SBradley Hughes interrupt-parent = <&mpic>; 17151974d31SBradley Hughes interrupts = <5 1>; 17251974d31SBradley Hughes reg = <0x4>; 17351974d31SBradley Hughes device_type = "ethernet-phy"; 17451974d31SBradley Hughes }; 17551974d31SBradley Hughes tbi0: tbi-phy@11 { 17651974d31SBradley Hughes reg = <0x11>; 17751974d31SBradley Hughes device_type = "tbi-phy"; 17851974d31SBradley Hughes }; 17951974d31SBradley Hughes }; 18051974d31SBradley Hughes }; 18151974d31SBradley Hughes 18251974d31SBradley Hughes enet1: ethernet@25000 { 18351974d31SBradley Hughes #address-cells = <1>; 18451974d31SBradley Hughes #size-cells = <1>; 18551974d31SBradley Hughes cell-index = <1>; 18651974d31SBradley Hughes device_type = "network"; 18751974d31SBradley Hughes model = "TSEC"; 18851974d31SBradley Hughes compatible = "gianfar"; 18951974d31SBradley Hughes reg = <0x25000 0x1000>; 19051974d31SBradley Hughes ranges = <0x0 0x25000 0x1000>; 19151974d31SBradley Hughes local-mac-address = [ 00 00 00 00 00 00 ]; 19251974d31SBradley Hughes interrupts = <35 2 36 2 40 2>; 19351974d31SBradley Hughes interrupt-parent = <&mpic>; 19451974d31SBradley Hughes tbi-handle = <&tbi1>; 19551974d31SBradley Hughes phy-handle = <&phy1>; 19651974d31SBradley Hughes 19751974d31SBradley Hughes mdio@520 { 19851974d31SBradley Hughes #address-cells = <1>; 19951974d31SBradley Hughes #size-cells = <0>; 20051974d31SBradley Hughes compatible = "fsl,gianfar-tbi"; 20151974d31SBradley Hughes reg = <0x520 0x20>; 20251974d31SBradley Hughes 20351974d31SBradley Hughes tbi1: tbi-phy@11 { 20451974d31SBradley Hughes reg = <0x11>; 20551974d31SBradley Hughes device_type = "tbi-phy"; 20651974d31SBradley Hughes }; 20751974d31SBradley Hughes }; 20851974d31SBradley Hughes }; 20951974d31SBradley Hughes 21051974d31SBradley Hughes serial0: serial@4500 { 21151974d31SBradley Hughes cell-index = <0>; 21251974d31SBradley Hughes device_type = "serial"; 21351974d31SBradley Hughes compatible = "ns16550"; 21451974d31SBradley Hughes reg = <0x4500 0x100>; // reg base, size 21551974d31SBradley Hughes clock-frequency = <0>; // should we fill in in uboot? 21651974d31SBradley Hughes interrupts = <42 2>; 21751974d31SBradley Hughes interrupt-parent = <&mpic>; 21851974d31SBradley Hughes }; 21951974d31SBradley Hughes 22051974d31SBradley Hughes serial1: serial@4600 { 22151974d31SBradley Hughes cell-index = <1>; 22251974d31SBradley Hughes device_type = "serial"; 22351974d31SBradley Hughes compatible = "ns16550"; 22451974d31SBradley Hughes reg = <0x4600 0x100>; // reg base, size 22551974d31SBradley Hughes clock-frequency = <0>; // should we fill in in uboot? 22651974d31SBradley Hughes interrupts = <42 2>; 22751974d31SBradley Hughes interrupt-parent = <&mpic>; 22851974d31SBradley Hughes }; 22951974d31SBradley Hughes 23051974d31SBradley Hughes crypto@30000 { 23151974d31SBradley Hughes compatible = "fsl,sec2.0"; 23251974d31SBradley Hughes reg = <0x30000 0x10000>; 23351974d31SBradley Hughes interrupts = <45 2>; 23451974d31SBradley Hughes interrupt-parent = <&mpic>; 23551974d31SBradley Hughes fsl,num-channels = <4>; 23651974d31SBradley Hughes fsl,channel-fifo-len = <24>; 23751974d31SBradley Hughes fsl,exec-units-mask = <0x7e>; 23851974d31SBradley Hughes fsl,descriptor-types-mask = <0x01010ebf>; 23951974d31SBradley Hughes }; 24051974d31SBradley Hughes 24151974d31SBradley Hughes mpic: pic@40000 { 24251974d31SBradley Hughes interrupt-controller; 24351974d31SBradley Hughes #address-cells = <0>; 24451974d31SBradley Hughes #interrupt-cells = <2>; 24551974d31SBradley Hughes reg = <0x40000 0x40000>; 24651974d31SBradley Hughes compatible = "chrp,open-pic"; 24751974d31SBradley Hughes device_type = "open-pic"; 24851974d31SBradley Hughes }; 24951974d31SBradley Hughes 25051974d31SBradley Hughes cpm@919c0 { 25151974d31SBradley Hughes #address-cells = <1>; 25251974d31SBradley Hughes #size-cells = <1>; 25351974d31SBradley Hughes compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; 25451974d31SBradley Hughes reg = <0x919c0 0x30>; 25551974d31SBradley Hughes ranges; 25651974d31SBradley Hughes 25751974d31SBradley Hughes muram@80000 { 25851974d31SBradley Hughes #address-cells = <1>; 25951974d31SBradley Hughes #size-cells = <1>; 26051974d31SBradley Hughes ranges = <0x0 0x80000 0x10000>; 26151974d31SBradley Hughes 26251974d31SBradley Hughes data@0 { 26351974d31SBradley Hughes compatible = "fsl,cpm-muram-data"; 26451974d31SBradley Hughes reg = <0x0 0x2000 0x9000 0x1000>; 26551974d31SBradley Hughes }; 26651974d31SBradley Hughes }; 26751974d31SBradley Hughes 26851974d31SBradley Hughes brg@919f0 { 26951974d31SBradley Hughes compatible = "fsl,mpc8555-brg", 27051974d31SBradley Hughes "fsl,cpm2-brg", 27151974d31SBradley Hughes "fsl,cpm-brg"; 27251974d31SBradley Hughes reg = <0x919f0 0x10 0x915f0 0x10>; 27351974d31SBradley Hughes }; 27451974d31SBradley Hughes 27551974d31SBradley Hughes cpmpic: pic@90c00 { 27651974d31SBradley Hughes interrupt-controller; 27751974d31SBradley Hughes #address-cells = <0>; 27851974d31SBradley Hughes #interrupt-cells = <2>; 27951974d31SBradley Hughes interrupts = <46 2>; 28051974d31SBradley Hughes interrupt-parent = <&mpic>; 28151974d31SBradley Hughes reg = <0x90c00 0x80>; 28251974d31SBradley Hughes compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; 28351974d31SBradley Hughes }; 28451974d31SBradley Hughes }; 28551974d31SBradley Hughes }; 28651974d31SBradley Hughes 28751974d31SBradley Hughes pci0: pci@e0008000 { 28851974d31SBradley Hughes interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; 28951974d31SBradley Hughes interrupt-map = < 29051974d31SBradley Hughes 29151974d31SBradley Hughes /* IDSEL 0x10 */ 29251974d31SBradley Hughes 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 29351974d31SBradley Hughes 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 29451974d31SBradley Hughes 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 29551974d31SBradley Hughes 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 29651974d31SBradley Hughes 29751974d31SBradley Hughes /* IDSEL 0x11 */ 29851974d31SBradley Hughes 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 29951974d31SBradley Hughes 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 30051974d31SBradley Hughes 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 30151974d31SBradley Hughes 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 30251974d31SBradley Hughes 30351974d31SBradley Hughes /* IDSEL 0x12 (Slot 1) */ 30451974d31SBradley Hughes 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 30551974d31SBradley Hughes 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 30651974d31SBradley Hughes 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 30751974d31SBradley Hughes 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 30851974d31SBradley Hughes 30951974d31SBradley Hughes /* IDSEL 0x13 (Slot 2) */ 31051974d31SBradley Hughes 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 31151974d31SBradley Hughes 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 31251974d31SBradley Hughes 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 31351974d31SBradley Hughes 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 31451974d31SBradley Hughes 31551974d31SBradley Hughes /* IDSEL 0x14 (Slot 3) */ 31651974d31SBradley Hughes 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 31751974d31SBradley Hughes 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 31851974d31SBradley Hughes 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 31951974d31SBradley Hughes 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 32051974d31SBradley Hughes 32151974d31SBradley Hughes /* IDSEL 0x15 (Slot 4) */ 32251974d31SBradley Hughes 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 32351974d31SBradley Hughes 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 32451974d31SBradley Hughes 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 32551974d31SBradley Hughes 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 32651974d31SBradley Hughes 32751974d31SBradley Hughes /* Bus 1 (Tundra Bridge) */ 32851974d31SBradley Hughes /* IDSEL 0x12 (ISA bridge) */ 32951974d31SBradley Hughes 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 33051974d31SBradley Hughes 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 33151974d31SBradley Hughes 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 33251974d31SBradley Hughes 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; 33351974d31SBradley Hughes interrupt-parent = <&mpic>; 33451974d31SBradley Hughes interrupts = <24 2>; 33551974d31SBradley Hughes bus-range = <0 0>; 33651974d31SBradley Hughes ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 33751974d31SBradley Hughes 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; 33851974d31SBradley Hughes clock-frequency = <66666666>; 33951974d31SBradley Hughes #interrupt-cells = <1>; 34051974d31SBradley Hughes #size-cells = <2>; 34151974d31SBradley Hughes #address-cells = <3>; 34251974d31SBradley Hughes reg = <0xe0008000 0x1000>; 34351974d31SBradley Hughes compatible = "fsl,mpc8540-pci"; 34451974d31SBradley Hughes device_type = "pci"; 34551974d31SBradley Hughes 34651974d31SBradley Hughes i8259@19000 { 34751974d31SBradley Hughes interrupt-controller; 34851974d31SBradley Hughes device_type = "interrupt-controller"; 34951974d31SBradley Hughes reg = <0x19000 0x0 0x0 0x0 0x1>; 35051974d31SBradley Hughes #address-cells = <0>; 35151974d31SBradley Hughes #interrupt-cells = <2>; 35251974d31SBradley Hughes compatible = "chrp,iic"; 35351974d31SBradley Hughes interrupts = <1>; 35451974d31SBradley Hughes interrupt-parent = <&pci0>; 35551974d31SBradley Hughes }; 35651974d31SBradley Hughes }; 35751974d31SBradley Hughes 35851974d31SBradley Hughes pci1: pci@e0009000 { 35951974d31SBradley Hughes interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 36051974d31SBradley Hughes interrupt-map = < 36151974d31SBradley Hughes 36251974d31SBradley Hughes /* IDSEL 0x15 */ 36351974d31SBradley Hughes 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 36451974d31SBradley Hughes 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 36551974d31SBradley Hughes 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 36651974d31SBradley Hughes 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; 36751974d31SBradley Hughes interrupt-parent = <&mpic>; 36851974d31SBradley Hughes interrupts = <25 2>; 36951974d31SBradley Hughes bus-range = <0 0>; 37051974d31SBradley Hughes ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 37151974d31SBradley Hughes 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>; 37251974d31SBradley Hughes clock-frequency = <66666666>; 37351974d31SBradley Hughes #interrupt-cells = <1>; 37451974d31SBradley Hughes #size-cells = <2>; 37551974d31SBradley Hughes #address-cells = <3>; 37651974d31SBradley Hughes reg = <0xe0009000 0x1000>; 37751974d31SBradley Hughes compatible = "fsl,mpc8540-pci"; 37851974d31SBradley Hughes device_type = "pci"; 37951974d31SBradley Hughes }; 38051974d31SBradley Hughes}; 381