13910cd8cSValentine Barshak/* 23910cd8cSValentine Barshak * Device Tree Source for AMCC Rainier 33910cd8cSValentine Barshak * 43910cd8cSValentine Barshak * Based on Sequoia code 53910cd8cSValentine Barshak * Copyright (c) 2007 MontaVista Software, Inc. 63910cd8cSValentine Barshak * 73910cd8cSValentine Barshak * FIXME: Draft only! 83910cd8cSValentine Barshak * 93910cd8cSValentine Barshak * This file is licensed under the terms of the GNU General Public 103910cd8cSValentine Barshak * License version 2. This program is licensed "as is" without 113910cd8cSValentine Barshak * any warranty of any kind, whether express or implied. 123910cd8cSValentine Barshak * 133910cd8cSValentine Barshak */ 143910cd8cSValentine Barshak 153910cd8cSValentine Barshak/ { 163910cd8cSValentine Barshak #address-cells = <2>; 173910cd8cSValentine Barshak #size-cells = <1>; 183910cd8cSValentine Barshak model = "amcc,rainier"; 193910cd8cSValentine Barshak compatible = "amcc,rainier"; 2072fda114SJosh Boyer dcr-parent = <&/cpus/cpu@0>; 213910cd8cSValentine Barshak 223910cd8cSValentine Barshak cpus { 233910cd8cSValentine Barshak #address-cells = <1>; 243910cd8cSValentine Barshak #size-cells = <0>; 253910cd8cSValentine Barshak 2672fda114SJosh Boyer cpu@0 { 273910cd8cSValentine Barshak device_type = "cpu"; 2872fda114SJosh Boyer model = "PowerPC,440GRx"; 293910cd8cSValentine Barshak reg = <0>; 303910cd8cSValentine Barshak clock-frequency = <0>; /* Filled in by zImage */ 313910cd8cSValentine Barshak timebase-frequency = <0>; /* Filled in by zImage */ 323910cd8cSValentine Barshak i-cache-line-size = <20>; 333910cd8cSValentine Barshak d-cache-line-size = <20>; 343910cd8cSValentine Barshak i-cache-size = <8000>; 353910cd8cSValentine Barshak d-cache-size = <8000>; 363910cd8cSValentine Barshak dcr-controller; 373910cd8cSValentine Barshak dcr-access-method = "native"; 383910cd8cSValentine Barshak }; 393910cd8cSValentine Barshak }; 403910cd8cSValentine Barshak 413910cd8cSValentine Barshak memory { 423910cd8cSValentine Barshak device_type = "memory"; 433910cd8cSValentine Barshak reg = <0 0 0>; /* Filled in by zImage */ 443910cd8cSValentine Barshak }; 453910cd8cSValentine Barshak 463910cd8cSValentine Barshak UIC0: interrupt-controller0 { 473910cd8cSValentine Barshak compatible = "ibm,uic-440grx","ibm,uic"; 483910cd8cSValentine Barshak interrupt-controller; 493910cd8cSValentine Barshak cell-index = <0>; 503910cd8cSValentine Barshak dcr-reg = <0c0 009>; 513910cd8cSValentine Barshak #address-cells = <0>; 523910cd8cSValentine Barshak #size-cells = <0>; 533910cd8cSValentine Barshak #interrupt-cells = <2>; 543910cd8cSValentine Barshak }; 553910cd8cSValentine Barshak 563910cd8cSValentine Barshak UIC1: interrupt-controller1 { 573910cd8cSValentine Barshak compatible = "ibm,uic-440grx","ibm,uic"; 583910cd8cSValentine Barshak interrupt-controller; 593910cd8cSValentine Barshak cell-index = <1>; 603910cd8cSValentine Barshak dcr-reg = <0d0 009>; 613910cd8cSValentine Barshak #address-cells = <0>; 623910cd8cSValentine Barshak #size-cells = <0>; 633910cd8cSValentine Barshak #interrupt-cells = <2>; 643910cd8cSValentine Barshak interrupts = <1e 4 1f 4>; /* cascade */ 653910cd8cSValentine Barshak interrupt-parent = <&UIC0>; 663910cd8cSValentine Barshak }; 673910cd8cSValentine Barshak 683910cd8cSValentine Barshak UIC2: interrupt-controller2 { 693910cd8cSValentine Barshak compatible = "ibm,uic-440grx","ibm,uic"; 703910cd8cSValentine Barshak interrupt-controller; 713910cd8cSValentine Barshak cell-index = <2>; 723910cd8cSValentine Barshak dcr-reg = <0e0 009>; 733910cd8cSValentine Barshak #address-cells = <0>; 743910cd8cSValentine Barshak #size-cells = <0>; 753910cd8cSValentine Barshak #interrupt-cells = <2>; 763910cd8cSValentine Barshak interrupts = <1c 4 1d 4>; /* cascade */ 773910cd8cSValentine Barshak interrupt-parent = <&UIC0>; 783910cd8cSValentine Barshak }; 793910cd8cSValentine Barshak 803910cd8cSValentine Barshak SDR0: sdr { 813910cd8cSValentine Barshak compatible = "ibm,sdr-440grx", "ibm,sdr-440ep"; 823910cd8cSValentine Barshak dcr-reg = <00e 002>; 833910cd8cSValentine Barshak }; 843910cd8cSValentine Barshak 853910cd8cSValentine Barshak CPR0: cpr { 863910cd8cSValentine Barshak compatible = "ibm,cpr-440grx", "ibm,cpr-440ep"; 873910cd8cSValentine Barshak dcr-reg = <00c 002>; 883910cd8cSValentine Barshak }; 893910cd8cSValentine Barshak 903910cd8cSValentine Barshak plb { 913910cd8cSValentine Barshak compatible = "ibm,plb-440grx", "ibm,plb4"; 923910cd8cSValentine Barshak #address-cells = <2>; 933910cd8cSValentine Barshak #size-cells = <1>; 943910cd8cSValentine Barshak ranges; 953910cd8cSValentine Barshak clock-frequency = <0>; /* Filled in by zImage */ 963910cd8cSValentine Barshak 973910cd8cSValentine Barshak SDRAM0: sdram { 983910cd8cSValentine Barshak compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali"; 993910cd8cSValentine Barshak dcr-reg = <010 2>; 1003910cd8cSValentine Barshak }; 1013910cd8cSValentine Barshak 1023910cd8cSValentine Barshak DMA0: dma { 1033910cd8cSValentine Barshak compatible = "ibm,dma-440grx", "ibm,dma-4xx"; 1043910cd8cSValentine Barshak dcr-reg = <100 027>; 1053910cd8cSValentine Barshak }; 1063910cd8cSValentine Barshak 1073910cd8cSValentine Barshak MAL0: mcmal { 1083910cd8cSValentine Barshak compatible = "ibm,mcmal-440grx", "ibm,mcmal2"; 1093910cd8cSValentine Barshak dcr-reg = <180 62>; 1103910cd8cSValentine Barshak num-tx-chans = <2>; 1113910cd8cSValentine Barshak num-rx-chans = <2>; 1123910cd8cSValentine Barshak interrupt-parent = <&MAL0>; 1133910cd8cSValentine Barshak interrupts = <0 1 2 3 4>; 1143910cd8cSValentine Barshak #interrupt-cells = <1>; 1153910cd8cSValentine Barshak #address-cells = <0>; 1163910cd8cSValentine Barshak #size-cells = <0>; 1173910cd8cSValentine Barshak interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 1183910cd8cSValentine Barshak /*RXEOB*/ 1 &UIC0 b 4 1193910cd8cSValentine Barshak /*SERR*/ 2 &UIC1 0 4 1203910cd8cSValentine Barshak /*TXDE*/ 3 &UIC1 1 4 1213910cd8cSValentine Barshak /*RXDE*/ 4 &UIC1 2 4>; 1223910cd8cSValentine Barshak interrupt-map-mask = <ffffffff>; 1233910cd8cSValentine Barshak }; 1243910cd8cSValentine Barshak 1253910cd8cSValentine Barshak POB0: opb { 1263910cd8cSValentine Barshak compatible = "ibm,opb-440grx", "ibm,opb"; 1273910cd8cSValentine Barshak #address-cells = <1>; 1283910cd8cSValentine Barshak #size-cells = <1>; 1293910cd8cSValentine Barshak ranges = <00000000 1 00000000 80000000 1303910cd8cSValentine Barshak 80000000 1 80000000 80000000>; 1313910cd8cSValentine Barshak interrupt-parent = <&UIC1>; 1323910cd8cSValentine Barshak interrupts = <7 4>; 1333910cd8cSValentine Barshak clock-frequency = <0>; /* Filled in by zImage */ 1343910cd8cSValentine Barshak 1353910cd8cSValentine Barshak EBC0: ebc { 1363910cd8cSValentine Barshak compatible = "ibm,ebc-440grx", "ibm,ebc"; 1373910cd8cSValentine Barshak dcr-reg = <012 2>; 1383910cd8cSValentine Barshak #address-cells = <2>; 1393910cd8cSValentine Barshak #size-cells = <1>; 1403910cd8cSValentine Barshak clock-frequency = <0>; /* Filled in by zImage */ 1413910cd8cSValentine Barshak interrupts = <5 1>; 1423910cd8cSValentine Barshak interrupt-parent = <&UIC1>; 1433910cd8cSValentine Barshak 1443910cd8cSValentine Barshak nor_flash@0,0 { 1453910cd8cSValentine Barshak compatible = "amd,s29gl256n", "cfi-flash"; 1463910cd8cSValentine Barshak bank-width = <2>; 1473910cd8cSValentine Barshak reg = <0 000000 4000000>; 1483910cd8cSValentine Barshak #address-cells = <1>; 1493910cd8cSValentine Barshak #size-cells = <1>; 1503910cd8cSValentine Barshak partition@0 { 1513910cd8cSValentine Barshak label = "Kernel"; 1523910cd8cSValentine Barshak reg = <0 180000>; 1533910cd8cSValentine Barshak }; 1543910cd8cSValentine Barshak partition@180000 { 1553910cd8cSValentine Barshak label = "ramdisk"; 1563910cd8cSValentine Barshak reg = <180000 200000>; 1573910cd8cSValentine Barshak }; 1583910cd8cSValentine Barshak partition@380000 { 1593910cd8cSValentine Barshak label = "file system"; 1603910cd8cSValentine Barshak reg = <380000 3aa0000>; 1613910cd8cSValentine Barshak }; 1623910cd8cSValentine Barshak partition@3e20000 { 1633910cd8cSValentine Barshak label = "kozio"; 1643910cd8cSValentine Barshak reg = <3e20000 140000>; 1653910cd8cSValentine Barshak }; 1663910cd8cSValentine Barshak partition@3f60000 { 1673910cd8cSValentine Barshak label = "env"; 1683910cd8cSValentine Barshak reg = <3f60000 40000>; 1693910cd8cSValentine Barshak }; 1703910cd8cSValentine Barshak partition@3fa0000 { 1713910cd8cSValentine Barshak label = "u-boot"; 1723910cd8cSValentine Barshak reg = <3fa0000 60000>; 1733910cd8cSValentine Barshak }; 1743910cd8cSValentine Barshak }; 1753910cd8cSValentine Barshak 1763910cd8cSValentine Barshak }; 1773910cd8cSValentine Barshak 1783910cd8cSValentine Barshak UART0: serial@ef600300 { 1793910cd8cSValentine Barshak device_type = "serial"; 1803910cd8cSValentine Barshak compatible = "ns16550"; 1813910cd8cSValentine Barshak reg = <ef600300 8>; 1823910cd8cSValentine Barshak virtual-reg = <ef600300>; 1833910cd8cSValentine Barshak clock-frequency = <0>; /* Filled in by zImage */ 1843910cd8cSValentine Barshak current-speed = <1c200>; 1853910cd8cSValentine Barshak interrupt-parent = <&UIC0>; 1863910cd8cSValentine Barshak interrupts = <0 4>; 1873910cd8cSValentine Barshak }; 1883910cd8cSValentine Barshak 1893910cd8cSValentine Barshak UART1: serial@ef600400 { 1903910cd8cSValentine Barshak device_type = "serial"; 1913910cd8cSValentine Barshak compatible = "ns16550"; 1923910cd8cSValentine Barshak reg = <ef600400 8>; 1933910cd8cSValentine Barshak virtual-reg = <ef600400>; 1943910cd8cSValentine Barshak clock-frequency = <0>; 1953910cd8cSValentine Barshak current-speed = <0>; 1963910cd8cSValentine Barshak interrupt-parent = <&UIC0>; 1973910cd8cSValentine Barshak interrupts = <1 4>; 1983910cd8cSValentine Barshak }; 1993910cd8cSValentine Barshak 2003910cd8cSValentine Barshak UART2: serial@ef600500 { 2013910cd8cSValentine Barshak device_type = "serial"; 2023910cd8cSValentine Barshak compatible = "ns16550"; 2033910cd8cSValentine Barshak reg = <ef600500 8>; 2043910cd8cSValentine Barshak virtual-reg = <ef600500>; 2053910cd8cSValentine Barshak clock-frequency = <0>; 2063910cd8cSValentine Barshak current-speed = <0>; 2073910cd8cSValentine Barshak interrupt-parent = <&UIC1>; 2083910cd8cSValentine Barshak interrupts = <3 4>; 2093910cd8cSValentine Barshak }; 2103910cd8cSValentine Barshak 2113910cd8cSValentine Barshak UART3: serial@ef600600 { 2123910cd8cSValentine Barshak device_type = "serial"; 2133910cd8cSValentine Barshak compatible = "ns16550"; 2143910cd8cSValentine Barshak reg = <ef600600 8>; 2153910cd8cSValentine Barshak virtual-reg = <ef600600>; 2163910cd8cSValentine Barshak clock-frequency = <0>; 2173910cd8cSValentine Barshak current-speed = <0>; 2183910cd8cSValentine Barshak interrupt-parent = <&UIC1>; 2193910cd8cSValentine Barshak interrupts = <4 4>; 2203910cd8cSValentine Barshak }; 2213910cd8cSValentine Barshak 2223910cd8cSValentine Barshak IIC0: i2c@ef600700 { 2233910cd8cSValentine Barshak device_type = "i2c"; 2243910cd8cSValentine Barshak compatible = "ibm,iic-440grx", "ibm,iic"; 2253910cd8cSValentine Barshak reg = <ef600700 14>; 2263910cd8cSValentine Barshak interrupt-parent = <&UIC0>; 2273910cd8cSValentine Barshak interrupts = <2 4>; 2283910cd8cSValentine Barshak }; 2293910cd8cSValentine Barshak 2303910cd8cSValentine Barshak IIC1: i2c@ef600800 { 2313910cd8cSValentine Barshak device_type = "i2c"; 2323910cd8cSValentine Barshak compatible = "ibm,iic-440grx", "ibm,iic"; 2333910cd8cSValentine Barshak reg = <ef600800 14>; 2343910cd8cSValentine Barshak interrupt-parent = <&UIC0>; 2353910cd8cSValentine Barshak interrupts = <7 4>; 2363910cd8cSValentine Barshak }; 2373910cd8cSValentine Barshak 2383910cd8cSValentine Barshak ZMII0: emac-zmii@ef600d00 { 2393910cd8cSValentine Barshak device_type = "zmii-interface"; 2403910cd8cSValentine Barshak compatible = "ibm,zmii-440grx", "ibm,zmii"; 2413910cd8cSValentine Barshak reg = <ef600d00 c>; 2423910cd8cSValentine Barshak }; 2433910cd8cSValentine Barshak 2443910cd8cSValentine Barshak RGMII0: emac-rgmii@ef601000 { 2453910cd8cSValentine Barshak device_type = "rgmii-interface"; 2463910cd8cSValentine Barshak compatible = "ibm,rgmii-440grx", "ibm,rgmii"; 2473910cd8cSValentine Barshak reg = <ef601000 8>; 24858c50192SValentine Barshak has-mdio; 2493910cd8cSValentine Barshak }; 2503910cd8cSValentine Barshak 2513910cd8cSValentine Barshak EMAC0: ethernet@ef600e00 { 2523910cd8cSValentine Barshak linux,network-index = <0>; 2533910cd8cSValentine Barshak device_type = "network"; 2543910cd8cSValentine Barshak compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; 2553910cd8cSValentine Barshak interrupt-parent = <&EMAC0>; 2563910cd8cSValentine Barshak interrupts = <0 1>; 2573910cd8cSValentine Barshak #interrupt-cells = <1>; 2583910cd8cSValentine Barshak #address-cells = <0>; 2593910cd8cSValentine Barshak #size-cells = <0>; 2603910cd8cSValentine Barshak interrupt-map = </*Status*/ 0 &UIC0 18 4 2613910cd8cSValentine Barshak /*Wake*/ 1 &UIC1 1d 4>; 2623910cd8cSValentine Barshak reg = <ef600e00 70>; 2633910cd8cSValentine Barshak local-mac-address = [000000000000]; 2643910cd8cSValentine Barshak mal-device = <&MAL0>; 2653910cd8cSValentine Barshak mal-tx-channel = <0>; 2663910cd8cSValentine Barshak mal-rx-channel = <0>; 2673910cd8cSValentine Barshak cell-index = <0>; 2683910cd8cSValentine Barshak max-frame-size = <5dc>; 2693910cd8cSValentine Barshak rx-fifo-size = <1000>; 2703910cd8cSValentine Barshak tx-fifo-size = <800>; 2713910cd8cSValentine Barshak phy-mode = "rgmii"; 2723910cd8cSValentine Barshak phy-map = <00000000>; 2733910cd8cSValentine Barshak zmii-device = <&ZMII0>; 2743910cd8cSValentine Barshak zmii-channel = <0>; 2753910cd8cSValentine Barshak rgmii-device = <&RGMII0>; 2763910cd8cSValentine Barshak rgmii-channel = <0>; 27758c50192SValentine Barshak has-inverted-stacr-oc; 27858c50192SValentine Barshak has-new-stacr-staopc; 2793910cd8cSValentine Barshak }; 2803910cd8cSValentine Barshak 2813910cd8cSValentine Barshak EMAC1: ethernet@ef600f00 { 2823910cd8cSValentine Barshak linux,network-index = <1>; 2833910cd8cSValentine Barshak device_type = "network"; 2843910cd8cSValentine Barshak compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; 2853910cd8cSValentine Barshak interrupt-parent = <&EMAC1>; 2863910cd8cSValentine Barshak interrupts = <0 1>; 2873910cd8cSValentine Barshak #interrupt-cells = <1>; 2883910cd8cSValentine Barshak #address-cells = <0>; 2893910cd8cSValentine Barshak #size-cells = <0>; 2903910cd8cSValentine Barshak interrupt-map = </*Status*/ 0 &UIC0 19 4 2913910cd8cSValentine Barshak /*Wake*/ 1 &UIC1 1f 4>; 2923910cd8cSValentine Barshak reg = <ef600f00 70>; 2933910cd8cSValentine Barshak local-mac-address = [000000000000]; 2943910cd8cSValentine Barshak mal-device = <&MAL0>; 2953910cd8cSValentine Barshak mal-tx-channel = <1>; 2963910cd8cSValentine Barshak mal-rx-channel = <1>; 2973910cd8cSValentine Barshak cell-index = <1>; 2983910cd8cSValentine Barshak max-frame-size = <5dc>; 2993910cd8cSValentine Barshak rx-fifo-size = <1000>; 3003910cd8cSValentine Barshak tx-fifo-size = <800>; 3013910cd8cSValentine Barshak phy-mode = "rgmii"; 3023910cd8cSValentine Barshak phy-map = <00000000>; 3033910cd8cSValentine Barshak zmii-device = <&ZMII0>; 3043910cd8cSValentine Barshak zmii-channel = <1>; 3053910cd8cSValentine Barshak rgmii-device = <&RGMII0>; 3063910cd8cSValentine Barshak rgmii-channel = <1>; 30758c50192SValentine Barshak has-inverted-stacr-oc; 30858c50192SValentine Barshak has-new-stacr-staopc; 3093910cd8cSValentine Barshak }; 3103910cd8cSValentine Barshak }; 3110b2e9751SValentine Barshak 3120b2e9751SValentine Barshak PCI0: pci@1ec000000 { 3130b2e9751SValentine Barshak device_type = "pci"; 3140b2e9751SValentine Barshak #interrupt-cells = <1>; 3150b2e9751SValentine Barshak #size-cells = <2>; 3160b2e9751SValentine Barshak #address-cells = <3>; 3170b2e9751SValentine Barshak compatible = "ibm,plb440grx-pci", "ibm,plb-pci"; 3180b2e9751SValentine Barshak primary; 3190b2e9751SValentine Barshak reg = <1 eec00000 8 /* Config space access */ 3200b2e9751SValentine Barshak 1 eed00000 4 /* IACK */ 3210b2e9751SValentine Barshak 1 eed00000 4 /* Special cycle */ 3220b2e9751SValentine Barshak 1 ef400000 40>; /* Internal registers */ 3230b2e9751SValentine Barshak 3240b2e9751SValentine Barshak /* Outbound ranges, one memory and one IO, 3250b2e9751SValentine Barshak * later cannot be changed. Chip supports a second 3260b2e9751SValentine Barshak * IO range but we don't use it for now 3270b2e9751SValentine Barshak */ 3280b2e9751SValentine Barshak ranges = <02000000 0 80000000 1 80000000 0 10000000 3290b2e9751SValentine Barshak 01000000 0 00000000 1 e8000000 0 00100000>; 3300b2e9751SValentine Barshak 3310b2e9751SValentine Barshak /* Inbound 2GB range starting at 0 */ 3320b2e9751SValentine Barshak dma-ranges = <42000000 0 0 0 0 0 80000000>; 3330b2e9751SValentine Barshak 3340b2e9751SValentine Barshak /* All PCI interrupts are routed to IRQ 67 */ 3350b2e9751SValentine Barshak interrupt-map-mask = <0000 0 0 0>; 3360b2e9751SValentine Barshak interrupt-map = < 0000 0 0 0 &UIC2 3 8 >; 3370b2e9751SValentine Barshak }; 3383910cd8cSValentine Barshak }; 3393910cd8cSValentine Barshak 3403910cd8cSValentine Barshak chosen { 3413910cd8cSValentine Barshak linux,stdout-path = "/plb/opb/serial@ef600300"; 3423910cd8cSValentine Barshak bootargs = "console=ttyS0,115200"; 3433910cd8cSValentine Barshak }; 3443910cd8cSValentine Barshak}; 345