19065762eSGeoff Levand/* 29065762eSGeoff Levand * PS3 Game Console device tree. 39065762eSGeoff Levand * 49065762eSGeoff Levand * Copyright (C) 2007 Sony Computer Entertainment Inc. 59065762eSGeoff Levand * Copyright 2007 Sony Corp. 69065762eSGeoff Levand * 79065762eSGeoff Levand * This program is free software; you can redistribute it and/or modify 89065762eSGeoff Levand * it under the terms of the GNU General Public License as published by 99065762eSGeoff Levand * the Free Software Foundation; version 2 of the License. 109065762eSGeoff Levand * 119065762eSGeoff Levand * This program is distributed in the hope that it will be useful, 129065762eSGeoff Levand * but WITHOUT ANY WARRANTY; without even the implied warranty of 139065762eSGeoff Levand * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 149065762eSGeoff Levand * GNU General Public License for more details. 159065762eSGeoff Levand * 169065762eSGeoff Levand * You should have received a copy of the GNU General Public License 179065762eSGeoff Levand * along with this program; if not, write to the Free Software 189065762eSGeoff Levand * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 199065762eSGeoff Levand */ 209065762eSGeoff Levand 219065762eSGeoff Levand/ { 229065762eSGeoff Levand model = "SonyPS3"; 239065762eSGeoff Levand compatible = "sony,ps3"; 249065762eSGeoff Levand #size-cells = <2>; 259065762eSGeoff Levand #address-cells = <2>; 269065762eSGeoff Levand 279065762eSGeoff Levand chosen { 289065762eSGeoff Levand }; 299065762eSGeoff Levand 309065762eSGeoff Levand /* 319065762eSGeoff Levand * We'll get the size of the bootmem block from lv1 after startup, 329065762eSGeoff Levand * so we'll put a null entry here. 339065762eSGeoff Levand */ 349065762eSGeoff Levand 359065762eSGeoff Levand memory { 369065762eSGeoff Levand device_type = "memory"; 379065762eSGeoff Levand reg = <0 0 0 0>; 389065762eSGeoff Levand }; 399065762eSGeoff Levand 409065762eSGeoff Levand /* 419065762eSGeoff Levand * The boot cpu is always zero for PS3. 429065762eSGeoff Levand * 439065762eSGeoff Levand * dtc expects a clock-frequency and timebase-frequency entries, so 449065762eSGeoff Levand * we'll put a null entries here. These will be initialized after 459065762eSGeoff Levand * startup with data from lv1. 469065762eSGeoff Levand * 479065762eSGeoff Levand * Seems the only way currently to indicate a processor has multiple 489065762eSGeoff Levand * threads is with an ibm,ppc-interrupt-server#s entry. We'll put one 499065762eSGeoff Levand * here so we can bring up both of ours. See smp_setup_cpu_maps(). 509065762eSGeoff Levand */ 519065762eSGeoff Levand 529065762eSGeoff Levand cpus { 539065762eSGeoff Levand #size-cells = <0>; 549065762eSGeoff Levand #address-cells = <1>; 559065762eSGeoff Levand 569065762eSGeoff Levand cpu@0 { 579065762eSGeoff Levand device_type = "cpu"; 589065762eSGeoff Levand reg = <0>; 599065762eSGeoff Levand ibm,ppc-interrupt-server#s = <0 1>; 609065762eSGeoff Levand clock-frequency = <0>; 619065762eSGeoff Levand timebase-frequency = <0>; 629065762eSGeoff Levand i-cache-size = <8000>; 639065762eSGeoff Levand d-cache-size = <8000>; 649065762eSGeoff Levand i-cache-line-size = <80>; 659065762eSGeoff Levand d-cache-line-size = <80>; 669065762eSGeoff Levand }; 679065762eSGeoff Levand }; 689065762eSGeoff Levand}; 69