12874c5fdSThomas Gleixner// SPDX-License-Identifier: GPL-2.0-or-later 210b9dc6fSWolfram Sang/* 310b9dc6fSWolfram Sang * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source 410b9dc6fSWolfram Sang * 510b9dc6fSWolfram Sang * Copyright (C) 2006-2009 Pengutronix 610b9dc6fSWolfram Sang * Sascha Hauer <s.hauer@pengutronix.de> 710b9dc6fSWolfram Sang * Juergen Beisert <j.beisert@pengutronix.de> 810b9dc6fSWolfram Sang * Wolfram Sang <w.sang@pengutronix.de> 910b9dc6fSWolfram Sang */ 1010b9dc6fSWolfram Sang 11c8bf6b52SJohn Bonesio/include/ "mpc5200b.dtsi" 1210b9dc6fSWolfram Sang 13fa59f178SGrant Likely&gpt0 { fsl,has-wdt; }; 14fa59f178SGrant Likely&gpt2 { gpio-controller; }; 15fa59f178SGrant Likely&gpt3 { gpio-controller; }; 16fa59f178SGrant Likely&gpt4 { gpio-controller; }; 17fa59f178SGrant Likely&gpt5 { gpio-controller; }; 18fa59f178SGrant Likely&gpt6 { gpio-controller; }; 19fa59f178SGrant Likely&gpt7 { gpio-controller; }; 20fa59f178SGrant Likely 2110b9dc6fSWolfram Sang/ { 2210b9dc6fSWolfram Sang model = "phytec,pcm032"; 2310b9dc6fSWolfram Sang compatible = "phytec,pcm032"; 2410b9dc6fSWolfram Sang 2510b9dc6fSWolfram Sang memory { 2610b9dc6fSWolfram Sang reg = <0x00000000 0x08000000>; // 128MB 2710b9dc6fSWolfram Sang }; 2810b9dc6fSWolfram Sang 2910b9dc6fSWolfram Sang soc5200@f0000000 { 30abf1e27fSJohn Bonesio psc@2000 { /* PSC1 is ac97 */ 3110b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; 3210b9dc6fSWolfram Sang cell-index = <0>; 3310b9dc6fSWolfram Sang }; 3410b9dc6fSWolfram Sang 3510b9dc6fSWolfram Sang /* PSC2 port is used by CAN1/2 */ 36c8bf6b52SJohn Bonesio psc@2200 { 37c8bf6b52SJohn Bonesio status = "disabled"; 38c8bf6b52SJohn Bonesio }; 3910b9dc6fSWolfram Sang 40abf1e27fSJohn Bonesio psc@2400 { /* PSC3 in UART mode */ 4110b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 4210b9dc6fSWolfram Sang }; 4310b9dc6fSWolfram Sang 4410b9dc6fSWolfram Sang /* PSC4 is ??? */ 45c8bf6b52SJohn Bonesio psc@2600 { 46c8bf6b52SJohn Bonesio status = "disabled"; 47c8bf6b52SJohn Bonesio }; 4810b9dc6fSWolfram Sang 4910b9dc6fSWolfram Sang /* PSC5 is ??? */ 50c8bf6b52SJohn Bonesio psc@2800 { 51c8bf6b52SJohn Bonesio status = "disabled"; 52c8bf6b52SJohn Bonesio }; 5310b9dc6fSWolfram Sang 54abf1e27fSJohn Bonesio psc@2c00 { /* PSC6 in UART mode */ 5510b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 5610b9dc6fSWolfram Sang }; 5710b9dc6fSWolfram Sang 5810b9dc6fSWolfram Sang ethernet@3000 { 5910b9dc6fSWolfram Sang phy-handle = <&phy0>; 6010b9dc6fSWolfram Sang }; 6110b9dc6fSWolfram Sang 6210b9dc6fSWolfram Sang mdio@3000 { 6310b9dc6fSWolfram Sang phy0: ethernet-phy@0 { 6410b9dc6fSWolfram Sang reg = <0>; 6510b9dc6fSWolfram Sang }; 6610b9dc6fSWolfram Sang }; 6710b9dc6fSWolfram Sang 6810b9dc6fSWolfram Sang i2c@3d40 { 6910b9dc6fSWolfram Sang rtc@51 { 7010b9dc6fSWolfram Sang compatible = "nxp,pcf8563"; 7110b9dc6fSWolfram Sang reg = <0x51>; 7210b9dc6fSWolfram Sang }; 7310b9dc6fSWolfram Sang eeprom@52 { 74fd393188SJavier Martinez Canillas compatible = "catalyst,24c32", "atmel,24c32"; 7510b9dc6fSWolfram Sang reg = <0x52>; 7655271024SWolfram Sang pagesize = <32>; 7710b9dc6fSWolfram Sang }; 7810b9dc6fSWolfram Sang }; 7910b9dc6fSWolfram Sang }; 8010b9dc6fSWolfram Sang 8110b9dc6fSWolfram Sang pci@f0000d00 { 8210b9dc6fSWolfram Sang interrupt-map-mask = <0xf800 0 0 7>; 8310b9dc6fSWolfram Sang interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot 8410b9dc6fSWolfram Sang 0xc000 0 0 2 &mpc5200_pic 1 1 3 8510b9dc6fSWolfram Sang 0xc000 0 0 3 &mpc5200_pic 1 2 3 8610b9dc6fSWolfram Sang 0xc000 0 0 4 &mpc5200_pic 1 3 3 8710b9dc6fSWolfram Sang 8810b9dc6fSWolfram Sang 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot 8910b9dc6fSWolfram Sang 0xc800 0 0 2 &mpc5200_pic 1 2 3 9010b9dc6fSWolfram Sang 0xc800 0 0 3 &mpc5200_pic 1 3 3 9110b9dc6fSWolfram Sang 0xc800 0 0 4 &mpc5200_pic 0 0 3>; 9210b9dc6fSWolfram Sang ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 9310b9dc6fSWolfram Sang 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 9410b9dc6fSWolfram Sang 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; 9510b9dc6fSWolfram Sang }; 9610b9dc6fSWolfram Sang 9710b9dc6fSWolfram Sang localbus { 9810b9dc6fSWolfram Sang ranges = <0 0 0xfe000000 0x02000000 9910b9dc6fSWolfram Sang 1 0 0xfc000000 0x02000000 10010b9dc6fSWolfram Sang 2 0 0xfbe00000 0x00200000 10110b9dc6fSWolfram Sang 3 0 0xf9e00000 0x02000000 10210b9dc6fSWolfram Sang 4 0 0xf7e00000 0x02000000 10310b9dc6fSWolfram Sang 5 0 0xe6000000 0x02000000 10410b9dc6fSWolfram Sang 6 0 0xe8000000 0x02000000 10510b9dc6fSWolfram Sang 7 0 0xea000000 0x02000000>; 10610b9dc6fSWolfram Sang 10710b9dc6fSWolfram Sang flash@0,0 { 10810b9dc6fSWolfram Sang compatible = "cfi-flash"; 10910b9dc6fSWolfram Sang reg = <0 0 0x02000000>; 11010b9dc6fSWolfram Sang bank-width = <4>; 11110b9dc6fSWolfram Sang #size-cells = <1>; 11210b9dc6fSWolfram Sang #address-cells = <1>; 11310b9dc6fSWolfram Sang 11410b9dc6fSWolfram Sang partition@0 { 11510b9dc6fSWolfram Sang label = "ubootl"; 11610b9dc6fSWolfram Sang reg = <0x00000000 0x00040000>; 11710b9dc6fSWolfram Sang }; 11810b9dc6fSWolfram Sang partition@40000 { 11910b9dc6fSWolfram Sang label = "kernel"; 12010b9dc6fSWolfram Sang reg = <0x00040000 0x001c0000>; 12110b9dc6fSWolfram Sang }; 12210b9dc6fSWolfram Sang partition@200000 { 12310b9dc6fSWolfram Sang label = "jffs2"; 12410b9dc6fSWolfram Sang reg = <0x00200000 0x01d00000>; 12510b9dc6fSWolfram Sang }; 12610b9dc6fSWolfram Sang partition@1f00000 { 12710b9dc6fSWolfram Sang label = "uboot"; 12810b9dc6fSWolfram Sang reg = <0x01f00000 0x00040000>; 12910b9dc6fSWolfram Sang }; 13010b9dc6fSWolfram Sang partition@1f40000 { 13110b9dc6fSWolfram Sang label = "env"; 13210b9dc6fSWolfram Sang reg = <0x01f40000 0x00040000>; 13310b9dc6fSWolfram Sang }; 13410b9dc6fSWolfram Sang partition@1f80000 { 13510b9dc6fSWolfram Sang label = "oftree"; 13610b9dc6fSWolfram Sang reg = <0x01f80000 0x00040000>; 13710b9dc6fSWolfram Sang }; 13810b9dc6fSWolfram Sang partition@1fc0000 { 13910b9dc6fSWolfram Sang label = "space"; 14010b9dc6fSWolfram Sang reg = <0x01fc0000 0x00040000>; 14110b9dc6fSWolfram Sang }; 14210b9dc6fSWolfram Sang }; 14310b9dc6fSWolfram Sang 14410b9dc6fSWolfram Sang sram@2,0 { 14510b9dc6fSWolfram Sang compatible = "mtd-ram"; 14610b9dc6fSWolfram Sang reg = <2 0 0x00200000>; 14710b9dc6fSWolfram Sang bank-width = <2>; 14810b9dc6fSWolfram Sang }; 14910b9dc6fSWolfram Sang 15010b9dc6fSWolfram Sang /* 15110b9dc6fSWolfram Sang * example snippets for FPGA 15210b9dc6fSWolfram Sang * 15310b9dc6fSWolfram Sang * fpga@3,0 { 15410b9dc6fSWolfram Sang * compatible = "fpga_driver"; 15510b9dc6fSWolfram Sang * reg = <3 0 0x02000000>; 15610b9dc6fSWolfram Sang * bank-width = <4>; 15710b9dc6fSWolfram Sang * }; 15810b9dc6fSWolfram Sang * 15910b9dc6fSWolfram Sang * fpga@4,0 { 16010b9dc6fSWolfram Sang * compatible = "fpga_driver"; 16110b9dc6fSWolfram Sang * reg = <4 0 0x02000000>; 16210b9dc6fSWolfram Sang * bank-width = <4>; 16310b9dc6fSWolfram Sang * }; 16410b9dc6fSWolfram Sang */ 16510b9dc6fSWolfram Sang 16610b9dc6fSWolfram Sang /* 16710b9dc6fSWolfram Sang * example snippets for free chipselects 16810b9dc6fSWolfram Sang * 16910b9dc6fSWolfram Sang * device@5,0 { 17010b9dc6fSWolfram Sang * compatible = "custom_driver"; 17110b9dc6fSWolfram Sang * reg = <5 0 0x02000000>; 17210b9dc6fSWolfram Sang * }; 17310b9dc6fSWolfram Sang * 17410b9dc6fSWolfram Sang * device@6,0 { 17510b9dc6fSWolfram Sang * compatible = "custom_driver"; 17610b9dc6fSWolfram Sang * reg = <6 0 0x02000000>; 17710b9dc6fSWolfram Sang * }; 17810b9dc6fSWolfram Sang * 17910b9dc6fSWolfram Sang * device@7,0 { 18010b9dc6fSWolfram Sang * compatible = "custom_driver"; 18110b9dc6fSWolfram Sang * reg = <7 0 0x02000000>; 18210b9dc6fSWolfram Sang * }; 18310b9dc6fSWolfram Sang */ 18410b9dc6fSWolfram Sang }; 18510b9dc6fSWolfram Sang}; 186