110b9dc6fSWolfram Sang/* 210b9dc6fSWolfram Sang * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source 310b9dc6fSWolfram Sang * 410b9dc6fSWolfram Sang * Copyright (C) 2006-2009 Pengutronix 510b9dc6fSWolfram Sang * Sascha Hauer <s.hauer@pengutronix.de> 610b9dc6fSWolfram Sang * Juergen Beisert <j.beisert@pengutronix.de> 710b9dc6fSWolfram Sang * Wolfram Sang <w.sang@pengutronix.de> 810b9dc6fSWolfram Sang * 910b9dc6fSWolfram Sang * This program is free software; you can redistribute it and/or modify it 1010b9dc6fSWolfram Sang * under the terms of the GNU General Public License as published by the 1110b9dc6fSWolfram Sang * Free Software Foundation; either version 2 of the License, or (at your 1210b9dc6fSWolfram Sang * option) any later version. 1310b9dc6fSWolfram Sang */ 1410b9dc6fSWolfram Sang 1510b9dc6fSWolfram Sang/dts-v1/; 1610b9dc6fSWolfram Sang 1710b9dc6fSWolfram Sang/ { 1810b9dc6fSWolfram Sang model = "phytec,pcm032"; 1910b9dc6fSWolfram Sang compatible = "phytec,pcm032"; 2010b9dc6fSWolfram Sang #address-cells = <1>; 2110b9dc6fSWolfram Sang #size-cells = <1>; 2210b9dc6fSWolfram Sang interrupt-parent = <&mpc5200_pic>; 2310b9dc6fSWolfram Sang 2410b9dc6fSWolfram Sang cpus { 2510b9dc6fSWolfram Sang #address-cells = <1>; 2610b9dc6fSWolfram Sang #size-cells = <0>; 2710b9dc6fSWolfram Sang 2810b9dc6fSWolfram Sang PowerPC,5200@0 { 2910b9dc6fSWolfram Sang device_type = "cpu"; 3010b9dc6fSWolfram Sang reg = <0>; 3110b9dc6fSWolfram Sang d-cache-line-size = <32>; 3210b9dc6fSWolfram Sang i-cache-line-size = <32>; 3310b9dc6fSWolfram Sang d-cache-size = <0x4000>; // L1, 16K 3410b9dc6fSWolfram Sang i-cache-size = <0x4000>; // L1, 16K 3510b9dc6fSWolfram Sang timebase-frequency = <0>; // from bootloader 3610b9dc6fSWolfram Sang bus-frequency = <0>; // from bootloader 3710b9dc6fSWolfram Sang clock-frequency = <0>; // from bootloader 3810b9dc6fSWolfram Sang }; 3910b9dc6fSWolfram Sang }; 4010b9dc6fSWolfram Sang 4110b9dc6fSWolfram Sang memory { 4210b9dc6fSWolfram Sang device_type = "memory"; 4310b9dc6fSWolfram Sang reg = <0x00000000 0x08000000>; // 128MB 4410b9dc6fSWolfram Sang }; 4510b9dc6fSWolfram Sang 4610b9dc6fSWolfram Sang soc5200@f0000000 { 4710b9dc6fSWolfram Sang #address-cells = <1>; 4810b9dc6fSWolfram Sang #size-cells = <1>; 4910b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-immr"; 5010b9dc6fSWolfram Sang ranges = <0 0xf0000000 0x0000c000>; 5110b9dc6fSWolfram Sang bus-frequency = <0>; // from bootloader 5210b9dc6fSWolfram Sang system-frequency = <0>; // from bootloader 5310b9dc6fSWolfram Sang 5410b9dc6fSWolfram Sang cdm@200 { 5510b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; 5610b9dc6fSWolfram Sang reg = <0x200 0x38>; 5710b9dc6fSWolfram Sang }; 5810b9dc6fSWolfram Sang 5910b9dc6fSWolfram Sang mpc5200_pic: interrupt-controller@500 { 6010b9dc6fSWolfram Sang // 5200 interrupts are encoded into two levels; 6110b9dc6fSWolfram Sang interrupt-controller; 6210b9dc6fSWolfram Sang #interrupt-cells = <3>; 6310b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; 6410b9dc6fSWolfram Sang reg = <0x500 0x80>; 6510b9dc6fSWolfram Sang }; 6610b9dc6fSWolfram Sang 6710b9dc6fSWolfram Sang timer@600 { // General Purpose Timer 6810b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 6910b9dc6fSWolfram Sang reg = <0x600 0x10>; 7010b9dc6fSWolfram Sang interrupts = <1 9 0>; 7110b9dc6fSWolfram Sang fsl,has-wdt; 7210b9dc6fSWolfram Sang }; 7310b9dc6fSWolfram Sang 7410b9dc6fSWolfram Sang timer@610 { // General Purpose Timer 7510b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 7610b9dc6fSWolfram Sang reg = <0x610 0x10>; 7710b9dc6fSWolfram Sang interrupts = <1 10 0>; 7810b9dc6fSWolfram Sang }; 7910b9dc6fSWolfram Sang 8010b9dc6fSWolfram Sang gpt2: timer@620 { // General Purpose Timer in GPIO mode 8110b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 8210b9dc6fSWolfram Sang reg = <0x620 0x10>; 8310b9dc6fSWolfram Sang interrupts = <1 11 0>; 8410b9dc6fSWolfram Sang gpio-controller; 8510b9dc6fSWolfram Sang #gpio-cells = <2>; 8610b9dc6fSWolfram Sang }; 8710b9dc6fSWolfram Sang 8810b9dc6fSWolfram Sang gpt3: timer@630 { // General Purpose Timer in GPIO mode 8910b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 9010b9dc6fSWolfram Sang reg = <0x630 0x10>; 9110b9dc6fSWolfram Sang interrupts = <1 12 0>; 9210b9dc6fSWolfram Sang gpio-controller; 9310b9dc6fSWolfram Sang #gpio-cells = <2>; 9410b9dc6fSWolfram Sang }; 9510b9dc6fSWolfram Sang 9610b9dc6fSWolfram Sang gpt4: timer@640 { // General Purpose Timer in GPIO mode 9710b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 9810b9dc6fSWolfram Sang reg = <0x640 0x10>; 9910b9dc6fSWolfram Sang interrupts = <1 13 0>; 10010b9dc6fSWolfram Sang gpio-controller; 10110b9dc6fSWolfram Sang #gpio-cells = <2>; 10210b9dc6fSWolfram Sang }; 10310b9dc6fSWolfram Sang 10410b9dc6fSWolfram Sang gpt5: timer@650 { // General Purpose Timer in GPIO mode 10510b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 10610b9dc6fSWolfram Sang reg = <0x650 0x10>; 10710b9dc6fSWolfram Sang interrupts = <1 14 0>; 10810b9dc6fSWolfram Sang gpio-controller; 10910b9dc6fSWolfram Sang #gpio-cells = <2>; 11010b9dc6fSWolfram Sang }; 11110b9dc6fSWolfram Sang 11210b9dc6fSWolfram Sang gpt6: timer@660 { // General Purpose Timer in GPIO mode 11310b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 11410b9dc6fSWolfram Sang reg = <0x660 0x10>; 11510b9dc6fSWolfram Sang interrupts = <1 15 0>; 11610b9dc6fSWolfram Sang gpio-controller; 11710b9dc6fSWolfram Sang #gpio-cells = <2>; 11810b9dc6fSWolfram Sang }; 11910b9dc6fSWolfram Sang 12010b9dc6fSWolfram Sang gpt7: timer@670 { // General Purpose Timer in GPIO mode 12110b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 12210b9dc6fSWolfram Sang reg = <0x670 0x10>; 12310b9dc6fSWolfram Sang interrupts = <1 16 0>; 12410b9dc6fSWolfram Sang gpio-controller; 12510b9dc6fSWolfram Sang #gpio-cells = <2>; 12610b9dc6fSWolfram Sang }; 12710b9dc6fSWolfram Sang 12810b9dc6fSWolfram Sang rtc@800 { // Real time clock 12910b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 13010b9dc6fSWolfram Sang reg = <0x800 0x100>; 13110b9dc6fSWolfram Sang interrupts = <1 5 0 1 6 0>; 13210b9dc6fSWolfram Sang }; 13310b9dc6fSWolfram Sang 13410b9dc6fSWolfram Sang can@900 { 13510b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 13610b9dc6fSWolfram Sang interrupts = <2 17 0>; 13710b9dc6fSWolfram Sang reg = <0x900 0x80>; 13810b9dc6fSWolfram Sang }; 13910b9dc6fSWolfram Sang 14010b9dc6fSWolfram Sang can@980 { 14110b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 14210b9dc6fSWolfram Sang interrupts = <2 18 0>; 14310b9dc6fSWolfram Sang reg = <0x980 0x80>; 14410b9dc6fSWolfram Sang }; 14510b9dc6fSWolfram Sang 14610b9dc6fSWolfram Sang gpio_simple: gpio@b00 { 14710b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 14810b9dc6fSWolfram Sang reg = <0xb00 0x40>; 14910b9dc6fSWolfram Sang interrupts = <1 7 0>; 15010b9dc6fSWolfram Sang gpio-controller; 15110b9dc6fSWolfram Sang #gpio-cells = <2>; 15210b9dc6fSWolfram Sang }; 15310b9dc6fSWolfram Sang 15410b9dc6fSWolfram Sang gpio_wkup: gpio@c00 { 15510b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 15610b9dc6fSWolfram Sang reg = <0xc00 0x40>; 15710b9dc6fSWolfram Sang interrupts = <1 8 0 0 3 0>; 15810b9dc6fSWolfram Sang gpio-controller; 15910b9dc6fSWolfram Sang #gpio-cells = <2>; 16010b9dc6fSWolfram Sang }; 16110b9dc6fSWolfram Sang 16210b9dc6fSWolfram Sang spi@f00 { 16310b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 16410b9dc6fSWolfram Sang reg = <0xf00 0x20>; 16510b9dc6fSWolfram Sang interrupts = <2 13 0 2 14 0>; 16610b9dc6fSWolfram Sang }; 16710b9dc6fSWolfram Sang 16810b9dc6fSWolfram Sang usb@1000 { 16910b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 17010b9dc6fSWolfram Sang reg = <0x1000 0xff>; 17110b9dc6fSWolfram Sang interrupts = <2 6 0>; 17210b9dc6fSWolfram Sang }; 17310b9dc6fSWolfram Sang 17410b9dc6fSWolfram Sang dma-controller@1200 { 17510b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; 17610b9dc6fSWolfram Sang reg = <0x1200 0x80>; 17710b9dc6fSWolfram Sang interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 17810b9dc6fSWolfram Sang 3 4 0 3 5 0 3 6 0 3 7 0 17910b9dc6fSWolfram Sang 3 8 0 3 9 0 3 10 0 3 11 0 18010b9dc6fSWolfram Sang 3 12 0 3 13 0 3 14 0 3 15 0>; 18110b9dc6fSWolfram Sang }; 18210b9dc6fSWolfram Sang 18310b9dc6fSWolfram Sang xlb@1f00 { 18410b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; 18510b9dc6fSWolfram Sang reg = <0x1f00 0x100>; 18610b9dc6fSWolfram Sang }; 18710b9dc6fSWolfram Sang 18810b9dc6fSWolfram Sang ac97@2000 { /* PSC1 is ac97 */ 18910b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; 19010b9dc6fSWolfram Sang cell-index = <0>; 19110b9dc6fSWolfram Sang reg = <0x2000 0x100>; 19210b9dc6fSWolfram Sang interrupts = <2 1 0>; 19310b9dc6fSWolfram Sang }; 19410b9dc6fSWolfram Sang 19510b9dc6fSWolfram Sang /* PSC2 port is used by CAN1/2 */ 19610b9dc6fSWolfram Sang 19710b9dc6fSWolfram Sang serial@2400 { /* PSC3 in UART mode */ 19810b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 19910b9dc6fSWolfram Sang cell-index = <2>; 20010b9dc6fSWolfram Sang reg = <0x2400 0x100>; 20110b9dc6fSWolfram Sang interrupts = <2 3 0>; 20210b9dc6fSWolfram Sang }; 20310b9dc6fSWolfram Sang 20410b9dc6fSWolfram Sang /* PSC4 is ??? */ 20510b9dc6fSWolfram Sang 20610b9dc6fSWolfram Sang /* PSC5 is ??? */ 20710b9dc6fSWolfram Sang 20810b9dc6fSWolfram Sang serial@2c00 { /* PSC6 in UART mode */ 20910b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 21010b9dc6fSWolfram Sang cell-index = <5>; 21110b9dc6fSWolfram Sang reg = <0x2c00 0x100>; 21210b9dc6fSWolfram Sang interrupts = <2 4 0>; 21310b9dc6fSWolfram Sang }; 21410b9dc6fSWolfram Sang 21510b9dc6fSWolfram Sang ethernet@3000 { 21610b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 21710b9dc6fSWolfram Sang reg = <0x3000 0x400>; 21810b9dc6fSWolfram Sang local-mac-address = [ 00 00 00 00 00 00 ]; 21910b9dc6fSWolfram Sang interrupts = <2 5 0>; 22010b9dc6fSWolfram Sang phy-handle = <&phy0>; 22110b9dc6fSWolfram Sang }; 22210b9dc6fSWolfram Sang 22310b9dc6fSWolfram Sang mdio@3000 { 22410b9dc6fSWolfram Sang #address-cells = <1>; 22510b9dc6fSWolfram Sang #size-cells = <0>; 22610b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 22710b9dc6fSWolfram Sang reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 22810b9dc6fSWolfram Sang interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 22910b9dc6fSWolfram Sang 23010b9dc6fSWolfram Sang phy0: ethernet-phy@0 { 23110b9dc6fSWolfram Sang reg = <0>; 23210b9dc6fSWolfram Sang }; 23310b9dc6fSWolfram Sang }; 23410b9dc6fSWolfram Sang 23510b9dc6fSWolfram Sang ata@3a00 { 23610b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 23710b9dc6fSWolfram Sang reg = <0x3a00 0x100>; 23810b9dc6fSWolfram Sang interrupts = <2 7 0>; 23910b9dc6fSWolfram Sang }; 24010b9dc6fSWolfram Sang 24110b9dc6fSWolfram Sang i2c@3d00 { 24210b9dc6fSWolfram Sang #address-cells = <1>; 24310b9dc6fSWolfram Sang #size-cells = <0>; 24410b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 24510b9dc6fSWolfram Sang reg = <0x3d00 0x40>; 24610b9dc6fSWolfram Sang interrupts = <2 15 0>; 24710b9dc6fSWolfram Sang fsl5200-clocking; 24810b9dc6fSWolfram Sang }; 24910b9dc6fSWolfram Sang 25010b9dc6fSWolfram Sang i2c@3d40 { 25110b9dc6fSWolfram Sang #address-cells = <1>; 25210b9dc6fSWolfram Sang #size-cells = <0>; 25310b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 25410b9dc6fSWolfram Sang reg = <0x3d40 0x40>; 25510b9dc6fSWolfram Sang interrupts = <2 16 0>; 25610b9dc6fSWolfram Sang fsl5200-clocking; 25710b9dc6fSWolfram Sang rtc@51 { 25810b9dc6fSWolfram Sang compatible = "nxp,pcf8563"; 25910b9dc6fSWolfram Sang reg = <0x51>; 26010b9dc6fSWolfram Sang }; 26110b9dc6fSWolfram Sang eeprom@52 { 26210b9dc6fSWolfram Sang compatible = "at24,24c32"; 26310b9dc6fSWolfram Sang reg = <0x52>; 26410b9dc6fSWolfram Sang }; 26510b9dc6fSWolfram Sang }; 26610b9dc6fSWolfram Sang 26710b9dc6fSWolfram Sang sram@8000 { 26810b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; 26910b9dc6fSWolfram Sang reg = <0x8000 0x4000>; 27010b9dc6fSWolfram Sang }; 27110b9dc6fSWolfram Sang }; 27210b9dc6fSWolfram Sang 27310b9dc6fSWolfram Sang pci@f0000d00 { 27410b9dc6fSWolfram Sang #interrupt-cells = <1>; 27510b9dc6fSWolfram Sang #size-cells = <2>; 27610b9dc6fSWolfram Sang #address-cells = <3>; 27710b9dc6fSWolfram Sang device_type = "pci"; 27810b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; 27910b9dc6fSWolfram Sang reg = <0xf0000d00 0x100>; 28010b9dc6fSWolfram Sang interrupt-map-mask = <0xf800 0 0 7>; 28110b9dc6fSWolfram Sang interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot 28210b9dc6fSWolfram Sang 0xc000 0 0 2 &mpc5200_pic 1 1 3 28310b9dc6fSWolfram Sang 0xc000 0 0 3 &mpc5200_pic 1 2 3 28410b9dc6fSWolfram Sang 0xc000 0 0 4 &mpc5200_pic 1 3 3 28510b9dc6fSWolfram Sang 28610b9dc6fSWolfram Sang 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot 28710b9dc6fSWolfram Sang 0xc800 0 0 2 &mpc5200_pic 1 2 3 28810b9dc6fSWolfram Sang 0xc800 0 0 3 &mpc5200_pic 1 3 3 28910b9dc6fSWolfram Sang 0xc800 0 0 4 &mpc5200_pic 0 0 3>; 29010b9dc6fSWolfram Sang clock-frequency = <0>; // From boot loader 29110b9dc6fSWolfram Sang interrupts = <2 8 0 2 9 0 2 10 0>; 29210b9dc6fSWolfram Sang bus-range = <0 0>; 29310b9dc6fSWolfram Sang ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 29410b9dc6fSWolfram Sang 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 29510b9dc6fSWolfram Sang 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; 29610b9dc6fSWolfram Sang }; 29710b9dc6fSWolfram Sang 29810b9dc6fSWolfram Sang localbus { 29910b9dc6fSWolfram Sang compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus"; 30010b9dc6fSWolfram Sang 30110b9dc6fSWolfram Sang #address-cells = <2>; 30210b9dc6fSWolfram Sang #size-cells = <1>; 30310b9dc6fSWolfram Sang 30410b9dc6fSWolfram Sang ranges = <0 0 0xfe000000 0x02000000 30510b9dc6fSWolfram Sang 1 0 0xfc000000 0x02000000 30610b9dc6fSWolfram Sang 2 0 0xfbe00000 0x00200000 30710b9dc6fSWolfram Sang 3 0 0xf9e00000 0x02000000 30810b9dc6fSWolfram Sang 4 0 0xf7e00000 0x02000000 30910b9dc6fSWolfram Sang 5 0 0xe6000000 0x02000000 31010b9dc6fSWolfram Sang 6 0 0xe8000000 0x02000000 31110b9dc6fSWolfram Sang 7 0 0xea000000 0x02000000>; 31210b9dc6fSWolfram Sang 31310b9dc6fSWolfram Sang flash@0,0 { 31410b9dc6fSWolfram Sang compatible = "cfi-flash"; 31510b9dc6fSWolfram Sang reg = <0 0 0x02000000>; 31610b9dc6fSWolfram Sang bank-width = <4>; 31710b9dc6fSWolfram Sang #size-cells = <1>; 31810b9dc6fSWolfram Sang #address-cells = <1>; 31910b9dc6fSWolfram Sang 32010b9dc6fSWolfram Sang partition@0 { 32110b9dc6fSWolfram Sang label = "ubootl"; 32210b9dc6fSWolfram Sang reg = <0x00000000 0x00040000>; 32310b9dc6fSWolfram Sang }; 32410b9dc6fSWolfram Sang partition@40000 { 32510b9dc6fSWolfram Sang label = "kernel"; 32610b9dc6fSWolfram Sang reg = <0x00040000 0x001c0000>; 32710b9dc6fSWolfram Sang }; 32810b9dc6fSWolfram Sang partition@200000 { 32910b9dc6fSWolfram Sang label = "jffs2"; 33010b9dc6fSWolfram Sang reg = <0x00200000 0x01d00000>; 33110b9dc6fSWolfram Sang }; 33210b9dc6fSWolfram Sang partition@1f00000 { 33310b9dc6fSWolfram Sang label = "uboot"; 33410b9dc6fSWolfram Sang reg = <0x01f00000 0x00040000>; 33510b9dc6fSWolfram Sang }; 33610b9dc6fSWolfram Sang partition@1f40000 { 33710b9dc6fSWolfram Sang label = "env"; 33810b9dc6fSWolfram Sang reg = <0x01f40000 0x00040000>; 33910b9dc6fSWolfram Sang }; 34010b9dc6fSWolfram Sang partition@1f80000 { 34110b9dc6fSWolfram Sang label = "oftree"; 34210b9dc6fSWolfram Sang reg = <0x01f80000 0x00040000>; 34310b9dc6fSWolfram Sang }; 34410b9dc6fSWolfram Sang partition@1fc0000 { 34510b9dc6fSWolfram Sang label = "space"; 34610b9dc6fSWolfram Sang reg = <0x01fc0000 0x00040000>; 34710b9dc6fSWolfram Sang }; 34810b9dc6fSWolfram Sang }; 34910b9dc6fSWolfram Sang 35010b9dc6fSWolfram Sang sram@2,0 { 35110b9dc6fSWolfram Sang compatible = "mtd-ram"; 35210b9dc6fSWolfram Sang reg = <2 0 0x00200000>; 35310b9dc6fSWolfram Sang bank-width = <2>; 35410b9dc6fSWolfram Sang }; 35510b9dc6fSWolfram Sang 35610b9dc6fSWolfram Sang /* 35710b9dc6fSWolfram Sang * example snippets for FPGA 35810b9dc6fSWolfram Sang * 35910b9dc6fSWolfram Sang * fpga@3,0 { 36010b9dc6fSWolfram Sang * compatible = "fpga_driver"; 36110b9dc6fSWolfram Sang * reg = <3 0 0x02000000>; 36210b9dc6fSWolfram Sang * bank-width = <4>; 36310b9dc6fSWolfram Sang * }; 36410b9dc6fSWolfram Sang * 36510b9dc6fSWolfram Sang * fpga@4,0 { 36610b9dc6fSWolfram Sang * compatible = "fpga_driver"; 36710b9dc6fSWolfram Sang * reg = <4 0 0x02000000>; 36810b9dc6fSWolfram Sang * bank-width = <4>; 36910b9dc6fSWolfram Sang * }; 37010b9dc6fSWolfram Sang */ 37110b9dc6fSWolfram Sang 37210b9dc6fSWolfram Sang /* 37310b9dc6fSWolfram Sang * example snippets for free chipselects 37410b9dc6fSWolfram Sang * 37510b9dc6fSWolfram Sang * device@5,0 { 37610b9dc6fSWolfram Sang * compatible = "custom_driver"; 37710b9dc6fSWolfram Sang * reg = <5 0 0x02000000>; 37810b9dc6fSWolfram Sang * }; 37910b9dc6fSWolfram Sang * 38010b9dc6fSWolfram Sang * device@6,0 { 38110b9dc6fSWolfram Sang * compatible = "custom_driver"; 38210b9dc6fSWolfram Sang * reg = <6 0 0x02000000>; 38310b9dc6fSWolfram Sang * }; 38410b9dc6fSWolfram Sang * 38510b9dc6fSWolfram Sang * device@7,0 { 38610b9dc6fSWolfram Sang * compatible = "custom_driver"; 38710b9dc6fSWolfram Sang * reg = <7 0 0x02000000>; 38810b9dc6fSWolfram Sang * }; 38910b9dc6fSWolfram Sang */ 39010b9dc6fSWolfram Sang }; 39110b9dc6fSWolfram Sang}; 39210b9dc6fSWolfram Sang 393