1/* 2 * MPC866 ADS Device Tree Source 3 * 4 * Copyright 2006 MontaVista Software, Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12 13/ { 14 model = "MPC866ADS"; 15 compatible = "mpc8xx"; 16 #address-cells = <1>; 17 #size-cells = <1>; 18 19 cpus { 20 #address-cells = <1>; 21 #size-cells = <0>; 22 23 PowerPC,866@0 { 24 device_type = "cpu"; 25 reg = <0>; 26 d-cache-line-size = <20>; // 32 bytes 27 i-cache-line-size = <20>; // 32 bytes 28 d-cache-size = <2000>; // L1, 8K 29 i-cache-size = <4000>; // L1, 16K 30 timebase-frequency = <0>; 31 bus-frequency = <0>; 32 clock-frequency = <0>; 33 32-bit; 34 interrupts = <f 2>; // decrementer interrupt 35 interrupt-parent = <&Mpc8xx_pic>; 36 }; 37 }; 38 39 memory { 40 device_type = "memory"; 41 reg = <00000000 800000>; 42 }; 43 44 soc866@ff000000 { 45 #address-cells = <1>; 46 #size-cells = <1>; 47 #interrupt-cells = <2>; 48 device_type = "soc"; 49 ranges = <0 ff000000 00100000>; 50 reg = <ff000000 00000200>; 51 bus-frequency = <0>; 52 mdio@e80 { 53 device_type = "mdio"; 54 compatible = "fs_enet"; 55 reg = <e80 8>; 56 #address-cells = <1>; 57 #size-cells = <0>; 58 phy: ethernet-phy@f { 59 reg = <f>; 60 device_type = "ethernet-phy"; 61 }; 62 }; 63 64 fec@e00 { 65 device_type = "network"; 66 compatible = "fs_enet"; 67 model = "FEC"; 68 device-id = <1>; 69 reg = <e00 188>; 70 mac-address = [ 00 00 0C 00 01 FD ]; 71 interrupts = <3 1>; 72 interrupt-parent = <&Mpc8xx_pic>; 73 phy-handle = <&Phy>; 74 }; 75 76 mpc8xx_pic: pic@ff000000 { 77 interrupt-controller; 78 #address-cells = <0>; 79 #interrupt-cells = <2>; 80 reg = <0 24>; 81 built-in; 82 device_type = "mpc8xx-pic"; 83 compatible = "CPM"; 84 }; 85 86 cpm@ff000000 { 87 #address-cells = <1>; 88 #size-cells = <1>; 89 #interrupt-cells = <2>; 90 device_type = "cpm"; 91 model = "CPM"; 92 ranges = <0 0 4000>; 93 reg = <860 f0>; 94 command-proc = <9c0>; 95 brg-frequency = <0>; 96 interrupts = <0 2>; // cpm error interrupt 97 interrupt-parent = <&Cpm_pic>; 98 99 cpm_pic: pic@930 { 100 interrupt-controller; 101 #address-cells = <0>; 102 #interrupt-cells = <2>; 103 interrupts = <5 2 0 2>; 104 interrupt-parent = <&Mpc8xx_pic>; 105 reg = <930 20>; 106 built-in; 107 device_type = "cpm-pic"; 108 compatible = "CPM"; 109 }; 110 111 smc@a80 { 112 device_type = "serial"; 113 compatible = "cpm_uart"; 114 model = "SMC"; 115 device-id = <1>; 116 reg = <a80 10 3e80 40>; 117 clock-setup = <00ffffff 0>; 118 rx-clock = <1>; 119 tx-clock = <1>; 120 current-speed = <0>; 121 interrupts = <4 3>; 122 interrupt-parent = <&Cpm_pic>; 123 }; 124 125 smc@a90 { 126 device_type = "serial"; 127 compatible = "cpm_uart"; 128 model = "SMC"; 129 device-id = <2>; 130 reg = <a90 20 3f80 40>; 131 clock-setup = <ff00ffff 90000>; 132 rx-clock = <2>; 133 tx-clock = <2>; 134 current-speed = <0>; 135 interrupts = <3 3>; 136 interrupt-parent = <&Cpm_pic>; 137 }; 138 139 scc@a00 { 140 device_type = "network"; 141 compatible = "fs_enet"; 142 model = "SCC"; 143 device-id = <1>; 144 reg = <a00 18 3c00 80>; 145 mac-address = [ 00 00 0C 00 03 FD ]; 146 interrupts = <1e 3>; 147 interrupt-parent = <&Cpm_pic>; 148 }; 149 }; 150 }; 151}; 152