123dd1cbfSKim Phillips/* 223dd1cbfSKim Phillips * MPC8379E RDB Device Tree Source 323dd1cbfSKim Phillips * 423dd1cbfSKim Phillips * Copyright 2007, 2008 Freescale Semiconductor Inc. 523dd1cbfSKim Phillips * 623dd1cbfSKim Phillips * This program is free software; you can redistribute it and/or modify it 723dd1cbfSKim Phillips * under the terms of the GNU General Public License as published by the 823dd1cbfSKim Phillips * Free Software Foundation; either version 2 of the License, or (at your 923dd1cbfSKim Phillips * option) any later version. 1023dd1cbfSKim Phillips */ 1123dd1cbfSKim Phillips 1223dd1cbfSKim Phillips/dts-v1/; 1323dd1cbfSKim Phillips 1423dd1cbfSKim Phillips/ { 153b29dadeSKim Phillips compatible = "fsl,mpc8379rdb"; 1623dd1cbfSKim Phillips #address-cells = <1>; 1723dd1cbfSKim Phillips #size-cells = <1>; 1823dd1cbfSKim Phillips 1923dd1cbfSKim Phillips aliases { 2023dd1cbfSKim Phillips ethernet0 = &enet0; 2123dd1cbfSKim Phillips ethernet1 = &enet1; 2223dd1cbfSKim Phillips serial0 = &serial0; 2323dd1cbfSKim Phillips serial1 = &serial1; 2423dd1cbfSKim Phillips pci0 = &pci0; 2523dd1cbfSKim Phillips }; 2623dd1cbfSKim Phillips 2723dd1cbfSKim Phillips cpus { 2823dd1cbfSKim Phillips #address-cells = <1>; 2923dd1cbfSKim Phillips #size-cells = <0>; 3023dd1cbfSKim Phillips 3123dd1cbfSKim Phillips PowerPC,8379@0 { 3223dd1cbfSKim Phillips device_type = "cpu"; 33cda13dd1SPaul Gortmaker reg = <0x0>; 3423dd1cbfSKim Phillips d-cache-line-size = <32>; 3523dd1cbfSKim Phillips i-cache-line-size = <32>; 3623dd1cbfSKim Phillips d-cache-size = <32768>; 3723dd1cbfSKim Phillips i-cache-size = <32768>; 3823dd1cbfSKim Phillips timebase-frequency = <0>; 3923dd1cbfSKim Phillips bus-frequency = <0>; 4023dd1cbfSKim Phillips clock-frequency = <0>; 4123dd1cbfSKim Phillips }; 4223dd1cbfSKim Phillips }; 4323dd1cbfSKim Phillips 4423dd1cbfSKim Phillips memory { 4523dd1cbfSKim Phillips device_type = "memory"; 4623dd1cbfSKim Phillips reg = <0x00000000 0x10000000>; // 256MB at 0 4723dd1cbfSKim Phillips }; 4823dd1cbfSKim Phillips 4923dd1cbfSKim Phillips localbus@e0005000 { 5023dd1cbfSKim Phillips #address-cells = <2>; 5123dd1cbfSKim Phillips #size-cells = <1>; 5223dd1cbfSKim Phillips compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus"; 5323dd1cbfSKim Phillips reg = <0xe0005000 0x1000>; 54cda13dd1SPaul Gortmaker interrupts = <77 0x8>; 5523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 5623dd1cbfSKim Phillips 5723dd1cbfSKim Phillips // CS0 and CS1 are swapped when 5823dd1cbfSKim Phillips // booting from nand, but the 5923dd1cbfSKim Phillips // addresses are the same. 60cda13dd1SPaul Gortmaker ranges = <0x0 0x0 0xfe000000 0x00800000 61cda13dd1SPaul Gortmaker 0x1 0x0 0xe0600000 0x00008000 62cda13dd1SPaul Gortmaker 0x2 0x0 0xf0000000 0x00020000 63cda13dd1SPaul Gortmaker 0x3 0x0 0xfa000000 0x00008000>; 6423dd1cbfSKim Phillips 6523dd1cbfSKim Phillips flash@0,0 { 6623dd1cbfSKim Phillips #address-cells = <1>; 6723dd1cbfSKim Phillips #size-cells = <1>; 6823dd1cbfSKim Phillips compatible = "cfi-flash"; 69cda13dd1SPaul Gortmaker reg = <0x0 0x0 0x800000>; 7023dd1cbfSKim Phillips bank-width = <2>; 7123dd1cbfSKim Phillips device-width = <1>; 7223dd1cbfSKim Phillips }; 7323dd1cbfSKim Phillips 7423dd1cbfSKim Phillips nand@1,0 { 7523dd1cbfSKim Phillips #address-cells = <1>; 7623dd1cbfSKim Phillips #size-cells = <1>; 7723dd1cbfSKim Phillips compatible = "fsl,mpc8379-fcm-nand", 7823dd1cbfSKim Phillips "fsl,elbc-fcm-nand"; 79cda13dd1SPaul Gortmaker reg = <0x1 0x0 0x8000>; 8023dd1cbfSKim Phillips 8123dd1cbfSKim Phillips u-boot@0 { 8223dd1cbfSKim Phillips reg = <0x0 0x100000>; 8323dd1cbfSKim Phillips read-only; 8423dd1cbfSKim Phillips }; 8523dd1cbfSKim Phillips 8623dd1cbfSKim Phillips kernel@100000 { 8723dd1cbfSKim Phillips reg = <0x100000 0x300000>; 8823dd1cbfSKim Phillips }; 8923dd1cbfSKim Phillips fs@400000 { 9023dd1cbfSKim Phillips reg = <0x400000 0x1c00000>; 9123dd1cbfSKim Phillips }; 9223dd1cbfSKim Phillips }; 9323dd1cbfSKim Phillips }; 9423dd1cbfSKim Phillips 9523dd1cbfSKim Phillips immr@e0000000 { 9623dd1cbfSKim Phillips #address-cells = <1>; 9723dd1cbfSKim Phillips #size-cells = <1>; 9823dd1cbfSKim Phillips device_type = "soc"; 9923dd1cbfSKim Phillips compatible = "simple-bus"; 100cda13dd1SPaul Gortmaker ranges = <0x0 0xe0000000 0x00100000>; 10123dd1cbfSKim Phillips reg = <0xe0000000 0x00000200>; 10223dd1cbfSKim Phillips bus-frequency = <0>; 10323dd1cbfSKim Phillips 10423dd1cbfSKim Phillips wdt@200 { 10523dd1cbfSKim Phillips device_type = "watchdog"; 10623dd1cbfSKim Phillips compatible = "mpc83xx_wdt"; 10723dd1cbfSKim Phillips reg = <0x200 0x100>; 10823dd1cbfSKim Phillips }; 10923dd1cbfSKim Phillips 11023dd1cbfSKim Phillips i2c@3000 { 11123dd1cbfSKim Phillips #address-cells = <1>; 11223dd1cbfSKim Phillips #size-cells = <0>; 11323dd1cbfSKim Phillips cell-index = <0>; 11423dd1cbfSKim Phillips compatible = "fsl-i2c"; 11523dd1cbfSKim Phillips reg = <0x3000 0x100>; 116cda13dd1SPaul Gortmaker interrupts = <14 0x8>; 11723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 11823dd1cbfSKim Phillips dfsrr; 11923dd1cbfSKim Phillips rtc@68 { 12023dd1cbfSKim Phillips device_type = "rtc"; 12123dd1cbfSKim Phillips compatible = "dallas,ds1339"; 12223dd1cbfSKim Phillips reg = <0x68>; 12323dd1cbfSKim Phillips }; 12423dd1cbfSKim Phillips }; 12523dd1cbfSKim Phillips 12623dd1cbfSKim Phillips i2c@3100 { 12723dd1cbfSKim Phillips #address-cells = <1>; 12823dd1cbfSKim Phillips #size-cells = <0>; 12923dd1cbfSKim Phillips cell-index = <1>; 13023dd1cbfSKim Phillips compatible = "fsl-i2c"; 13123dd1cbfSKim Phillips reg = <0x3100 0x100>; 132cda13dd1SPaul Gortmaker interrupts = <15 0x8>; 13323dd1cbfSKim Phillips interrupt-parent = <&ipic>; 13423dd1cbfSKim Phillips dfsrr; 13523dd1cbfSKim Phillips }; 13623dd1cbfSKim Phillips 13723dd1cbfSKim Phillips spi@7000 { 13823dd1cbfSKim Phillips cell-index = <0>; 13923dd1cbfSKim Phillips compatible = "fsl,spi"; 14023dd1cbfSKim Phillips reg = <0x7000 0x1000>; 141cda13dd1SPaul Gortmaker interrupts = <16 0x8>; 14223dd1cbfSKim Phillips interrupt-parent = <&ipic>; 14323dd1cbfSKim Phillips mode = "cpu"; 14423dd1cbfSKim Phillips }; 14523dd1cbfSKim Phillips 146dee80553SKumar Gala dma@82a8 { 147dee80553SKumar Gala #address-cells = <1>; 148dee80553SKumar Gala #size-cells = <1>; 149dee80553SKumar Gala compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; 150dee80553SKumar Gala reg = <0x82a8 4>; 151dee80553SKumar Gala ranges = <0 0x8100 0x1a8>; 152dee80553SKumar Gala interrupt-parent = <&ipic>; 153dee80553SKumar Gala interrupts = <71 8>; 154dee80553SKumar Gala cell-index = <0>; 155dee80553SKumar Gala dma-channel@0 { 156dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 157dee80553SKumar Gala reg = <0 0x80>; 158aeb42762SKumar Gala cell-index = <0>; 159dee80553SKumar Gala interrupt-parent = <&ipic>; 160dee80553SKumar Gala interrupts = <71 8>; 161dee80553SKumar Gala }; 162dee80553SKumar Gala dma-channel@80 { 163dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 164dee80553SKumar Gala reg = <0x80 0x80>; 165aeb42762SKumar Gala cell-index = <1>; 166dee80553SKumar Gala interrupt-parent = <&ipic>; 167dee80553SKumar Gala interrupts = <71 8>; 168dee80553SKumar Gala }; 169dee80553SKumar Gala dma-channel@100 { 170dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 171dee80553SKumar Gala reg = <0x100 0x80>; 172aeb42762SKumar Gala cell-index = <2>; 173dee80553SKumar Gala interrupt-parent = <&ipic>; 174dee80553SKumar Gala interrupts = <71 8>; 175dee80553SKumar Gala }; 176dee80553SKumar Gala dma-channel@180 { 177dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 178dee80553SKumar Gala reg = <0x180 0x28>; 179aeb42762SKumar Gala cell-index = <3>; 180dee80553SKumar Gala interrupt-parent = <&ipic>; 181dee80553SKumar Gala interrupts = <71 8>; 182dee80553SKumar Gala }; 183dee80553SKumar Gala }; 184dee80553SKumar Gala 18523dd1cbfSKim Phillips usb@23000 { 18623dd1cbfSKim Phillips compatible = "fsl-usb2-dr"; 18723dd1cbfSKim Phillips reg = <0x23000 0x1000>; 18823dd1cbfSKim Phillips #address-cells = <1>; 18923dd1cbfSKim Phillips #size-cells = <0>; 19023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 191cda13dd1SPaul Gortmaker interrupts = <38 0x8>; 1928e8ff3a3SAnton Vorontsov phy_type = "ulpi"; 19323dd1cbfSKim Phillips }; 19423dd1cbfSKim Phillips 19523dd1cbfSKim Phillips mdio@24520 { 19623dd1cbfSKim Phillips #address-cells = <1>; 19723dd1cbfSKim Phillips #size-cells = <0>; 19823dd1cbfSKim Phillips compatible = "fsl,gianfar-mdio"; 19923dd1cbfSKim Phillips reg = <0x24520 0x20>; 20023dd1cbfSKim Phillips phy2: ethernet-phy@2 { 20123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 202cda13dd1SPaul Gortmaker interrupts = <17 0x8>; 203cda13dd1SPaul Gortmaker reg = <0x2>; 20423dd1cbfSKim Phillips device_type = "ethernet-phy"; 20523dd1cbfSKim Phillips }; 20623dd1cbfSKim Phillips }; 20723dd1cbfSKim Phillips 20823dd1cbfSKim Phillips enet0: ethernet@24000 { 20923dd1cbfSKim Phillips cell-index = <0>; 21023dd1cbfSKim Phillips device_type = "network"; 21123dd1cbfSKim Phillips model = "eTSEC"; 21223dd1cbfSKim Phillips compatible = "gianfar"; 21323dd1cbfSKim Phillips reg = <0x24000 0x1000>; 21423dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 215cda13dd1SPaul Gortmaker interrupts = <32 0x8 33 0x8 34 0x8>; 21623dd1cbfSKim Phillips phy-connection-type = "mii"; 21723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 21823dd1cbfSKim Phillips phy-handle = <&phy2>; 21923dd1cbfSKim Phillips }; 22023dd1cbfSKim Phillips 22123dd1cbfSKim Phillips enet1: ethernet@25000 { 22223dd1cbfSKim Phillips cell-index = <1>; 22323dd1cbfSKim Phillips device_type = "network"; 22423dd1cbfSKim Phillips model = "eTSEC"; 22523dd1cbfSKim Phillips compatible = "gianfar"; 22623dd1cbfSKim Phillips reg = <0x25000 0x1000>; 22723dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 228cda13dd1SPaul Gortmaker interrupts = <35 0x8 36 0x8 37 0x8>; 22923dd1cbfSKim Phillips phy-connection-type = "mii"; 23023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 231f17c6323SAnton Vorontsov fixed-link = <1 1 1000 0 0>; 23223dd1cbfSKim Phillips }; 23323dd1cbfSKim Phillips 23423dd1cbfSKim Phillips serial0: serial@4500 { 23523dd1cbfSKim Phillips cell-index = <0>; 23623dd1cbfSKim Phillips device_type = "serial"; 23723dd1cbfSKim Phillips compatible = "ns16550"; 23823dd1cbfSKim Phillips reg = <0x4500 0x100>; 23923dd1cbfSKim Phillips clock-frequency = <0>; 240cda13dd1SPaul Gortmaker interrupts = <9 0x8>; 24123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 24223dd1cbfSKim Phillips }; 24323dd1cbfSKim Phillips 24423dd1cbfSKim Phillips serial1: serial@4600 { 24523dd1cbfSKim Phillips cell-index = <1>; 24623dd1cbfSKim Phillips device_type = "serial"; 24723dd1cbfSKim Phillips compatible = "ns16550"; 24823dd1cbfSKim Phillips reg = <0x4600 0x100>; 24923dd1cbfSKim Phillips clock-frequency = <0>; 250cda13dd1SPaul Gortmaker interrupts = <10 0x8>; 25123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 25223dd1cbfSKim Phillips }; 25323dd1cbfSKim Phillips 25423dd1cbfSKim Phillips crypto@30000 { 2553fd44736SKim Phillips compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", 2563fd44736SKim Phillips "fsl,sec2.1", "fsl,sec2.0"; 25723dd1cbfSKim Phillips reg = <0x30000 0x10000>; 258cda13dd1SPaul Gortmaker interrupts = <11 0x8>; 25923dd1cbfSKim Phillips interrupt-parent = <&ipic>; 2603fd44736SKim Phillips fsl,num-channels = <4>; 2613fd44736SKim Phillips fsl,channel-fifo-len = <24>; 2623fd44736SKim Phillips fsl,exec-units-mask = <0x9fe>; 2633fd44736SKim Phillips fsl,descriptor-types-mask = <0x3ab0ebf>; 26423dd1cbfSKim Phillips }; 26523dd1cbfSKim Phillips 26623dd1cbfSKim Phillips sata@18000 { 26723dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 26823dd1cbfSKim Phillips reg = <0x18000 0x1000>; 269cda13dd1SPaul Gortmaker interrupts = <44 0x8>; 27023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 27123dd1cbfSKim Phillips }; 27223dd1cbfSKim Phillips 27323dd1cbfSKim Phillips sata@19000 { 27423dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 27523dd1cbfSKim Phillips reg = <0x19000 0x1000>; 276cda13dd1SPaul Gortmaker interrupts = <45 0x8>; 27723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 27823dd1cbfSKim Phillips }; 27923dd1cbfSKim Phillips 28023dd1cbfSKim Phillips sata@1a000 { 28123dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 28223dd1cbfSKim Phillips reg = <0x1a000 0x1000>; 283cda13dd1SPaul Gortmaker interrupts = <46 0x8>; 28423dd1cbfSKim Phillips interrupt-parent = <&ipic>; 28523dd1cbfSKim Phillips }; 28623dd1cbfSKim Phillips 28723dd1cbfSKim Phillips sata@1b000 { 28823dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 28923dd1cbfSKim Phillips reg = <0x1b000 0x1000>; 290cda13dd1SPaul Gortmaker interrupts = <47 0x8>; 29123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 29223dd1cbfSKim Phillips }; 29323dd1cbfSKim Phillips 29423dd1cbfSKim Phillips /* IPIC 29523dd1cbfSKim Phillips * interrupts cell = <intr #, sense> 29623dd1cbfSKim Phillips * sense values match linux IORESOURCE_IRQ_* defines: 29723dd1cbfSKim Phillips * sense == 8: Level, low assertion 29823dd1cbfSKim Phillips * sense == 2: Edge, high-to-low change 29923dd1cbfSKim Phillips */ 30023dd1cbfSKim Phillips ipic: interrupt-controller@700 { 30123dd1cbfSKim Phillips compatible = "fsl,ipic"; 30223dd1cbfSKim Phillips interrupt-controller; 30323dd1cbfSKim Phillips #address-cells = <0>; 30423dd1cbfSKim Phillips #interrupt-cells = <2>; 30523dd1cbfSKim Phillips reg = <0x700 0x100>; 30623dd1cbfSKim Phillips }; 30723dd1cbfSKim Phillips }; 30823dd1cbfSKim Phillips 30923dd1cbfSKim Phillips pci0: pci@e0008500 { 31023dd1cbfSKim Phillips interrupt-map-mask = <0xf800 0 0 7>; 31123dd1cbfSKim Phillips interrupt-map = < 31223dd1cbfSKim Phillips /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ 31323dd1cbfSKim Phillips 31423dd1cbfSKim Phillips /* IDSEL AD14 IRQ6 inta */ 315cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x1 &ipic 22 0x8 31623dd1cbfSKim Phillips 31723dd1cbfSKim Phillips /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ 318cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x1 &ipic 21 0x8 319cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x2 &ipic 22 0x8 320cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x4 &ipic 23 0x8 32123dd1cbfSKim Phillips 32223dd1cbfSKim Phillips /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ 323cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x1 &ipic 23 0x8 324cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x2 &ipic 21 0x8 325cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; 32623dd1cbfSKim Phillips interrupt-parent = <&ipic>; 327cda13dd1SPaul Gortmaker interrupts = <66 0x8>; 328cda13dd1SPaul Gortmaker bus-range = <0x0 0x0>; 329cda13dd1SPaul Gortmaker ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 330cda13dd1SPaul Gortmaker 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 331cda13dd1SPaul Gortmaker 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 33223dd1cbfSKim Phillips clock-frequency = <66666666>; 33323dd1cbfSKim Phillips #interrupt-cells = <1>; 33423dd1cbfSKim Phillips #size-cells = <2>; 33523dd1cbfSKim Phillips #address-cells = <3>; 33623dd1cbfSKim Phillips reg = <0xe0008500 0x100>; 33723dd1cbfSKim Phillips compatible = "fsl,mpc8349-pci"; 33823dd1cbfSKim Phillips device_type = "pci"; 33923dd1cbfSKim Phillips }; 34023dd1cbfSKim Phillips}; 341