123dd1cbfSKim Phillips/* 223dd1cbfSKim Phillips * MPC8379E RDB Device Tree Source 323dd1cbfSKim Phillips * 423dd1cbfSKim Phillips * Copyright 2007, 2008 Freescale Semiconductor Inc. 523dd1cbfSKim Phillips * 623dd1cbfSKim Phillips * This program is free software; you can redistribute it and/or modify it 723dd1cbfSKim Phillips * under the terms of the GNU General Public License as published by the 823dd1cbfSKim Phillips * Free Software Foundation; either version 2 of the License, or (at your 923dd1cbfSKim Phillips * option) any later version. 1023dd1cbfSKim Phillips */ 1123dd1cbfSKim Phillips 1223dd1cbfSKim Phillips/dts-v1/; 1323dd1cbfSKim Phillips 1423dd1cbfSKim Phillips/ { 153b29dadeSKim Phillips compatible = "fsl,mpc8379rdb"; 1623dd1cbfSKim Phillips #address-cells = <1>; 1723dd1cbfSKim Phillips #size-cells = <1>; 1823dd1cbfSKim Phillips 1923dd1cbfSKim Phillips aliases { 2023dd1cbfSKim Phillips ethernet0 = &enet0; 2123dd1cbfSKim Phillips ethernet1 = &enet1; 2223dd1cbfSKim Phillips serial0 = &serial0; 2323dd1cbfSKim Phillips serial1 = &serial1; 2423dd1cbfSKim Phillips pci0 = &pci0; 2523dd1cbfSKim Phillips }; 2623dd1cbfSKim Phillips 2723dd1cbfSKim Phillips cpus { 2823dd1cbfSKim Phillips #address-cells = <1>; 2923dd1cbfSKim Phillips #size-cells = <0>; 3023dd1cbfSKim Phillips 3123dd1cbfSKim Phillips PowerPC,8379@0 { 3223dd1cbfSKim Phillips device_type = "cpu"; 33cda13dd1SPaul Gortmaker reg = <0x0>; 3423dd1cbfSKim Phillips d-cache-line-size = <32>; 3523dd1cbfSKim Phillips i-cache-line-size = <32>; 3623dd1cbfSKim Phillips d-cache-size = <32768>; 3723dd1cbfSKim Phillips i-cache-size = <32768>; 3823dd1cbfSKim Phillips timebase-frequency = <0>; 3923dd1cbfSKim Phillips bus-frequency = <0>; 4023dd1cbfSKim Phillips clock-frequency = <0>; 4123dd1cbfSKim Phillips }; 4223dd1cbfSKim Phillips }; 4323dd1cbfSKim Phillips 4423dd1cbfSKim Phillips memory { 4523dd1cbfSKim Phillips device_type = "memory"; 4623dd1cbfSKim Phillips reg = <0x00000000 0x10000000>; // 256MB at 0 4723dd1cbfSKim Phillips }; 4823dd1cbfSKim Phillips 4923dd1cbfSKim Phillips localbus@e0005000 { 5023dd1cbfSKim Phillips #address-cells = <2>; 5123dd1cbfSKim Phillips #size-cells = <1>; 5223dd1cbfSKim Phillips compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus"; 5323dd1cbfSKim Phillips reg = <0xe0005000 0x1000>; 54cda13dd1SPaul Gortmaker interrupts = <77 0x8>; 5523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 5623dd1cbfSKim Phillips 5723dd1cbfSKim Phillips // CS0 and CS1 are swapped when 5823dd1cbfSKim Phillips // booting from nand, but the 5923dd1cbfSKim Phillips // addresses are the same. 60cda13dd1SPaul Gortmaker ranges = <0x0 0x0 0xfe000000 0x00800000 61cda13dd1SPaul Gortmaker 0x1 0x0 0xe0600000 0x00008000 62cda13dd1SPaul Gortmaker 0x2 0x0 0xf0000000 0x00020000 63cda13dd1SPaul Gortmaker 0x3 0x0 0xfa000000 0x00008000>; 6423dd1cbfSKim Phillips 6523dd1cbfSKim Phillips flash@0,0 { 6623dd1cbfSKim Phillips #address-cells = <1>; 6723dd1cbfSKim Phillips #size-cells = <1>; 6823dd1cbfSKim Phillips compatible = "cfi-flash"; 69cda13dd1SPaul Gortmaker reg = <0x0 0x0 0x800000>; 7023dd1cbfSKim Phillips bank-width = <2>; 7123dd1cbfSKim Phillips device-width = <1>; 7223dd1cbfSKim Phillips }; 7323dd1cbfSKim Phillips 7423dd1cbfSKim Phillips nand@1,0 { 7523dd1cbfSKim Phillips #address-cells = <1>; 7623dd1cbfSKim Phillips #size-cells = <1>; 7723dd1cbfSKim Phillips compatible = "fsl,mpc8379-fcm-nand", 7823dd1cbfSKim Phillips "fsl,elbc-fcm-nand"; 79cda13dd1SPaul Gortmaker reg = <0x1 0x0 0x8000>; 8023dd1cbfSKim Phillips 8123dd1cbfSKim Phillips u-boot@0 { 8223dd1cbfSKim Phillips reg = <0x0 0x100000>; 8323dd1cbfSKim Phillips read-only; 8423dd1cbfSKim Phillips }; 8523dd1cbfSKim Phillips 8623dd1cbfSKim Phillips kernel@100000 { 8723dd1cbfSKim Phillips reg = <0x100000 0x300000>; 8823dd1cbfSKim Phillips }; 8923dd1cbfSKim Phillips fs@400000 { 9023dd1cbfSKim Phillips reg = <0x400000 0x1c00000>; 9123dd1cbfSKim Phillips }; 9223dd1cbfSKim Phillips }; 9323dd1cbfSKim Phillips }; 9423dd1cbfSKim Phillips 9523dd1cbfSKim Phillips immr@e0000000 { 9623dd1cbfSKim Phillips #address-cells = <1>; 9723dd1cbfSKim Phillips #size-cells = <1>; 9823dd1cbfSKim Phillips device_type = "soc"; 9923dd1cbfSKim Phillips compatible = "simple-bus"; 100cda13dd1SPaul Gortmaker ranges = <0x0 0xe0000000 0x00100000>; 10123dd1cbfSKim Phillips reg = <0xe0000000 0x00000200>; 10223dd1cbfSKim Phillips bus-frequency = <0>; 10323dd1cbfSKim Phillips 10423dd1cbfSKim Phillips wdt@200 { 10523dd1cbfSKim Phillips device_type = "watchdog"; 10623dd1cbfSKim Phillips compatible = "mpc83xx_wdt"; 10723dd1cbfSKim Phillips reg = <0x200 0x100>; 10823dd1cbfSKim Phillips }; 10923dd1cbfSKim Phillips 1109e7d95c1SReynes Philippe gpio1: gpio-controller@c00 { 1119e7d95c1SReynes Philippe #gpio-cells = <2>; 1129e7d95c1SReynes Philippe compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; 1139e7d95c1SReynes Philippe reg = <0xc00 0x100>; 1149e7d95c1SReynes Philippe interrupts = <74 0x8>; 1159e7d95c1SReynes Philippe interrupt-parent = <&ipic>; 1169e7d95c1SReynes Philippe gpio-controller; 1179e7d95c1SReynes Philippe }; 1189e7d95c1SReynes Philippe 1199e7d95c1SReynes Philippe gpio2: gpio-controller@d00 { 1209e7d95c1SReynes Philippe #gpio-cells = <2>; 1219e7d95c1SReynes Philippe compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; 1229e7d95c1SReynes Philippe reg = <0xd00 0x100>; 1239e7d95c1SReynes Philippe interrupts = <75 0x8>; 1249e7d95c1SReynes Philippe interrupt-parent = <&ipic>; 1259e7d95c1SReynes Philippe gpio-controller; 1269e7d95c1SReynes Philippe }; 1279e7d95c1SReynes Philippe 12823dd1cbfSKim Phillips i2c@3000 { 12923dd1cbfSKim Phillips #address-cells = <1>; 13023dd1cbfSKim Phillips #size-cells = <0>; 13123dd1cbfSKim Phillips cell-index = <0>; 13223dd1cbfSKim Phillips compatible = "fsl-i2c"; 13323dd1cbfSKim Phillips reg = <0x3000 0x100>; 134cda13dd1SPaul Gortmaker interrupts = <14 0x8>; 13523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 13623dd1cbfSKim Phillips dfsrr; 137f7a0be45SReynes Philippe 138f7a0be45SReynes Philippe at24@50 { 139f7a0be45SReynes Philippe compatible = "at24,24c256"; 140f7a0be45SReynes Philippe reg = <0x50>; 141f7a0be45SReynes Philippe }; 142f7a0be45SReynes Philippe 14323dd1cbfSKim Phillips rtc@68 { 14423dd1cbfSKim Phillips compatible = "dallas,ds1339"; 14523dd1cbfSKim Phillips reg = <0x68>; 14623dd1cbfSKim Phillips }; 14744274698SAnton Vorontsov 14844274698SAnton Vorontsov mcu_pio: mcu@a { 14944274698SAnton Vorontsov #gpio-cells = <2>; 15044274698SAnton Vorontsov compatible = "fsl,mc9s08qg8-mpc8379erdb", 15144274698SAnton Vorontsov "fsl,mcu-mpc8349emitx"; 15244274698SAnton Vorontsov reg = <0x0a>; 15344274698SAnton Vorontsov gpio-controller; 15444274698SAnton Vorontsov }; 15523dd1cbfSKim Phillips }; 15623dd1cbfSKim Phillips 15723dd1cbfSKim Phillips i2c@3100 { 15823dd1cbfSKim Phillips #address-cells = <1>; 15923dd1cbfSKim Phillips #size-cells = <0>; 16023dd1cbfSKim Phillips cell-index = <1>; 16123dd1cbfSKim Phillips compatible = "fsl-i2c"; 16223dd1cbfSKim Phillips reg = <0x3100 0x100>; 163cda13dd1SPaul Gortmaker interrupts = <15 0x8>; 16423dd1cbfSKim Phillips interrupt-parent = <&ipic>; 16523dd1cbfSKim Phillips dfsrr; 16623dd1cbfSKim Phillips }; 16723dd1cbfSKim Phillips 16823dd1cbfSKim Phillips spi@7000 { 16923dd1cbfSKim Phillips cell-index = <0>; 17023dd1cbfSKim Phillips compatible = "fsl,spi"; 17123dd1cbfSKim Phillips reg = <0x7000 0x1000>; 172cda13dd1SPaul Gortmaker interrupts = <16 0x8>; 17323dd1cbfSKim Phillips interrupt-parent = <&ipic>; 17423dd1cbfSKim Phillips mode = "cpu"; 17523dd1cbfSKim Phillips }; 17623dd1cbfSKim Phillips 177dee80553SKumar Gala dma@82a8 { 178dee80553SKumar Gala #address-cells = <1>; 179dee80553SKumar Gala #size-cells = <1>; 180dee80553SKumar Gala compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; 181dee80553SKumar Gala reg = <0x82a8 4>; 182dee80553SKumar Gala ranges = <0 0x8100 0x1a8>; 183dee80553SKumar Gala interrupt-parent = <&ipic>; 184dee80553SKumar Gala interrupts = <71 8>; 185dee80553SKumar Gala cell-index = <0>; 186dee80553SKumar Gala dma-channel@0 { 187dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 188dee80553SKumar Gala reg = <0 0x80>; 189aeb42762SKumar Gala cell-index = <0>; 190dee80553SKumar Gala interrupt-parent = <&ipic>; 191dee80553SKumar Gala interrupts = <71 8>; 192dee80553SKumar Gala }; 193dee80553SKumar Gala dma-channel@80 { 194dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 195dee80553SKumar Gala reg = <0x80 0x80>; 196aeb42762SKumar Gala cell-index = <1>; 197dee80553SKumar Gala interrupt-parent = <&ipic>; 198dee80553SKumar Gala interrupts = <71 8>; 199dee80553SKumar Gala }; 200dee80553SKumar Gala dma-channel@100 { 201dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 202dee80553SKumar Gala reg = <0x100 0x80>; 203aeb42762SKumar Gala cell-index = <2>; 204dee80553SKumar Gala interrupt-parent = <&ipic>; 205dee80553SKumar Gala interrupts = <71 8>; 206dee80553SKumar Gala }; 207dee80553SKumar Gala dma-channel@180 { 208dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 209dee80553SKumar Gala reg = <0x180 0x28>; 210aeb42762SKumar Gala cell-index = <3>; 211dee80553SKumar Gala interrupt-parent = <&ipic>; 212dee80553SKumar Gala interrupts = <71 8>; 213dee80553SKumar Gala }; 214dee80553SKumar Gala }; 215dee80553SKumar Gala 21623dd1cbfSKim Phillips usb@23000 { 21723dd1cbfSKim Phillips compatible = "fsl-usb2-dr"; 21823dd1cbfSKim Phillips reg = <0x23000 0x1000>; 21923dd1cbfSKim Phillips #address-cells = <1>; 22023dd1cbfSKim Phillips #size-cells = <0>; 22123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 222cda13dd1SPaul Gortmaker interrupts = <38 0x8>; 2238e8ff3a3SAnton Vorontsov phy_type = "ulpi"; 22423dd1cbfSKim Phillips }; 22523dd1cbfSKim Phillips 22623dd1cbfSKim Phillips mdio@24520 { 22723dd1cbfSKim Phillips #address-cells = <1>; 22823dd1cbfSKim Phillips #size-cells = <0>; 22923dd1cbfSKim Phillips compatible = "fsl,gianfar-mdio"; 23023dd1cbfSKim Phillips reg = <0x24520 0x20>; 23123dd1cbfSKim Phillips phy2: ethernet-phy@2 { 23223dd1cbfSKim Phillips interrupt-parent = <&ipic>; 233cda13dd1SPaul Gortmaker interrupts = <17 0x8>; 234cda13dd1SPaul Gortmaker reg = <0x2>; 23523dd1cbfSKim Phillips device_type = "ethernet-phy"; 23623dd1cbfSKim Phillips }; 237b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 238b31a1d8bSAndy Fleming reg = <0x11>; 239b31a1d8bSAndy Fleming device_type = "tbi-phy"; 240b31a1d8bSAndy Fleming }; 241b31a1d8bSAndy Fleming }; 242b31a1d8bSAndy Fleming 243b31a1d8bSAndy Fleming mdio@25520 { 244b31a1d8bSAndy Fleming #address-cells = <1>; 245b31a1d8bSAndy Fleming #size-cells = <0>; 246b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 247b31a1d8bSAndy Fleming reg = <0x25520 0x20>; 248b31a1d8bSAndy Fleming 249b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 250b31a1d8bSAndy Fleming reg = <0x11>; 251b31a1d8bSAndy Fleming device_type = "tbi-phy"; 252b31a1d8bSAndy Fleming }; 25323dd1cbfSKim Phillips }; 25423dd1cbfSKim Phillips 25523dd1cbfSKim Phillips enet0: ethernet@24000 { 25623dd1cbfSKim Phillips cell-index = <0>; 25723dd1cbfSKim Phillips device_type = "network"; 25823dd1cbfSKim Phillips model = "eTSEC"; 25923dd1cbfSKim Phillips compatible = "gianfar"; 26023dd1cbfSKim Phillips reg = <0x24000 0x1000>; 26123dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 262cda13dd1SPaul Gortmaker interrupts = <32 0x8 33 0x8 34 0x8>; 26323dd1cbfSKim Phillips phy-connection-type = "mii"; 26423dd1cbfSKim Phillips interrupt-parent = <&ipic>; 265b31a1d8bSAndy Fleming tbi-handle = <&tbi0>; 26623dd1cbfSKim Phillips phy-handle = <&phy2>; 26723dd1cbfSKim Phillips }; 26823dd1cbfSKim Phillips 26923dd1cbfSKim Phillips enet1: ethernet@25000 { 27023dd1cbfSKim Phillips cell-index = <1>; 27123dd1cbfSKim Phillips device_type = "network"; 27223dd1cbfSKim Phillips model = "eTSEC"; 27323dd1cbfSKim Phillips compatible = "gianfar"; 27423dd1cbfSKim Phillips reg = <0x25000 0x1000>; 27523dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 276cda13dd1SPaul Gortmaker interrupts = <35 0x8 36 0x8 37 0x8>; 27723dd1cbfSKim Phillips phy-connection-type = "mii"; 27823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 279f17c6323SAnton Vorontsov fixed-link = <1 1 1000 0 0>; 280b31a1d8bSAndy Fleming tbi-handle = <&tbi1>; 28123dd1cbfSKim Phillips }; 28223dd1cbfSKim Phillips 28323dd1cbfSKim Phillips serial0: serial@4500 { 28423dd1cbfSKim Phillips cell-index = <0>; 28523dd1cbfSKim Phillips device_type = "serial"; 28623dd1cbfSKim Phillips compatible = "ns16550"; 28723dd1cbfSKim Phillips reg = <0x4500 0x100>; 28823dd1cbfSKim Phillips clock-frequency = <0>; 289cda13dd1SPaul Gortmaker interrupts = <9 0x8>; 29023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 29123dd1cbfSKim Phillips }; 29223dd1cbfSKim Phillips 29323dd1cbfSKim Phillips serial1: serial@4600 { 29423dd1cbfSKim Phillips cell-index = <1>; 29523dd1cbfSKim Phillips device_type = "serial"; 29623dd1cbfSKim Phillips compatible = "ns16550"; 29723dd1cbfSKim Phillips reg = <0x4600 0x100>; 29823dd1cbfSKim Phillips clock-frequency = <0>; 299cda13dd1SPaul Gortmaker interrupts = <10 0x8>; 30023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 30123dd1cbfSKim Phillips }; 30223dd1cbfSKim Phillips 30323dd1cbfSKim Phillips crypto@30000 { 3043fd44736SKim Phillips compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", 3053fd44736SKim Phillips "fsl,sec2.1", "fsl,sec2.0"; 30623dd1cbfSKim Phillips reg = <0x30000 0x10000>; 307cda13dd1SPaul Gortmaker interrupts = <11 0x8>; 30823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 3093fd44736SKim Phillips fsl,num-channels = <4>; 3103fd44736SKim Phillips fsl,channel-fifo-len = <24>; 3113fd44736SKim Phillips fsl,exec-units-mask = <0x9fe>; 3123fd44736SKim Phillips fsl,descriptor-types-mask = <0x3ab0ebf>; 31323dd1cbfSKim Phillips }; 31423dd1cbfSKim Phillips 31523dd1cbfSKim Phillips sata@18000 { 31623dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 31723dd1cbfSKim Phillips reg = <0x18000 0x1000>; 318cda13dd1SPaul Gortmaker interrupts = <44 0x8>; 31923dd1cbfSKim Phillips interrupt-parent = <&ipic>; 32023dd1cbfSKim Phillips }; 32123dd1cbfSKim Phillips 32223dd1cbfSKim Phillips sata@19000 { 32323dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 32423dd1cbfSKim Phillips reg = <0x19000 0x1000>; 325cda13dd1SPaul Gortmaker interrupts = <45 0x8>; 32623dd1cbfSKim Phillips interrupt-parent = <&ipic>; 32723dd1cbfSKim Phillips }; 32823dd1cbfSKim Phillips 32923dd1cbfSKim Phillips sata@1a000 { 33023dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 33123dd1cbfSKim Phillips reg = <0x1a000 0x1000>; 332cda13dd1SPaul Gortmaker interrupts = <46 0x8>; 33323dd1cbfSKim Phillips interrupt-parent = <&ipic>; 33423dd1cbfSKim Phillips }; 33523dd1cbfSKim Phillips 33623dd1cbfSKim Phillips sata@1b000 { 33723dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 33823dd1cbfSKim Phillips reg = <0x1b000 0x1000>; 339cda13dd1SPaul Gortmaker interrupts = <47 0x8>; 34023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 34123dd1cbfSKim Phillips }; 34223dd1cbfSKim Phillips 34323dd1cbfSKim Phillips /* IPIC 34423dd1cbfSKim Phillips * interrupts cell = <intr #, sense> 34523dd1cbfSKim Phillips * sense values match linux IORESOURCE_IRQ_* defines: 34623dd1cbfSKim Phillips * sense == 8: Level, low assertion 34723dd1cbfSKim Phillips * sense == 2: Edge, high-to-low change 34823dd1cbfSKim Phillips */ 34923dd1cbfSKim Phillips ipic: interrupt-controller@700 { 35023dd1cbfSKim Phillips compatible = "fsl,ipic"; 35123dd1cbfSKim Phillips interrupt-controller; 35223dd1cbfSKim Phillips #address-cells = <0>; 35323dd1cbfSKim Phillips #interrupt-cells = <2>; 35423dd1cbfSKim Phillips reg = <0x700 0x100>; 35523dd1cbfSKim Phillips }; 35623dd1cbfSKim Phillips }; 35723dd1cbfSKim Phillips 35823dd1cbfSKim Phillips pci0: pci@e0008500 { 35923dd1cbfSKim Phillips interrupt-map-mask = <0xf800 0 0 7>; 36023dd1cbfSKim Phillips interrupt-map = < 36123dd1cbfSKim Phillips /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ 36223dd1cbfSKim Phillips 36323dd1cbfSKim Phillips /* IDSEL AD14 IRQ6 inta */ 364cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x1 &ipic 22 0x8 36523dd1cbfSKim Phillips 36623dd1cbfSKim Phillips /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ 367cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x1 &ipic 21 0x8 368cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x2 &ipic 22 0x8 369cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x4 &ipic 23 0x8 37023dd1cbfSKim Phillips 37123dd1cbfSKim Phillips /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ 372cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x1 &ipic 23 0x8 373cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x2 &ipic 21 0x8 374cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; 37523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 376cda13dd1SPaul Gortmaker interrupts = <66 0x8>; 377cda13dd1SPaul Gortmaker bus-range = <0x0 0x0>; 378cda13dd1SPaul Gortmaker ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 379cda13dd1SPaul Gortmaker 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 380cda13dd1SPaul Gortmaker 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 38123dd1cbfSKim Phillips clock-frequency = <66666666>; 38223dd1cbfSKim Phillips #interrupt-cells = <1>; 38323dd1cbfSKim Phillips #size-cells = <2>; 38423dd1cbfSKim Phillips #address-cells = <3>; 3855b70a097SJohn Rigby reg = <0xe0008500 0x100 /* internal registers */ 3865b70a097SJohn Rigby 0xe0008300 0x8>; /* config space access registers */ 38723dd1cbfSKim Phillips compatible = "fsl,mpc8349-pci"; 38823dd1cbfSKim Phillips device_type = "pci"; 38923dd1cbfSKim Phillips }; 39023dd1cbfSKim Phillips}; 391