12874c5fdSThomas Gleixner// SPDX-License-Identifier: GPL-2.0-or-later 223dd1cbfSKim Phillips/* 323dd1cbfSKim Phillips * MPC8379E RDB Device Tree Source 423dd1cbfSKim Phillips * 523dd1cbfSKim Phillips * Copyright 2007, 2008 Freescale Semiconductor Inc. 623dd1cbfSKim Phillips */ 723dd1cbfSKim Phillips 823dd1cbfSKim Phillips/dts-v1/; 923dd1cbfSKim Phillips 1023dd1cbfSKim Phillips/ { 113b29dadeSKim Phillips compatible = "fsl,mpc8379rdb"; 1223dd1cbfSKim Phillips #address-cells = <1>; 1323dd1cbfSKim Phillips #size-cells = <1>; 1423dd1cbfSKim Phillips 1523dd1cbfSKim Phillips aliases { 1623dd1cbfSKim Phillips ethernet0 = &enet0; 1723dd1cbfSKim Phillips ethernet1 = &enet1; 1823dd1cbfSKim Phillips serial0 = &serial0; 1923dd1cbfSKim Phillips serial1 = &serial1; 2023dd1cbfSKim Phillips pci0 = &pci0; 2123dd1cbfSKim Phillips }; 2223dd1cbfSKim Phillips 2323dd1cbfSKim Phillips cpus { 2423dd1cbfSKim Phillips #address-cells = <1>; 2523dd1cbfSKim Phillips #size-cells = <0>; 2623dd1cbfSKim Phillips 2723dd1cbfSKim Phillips PowerPC,8379@0 { 2823dd1cbfSKim Phillips device_type = "cpu"; 29cda13dd1SPaul Gortmaker reg = <0x0>; 3023dd1cbfSKim Phillips d-cache-line-size = <32>; 3123dd1cbfSKim Phillips i-cache-line-size = <32>; 3223dd1cbfSKim Phillips d-cache-size = <32768>; 3323dd1cbfSKim Phillips i-cache-size = <32768>; 3423dd1cbfSKim Phillips timebase-frequency = <0>; 3523dd1cbfSKim Phillips bus-frequency = <0>; 3623dd1cbfSKim Phillips clock-frequency = <0>; 3723dd1cbfSKim Phillips }; 3823dd1cbfSKim Phillips }; 3923dd1cbfSKim Phillips 4023dd1cbfSKim Phillips memory { 4123dd1cbfSKim Phillips device_type = "memory"; 4223dd1cbfSKim Phillips reg = <0x00000000 0x10000000>; // 256MB at 0 4323dd1cbfSKim Phillips }; 4423dd1cbfSKim Phillips 4523dd1cbfSKim Phillips localbus@e0005000 { 4623dd1cbfSKim Phillips #address-cells = <2>; 4723dd1cbfSKim Phillips #size-cells = <1>; 4823dd1cbfSKim Phillips compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus"; 4923dd1cbfSKim Phillips reg = <0xe0005000 0x1000>; 50cda13dd1SPaul Gortmaker interrupts = <77 0x8>; 5123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 5223dd1cbfSKim Phillips 5323dd1cbfSKim Phillips // CS0 and CS1 are swapped when 5423dd1cbfSKim Phillips // booting from nand, but the 5523dd1cbfSKim Phillips // addresses are the same. 56cda13dd1SPaul Gortmaker ranges = <0x0 0x0 0xfe000000 0x00800000 57cda13dd1SPaul Gortmaker 0x1 0x0 0xe0600000 0x00008000 58cda13dd1SPaul Gortmaker 0x2 0x0 0xf0000000 0x00020000 59cda13dd1SPaul Gortmaker 0x3 0x0 0xfa000000 0x00008000>; 6023dd1cbfSKim Phillips 6123dd1cbfSKim Phillips flash@0,0 { 6223dd1cbfSKim Phillips #address-cells = <1>; 6323dd1cbfSKim Phillips #size-cells = <1>; 6423dd1cbfSKim Phillips compatible = "cfi-flash"; 65cda13dd1SPaul Gortmaker reg = <0x0 0x0 0x800000>; 6623dd1cbfSKim Phillips bank-width = <2>; 6723dd1cbfSKim Phillips device-width = <1>; 6823dd1cbfSKim Phillips }; 6923dd1cbfSKim Phillips 7023dd1cbfSKim Phillips nand@1,0 { 7123dd1cbfSKim Phillips #address-cells = <1>; 7223dd1cbfSKim Phillips #size-cells = <1>; 7323dd1cbfSKim Phillips compatible = "fsl,mpc8379-fcm-nand", 7423dd1cbfSKim Phillips "fsl,elbc-fcm-nand"; 75cda13dd1SPaul Gortmaker reg = <0x1 0x0 0x8000>; 7623dd1cbfSKim Phillips 7723dd1cbfSKim Phillips u-boot@0 { 7823dd1cbfSKim Phillips reg = <0x0 0x100000>; 7923dd1cbfSKim Phillips read-only; 8023dd1cbfSKim Phillips }; 8123dd1cbfSKim Phillips 8223dd1cbfSKim Phillips kernel@100000 { 8323dd1cbfSKim Phillips reg = <0x100000 0x300000>; 8423dd1cbfSKim Phillips }; 8523dd1cbfSKim Phillips fs@400000 { 8623dd1cbfSKim Phillips reg = <0x400000 0x1c00000>; 8723dd1cbfSKim Phillips }; 8823dd1cbfSKim Phillips }; 8923dd1cbfSKim Phillips }; 9023dd1cbfSKim Phillips 9123dd1cbfSKim Phillips immr@e0000000 { 9223dd1cbfSKim Phillips #address-cells = <1>; 9323dd1cbfSKim Phillips #size-cells = <1>; 9423dd1cbfSKim Phillips device_type = "soc"; 9523dd1cbfSKim Phillips compatible = "simple-bus"; 96cda13dd1SPaul Gortmaker ranges = <0x0 0xe0000000 0x00100000>; 9723dd1cbfSKim Phillips reg = <0xe0000000 0x00000200>; 9823dd1cbfSKim Phillips bus-frequency = <0>; 9923dd1cbfSKim Phillips 10023dd1cbfSKim Phillips wdt@200 { 10123dd1cbfSKim Phillips device_type = "watchdog"; 10223dd1cbfSKim Phillips compatible = "mpc83xx_wdt"; 10323dd1cbfSKim Phillips reg = <0x200 0x100>; 10423dd1cbfSKim Phillips }; 10523dd1cbfSKim Phillips 1069e7d95c1SReynes Philippe gpio1: gpio-controller@c00 { 1079e7d95c1SReynes Philippe #gpio-cells = <2>; 1089e7d95c1SReynes Philippe compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; 1099e7d95c1SReynes Philippe reg = <0xc00 0x100>; 1109e7d95c1SReynes Philippe interrupts = <74 0x8>; 1119e7d95c1SReynes Philippe interrupt-parent = <&ipic>; 1129e7d95c1SReynes Philippe gpio-controller; 1139e7d95c1SReynes Philippe }; 1149e7d95c1SReynes Philippe 1159e7d95c1SReynes Philippe gpio2: gpio-controller@d00 { 1169e7d95c1SReynes Philippe #gpio-cells = <2>; 1179e7d95c1SReynes Philippe compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; 1189e7d95c1SReynes Philippe reg = <0xd00 0x100>; 1199e7d95c1SReynes Philippe interrupts = <75 0x8>; 1209e7d95c1SReynes Philippe interrupt-parent = <&ipic>; 1219e7d95c1SReynes Philippe gpio-controller; 1229e7d95c1SReynes Philippe }; 1239e7d95c1SReynes Philippe 124125a00d7SAnton Vorontsov sleep-nexus { 125125a00d7SAnton Vorontsov #address-cells = <1>; 126125a00d7SAnton Vorontsov #size-cells = <1>; 127125a00d7SAnton Vorontsov compatible = "simple-bus"; 128125a00d7SAnton Vorontsov sleep = <&pmc 0x0c000000>; 129125a00d7SAnton Vorontsov ranges; 130125a00d7SAnton Vorontsov 13123dd1cbfSKim Phillips i2c@3000 { 13223dd1cbfSKim Phillips #address-cells = <1>; 13323dd1cbfSKim Phillips #size-cells = <0>; 13423dd1cbfSKim Phillips cell-index = <0>; 13523dd1cbfSKim Phillips compatible = "fsl-i2c"; 13623dd1cbfSKim Phillips reg = <0x3000 0x100>; 137cda13dd1SPaul Gortmaker interrupts = <14 0x8>; 13823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 13923dd1cbfSKim Phillips dfsrr; 140f7a0be45SReynes Philippe 141960d82aaSReynes Philippe dtt@48 { 142960d82aaSReynes Philippe compatible = "national,lm75"; 143960d82aaSReynes Philippe reg = <0x48>; 144960d82aaSReynes Philippe }; 145960d82aaSReynes Philippe 146f7a0be45SReynes Philippe at24@50 { 1478d0590ceSJavier Martinez Canillas compatible = "atmel,24c256"; 148f7a0be45SReynes Philippe reg = <0x50>; 149f7a0be45SReynes Philippe }; 150f7a0be45SReynes Philippe 15123dd1cbfSKim Phillips rtc@68 { 15223dd1cbfSKim Phillips compatible = "dallas,ds1339"; 15323dd1cbfSKim Phillips reg = <0x68>; 15423dd1cbfSKim Phillips }; 15544274698SAnton Vorontsov 15644274698SAnton Vorontsov mcu_pio: mcu@a { 15744274698SAnton Vorontsov #gpio-cells = <2>; 15844274698SAnton Vorontsov compatible = "fsl,mc9s08qg8-mpc8379erdb", 15944274698SAnton Vorontsov "fsl,mcu-mpc8349emitx"; 16044274698SAnton Vorontsov reg = <0x0a>; 16144274698SAnton Vorontsov gpio-controller; 16244274698SAnton Vorontsov }; 16323dd1cbfSKim Phillips }; 16423dd1cbfSKim Phillips 165125a00d7SAnton Vorontsov sdhci@2e000 { 1661a2eceaaSAnton Vorontsov compatible = "fsl,mpc8379-esdhc", "fsl,esdhc"; 167125a00d7SAnton Vorontsov reg = <0x2e000 0x1000>; 168125a00d7SAnton Vorontsov interrupts = <42 0x8>; 169125a00d7SAnton Vorontsov interrupt-parent = <&ipic>; 17050dfe70fSAnton Vorontsov sdhci,wp-inverted; 171125a00d7SAnton Vorontsov /* Filled in by U-Boot */ 17289f37296SAnton Vorontsov clock-frequency = <111111111>; 173125a00d7SAnton Vorontsov }; 174125a00d7SAnton Vorontsov }; 175125a00d7SAnton Vorontsov 17623dd1cbfSKim Phillips i2c@3100 { 17723dd1cbfSKim Phillips #address-cells = <1>; 17823dd1cbfSKim Phillips #size-cells = <0>; 17923dd1cbfSKim Phillips cell-index = <1>; 18023dd1cbfSKim Phillips compatible = "fsl-i2c"; 18123dd1cbfSKim Phillips reg = <0x3100 0x100>; 182cda13dd1SPaul Gortmaker interrupts = <15 0x8>; 18323dd1cbfSKim Phillips interrupt-parent = <&ipic>; 18423dd1cbfSKim Phillips dfsrr; 18523dd1cbfSKim Phillips }; 18623dd1cbfSKim Phillips 18723dd1cbfSKim Phillips spi@7000 { 18823dd1cbfSKim Phillips cell-index = <0>; 18923dd1cbfSKim Phillips compatible = "fsl,spi"; 19023dd1cbfSKim Phillips reg = <0x7000 0x1000>; 191cda13dd1SPaul Gortmaker interrupts = <16 0x8>; 19223dd1cbfSKim Phillips interrupt-parent = <&ipic>; 19323dd1cbfSKim Phillips mode = "cpu"; 19423dd1cbfSKim Phillips }; 19523dd1cbfSKim Phillips 196dee80553SKumar Gala dma@82a8 { 197dee80553SKumar Gala #address-cells = <1>; 198dee80553SKumar Gala #size-cells = <1>; 199dee80553SKumar Gala compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; 200dee80553SKumar Gala reg = <0x82a8 4>; 201dee80553SKumar Gala ranges = <0 0x8100 0x1a8>; 202dee80553SKumar Gala interrupt-parent = <&ipic>; 203dee80553SKumar Gala interrupts = <71 8>; 204dee80553SKumar Gala cell-index = <0>; 205dee80553SKumar Gala dma-channel@0 { 206dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 207dee80553SKumar Gala reg = <0 0x80>; 208aeb42762SKumar Gala cell-index = <0>; 209dee80553SKumar Gala interrupt-parent = <&ipic>; 210dee80553SKumar Gala interrupts = <71 8>; 211dee80553SKumar Gala }; 212dee80553SKumar Gala dma-channel@80 { 213dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 214dee80553SKumar Gala reg = <0x80 0x80>; 215aeb42762SKumar Gala cell-index = <1>; 216dee80553SKumar Gala interrupt-parent = <&ipic>; 217dee80553SKumar Gala interrupts = <71 8>; 218dee80553SKumar Gala }; 219dee80553SKumar Gala dma-channel@100 { 220dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 221dee80553SKumar Gala reg = <0x100 0x80>; 222aeb42762SKumar Gala cell-index = <2>; 223dee80553SKumar Gala interrupt-parent = <&ipic>; 224dee80553SKumar Gala interrupts = <71 8>; 225dee80553SKumar Gala }; 226dee80553SKumar Gala dma-channel@180 { 227dee80553SKumar Gala compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 228dee80553SKumar Gala reg = <0x180 0x28>; 229aeb42762SKumar Gala cell-index = <3>; 230dee80553SKumar Gala interrupt-parent = <&ipic>; 231dee80553SKumar Gala interrupts = <71 8>; 232dee80553SKumar Gala }; 233dee80553SKumar Gala }; 234dee80553SKumar Gala 23523dd1cbfSKim Phillips usb@23000 { 23623dd1cbfSKim Phillips compatible = "fsl-usb2-dr"; 23723dd1cbfSKim Phillips reg = <0x23000 0x1000>; 23823dd1cbfSKim Phillips #address-cells = <1>; 23923dd1cbfSKim Phillips #size-cells = <0>; 24023dd1cbfSKim Phillips interrupt-parent = <&ipic>; 241cda13dd1SPaul Gortmaker interrupts = <38 0x8>; 2428e8ff3a3SAnton Vorontsov phy_type = "ulpi"; 243125a00d7SAnton Vorontsov sleep = <&pmc 0x00c00000>; 24423dd1cbfSKim Phillips }; 24523dd1cbfSKim Phillips 24623dd1cbfSKim Phillips enet0: ethernet@24000 { 24770b3adbbSAnton Vorontsov #address-cells = <1>; 24870b3adbbSAnton Vorontsov #size-cells = <1>; 24923dd1cbfSKim Phillips cell-index = <0>; 25023dd1cbfSKim Phillips device_type = "network"; 25123dd1cbfSKim Phillips model = "eTSEC"; 25223dd1cbfSKim Phillips compatible = "gianfar"; 25323dd1cbfSKim Phillips reg = <0x24000 0x1000>; 25470b3adbbSAnton Vorontsov ranges = <0x0 0x24000 0x1000>; 25523dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 256cda13dd1SPaul Gortmaker interrupts = <32 0x8 33 0x8 34 0x8>; 25723dd1cbfSKim Phillips phy-connection-type = "mii"; 25823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 259b31a1d8bSAndy Fleming tbi-handle = <&tbi0>; 26023dd1cbfSKim Phillips phy-handle = <&phy2>; 261125a00d7SAnton Vorontsov sleep = <&pmc 0xc0000000>; 262125a00d7SAnton Vorontsov fsl,magic-packet; 26370b3adbbSAnton Vorontsov 26470b3adbbSAnton Vorontsov mdio@520 { 26570b3adbbSAnton Vorontsov #address-cells = <1>; 26670b3adbbSAnton Vorontsov #size-cells = <0>; 26770b3adbbSAnton Vorontsov compatible = "fsl,gianfar-mdio"; 26870b3adbbSAnton Vorontsov reg = <0x520 0x20>; 26970b3adbbSAnton Vorontsov 27070b3adbbSAnton Vorontsov phy2: ethernet-phy@2 { 27170b3adbbSAnton Vorontsov interrupt-parent = <&ipic>; 27270b3adbbSAnton Vorontsov interrupts = <17 0x8>; 27370b3adbbSAnton Vorontsov reg = <0x2>; 27470b3adbbSAnton Vorontsov }; 27570b3adbbSAnton Vorontsov 27670b3adbbSAnton Vorontsov tbi0: tbi-phy@11 { 27770b3adbbSAnton Vorontsov reg = <0x11>; 27870b3adbbSAnton Vorontsov device_type = "tbi-phy"; 27970b3adbbSAnton Vorontsov }; 28070b3adbbSAnton Vorontsov }; 28123dd1cbfSKim Phillips }; 28223dd1cbfSKim Phillips 28323dd1cbfSKim Phillips enet1: ethernet@25000 { 28470b3adbbSAnton Vorontsov #address-cells = <1>; 28570b3adbbSAnton Vorontsov #size-cells = <1>; 28623dd1cbfSKim Phillips cell-index = <1>; 28723dd1cbfSKim Phillips device_type = "network"; 28823dd1cbfSKim Phillips model = "eTSEC"; 28923dd1cbfSKim Phillips compatible = "gianfar"; 29023dd1cbfSKim Phillips reg = <0x25000 0x1000>; 29170b3adbbSAnton Vorontsov ranges = <0x0 0x25000 0x1000>; 29223dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 293cda13dd1SPaul Gortmaker interrupts = <35 0x8 36 0x8 37 0x8>; 29423dd1cbfSKim Phillips phy-connection-type = "mii"; 29523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 296f17c6323SAnton Vorontsov fixed-link = <1 1 1000 0 0>; 297b31a1d8bSAndy Fleming tbi-handle = <&tbi1>; 298125a00d7SAnton Vorontsov sleep = <&pmc 0x30000000>; 299125a00d7SAnton Vorontsov fsl,magic-packet; 30070b3adbbSAnton Vorontsov 30170b3adbbSAnton Vorontsov mdio@520 { 30270b3adbbSAnton Vorontsov #address-cells = <1>; 30370b3adbbSAnton Vorontsov #size-cells = <0>; 30470b3adbbSAnton Vorontsov compatible = "fsl,gianfar-tbi"; 30570b3adbbSAnton Vorontsov reg = <0x520 0x20>; 30670b3adbbSAnton Vorontsov 30770b3adbbSAnton Vorontsov tbi1: tbi-phy@11 { 30870b3adbbSAnton Vorontsov reg = <0x11>; 30970b3adbbSAnton Vorontsov device_type = "tbi-phy"; 31070b3adbbSAnton Vorontsov }; 31170b3adbbSAnton Vorontsov }; 31223dd1cbfSKim Phillips }; 31323dd1cbfSKim Phillips 31423dd1cbfSKim Phillips serial0: serial@4500 { 31523dd1cbfSKim Phillips cell-index = <0>; 31623dd1cbfSKim Phillips device_type = "serial"; 317f706bed1SKumar Gala compatible = "fsl,ns16550", "ns16550"; 31823dd1cbfSKim Phillips reg = <0x4500 0x100>; 31923dd1cbfSKim Phillips clock-frequency = <0>; 320cda13dd1SPaul Gortmaker interrupts = <9 0x8>; 32123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 32223dd1cbfSKim Phillips }; 32323dd1cbfSKim Phillips 32423dd1cbfSKim Phillips serial1: serial@4600 { 32523dd1cbfSKim Phillips cell-index = <1>; 32623dd1cbfSKim Phillips device_type = "serial"; 327f706bed1SKumar Gala compatible = "fsl,ns16550", "ns16550"; 32823dd1cbfSKim Phillips reg = <0x4600 0x100>; 32923dd1cbfSKim Phillips clock-frequency = <0>; 330cda13dd1SPaul Gortmaker interrupts = <10 0x8>; 33123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 33223dd1cbfSKim Phillips }; 33323dd1cbfSKim Phillips 33423dd1cbfSKim Phillips crypto@30000 { 3353fd44736SKim Phillips compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", 3363fd44736SKim Phillips "fsl,sec2.1", "fsl,sec2.0"; 33723dd1cbfSKim Phillips reg = <0x30000 0x10000>; 338cda13dd1SPaul Gortmaker interrupts = <11 0x8>; 33923dd1cbfSKim Phillips interrupt-parent = <&ipic>; 3403fd44736SKim Phillips fsl,num-channels = <4>; 3413fd44736SKim Phillips fsl,channel-fifo-len = <24>; 3423fd44736SKim Phillips fsl,exec-units-mask = <0x9fe>; 3433fd44736SKim Phillips fsl,descriptor-types-mask = <0x3ab0ebf>; 344125a00d7SAnton Vorontsov sleep = <&pmc 0x03000000>; 345a0e8618cSAnton Vorontsov }; 346a0e8618cSAnton Vorontsov 34723dd1cbfSKim Phillips sata@18000 { 34823dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 34923dd1cbfSKim Phillips reg = <0x18000 0x1000>; 350cda13dd1SPaul Gortmaker interrupts = <44 0x8>; 35123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 352125a00d7SAnton Vorontsov sleep = <&pmc 0x000000c0>; 35323dd1cbfSKim Phillips }; 35423dd1cbfSKim Phillips 35523dd1cbfSKim Phillips sata@19000 { 35623dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 35723dd1cbfSKim Phillips reg = <0x19000 0x1000>; 358cda13dd1SPaul Gortmaker interrupts = <45 0x8>; 35923dd1cbfSKim Phillips interrupt-parent = <&ipic>; 360125a00d7SAnton Vorontsov sleep = <&pmc 0x00000030>; 36123dd1cbfSKim Phillips }; 36223dd1cbfSKim Phillips 36323dd1cbfSKim Phillips sata@1a000 { 36423dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 36523dd1cbfSKim Phillips reg = <0x1a000 0x1000>; 366cda13dd1SPaul Gortmaker interrupts = <46 0x8>; 36723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 368125a00d7SAnton Vorontsov sleep = <&pmc 0x0000000c>; 36923dd1cbfSKim Phillips }; 37023dd1cbfSKim Phillips 37123dd1cbfSKim Phillips sata@1b000 { 37223dd1cbfSKim Phillips compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 37323dd1cbfSKim Phillips reg = <0x1b000 0x1000>; 374cda13dd1SPaul Gortmaker interrupts = <47 0x8>; 37523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 376125a00d7SAnton Vorontsov sleep = <&pmc 0x00000003>; 37723dd1cbfSKim Phillips }; 37823dd1cbfSKim Phillips 37923dd1cbfSKim Phillips /* IPIC 38023dd1cbfSKim Phillips * interrupts cell = <intr #, sense> 38123dd1cbfSKim Phillips * sense values match linux IORESOURCE_IRQ_* defines: 38223dd1cbfSKim Phillips * sense == 8: Level, low assertion 38323dd1cbfSKim Phillips * sense == 2: Edge, high-to-low change 38423dd1cbfSKim Phillips */ 38523dd1cbfSKim Phillips ipic: interrupt-controller@700 { 38623dd1cbfSKim Phillips compatible = "fsl,ipic"; 38723dd1cbfSKim Phillips interrupt-controller; 38823dd1cbfSKim Phillips #address-cells = <0>; 38923dd1cbfSKim Phillips #interrupt-cells = <2>; 39023dd1cbfSKim Phillips reg = <0x700 0x100>; 39123dd1cbfSKim Phillips }; 392125a00d7SAnton Vorontsov 393125a00d7SAnton Vorontsov pmc: power@b00 { 394125a00d7SAnton Vorontsov compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc"; 395125a00d7SAnton Vorontsov reg = <0xb00 0x100 0xa00 0x100>; 396125a00d7SAnton Vorontsov interrupts = <80 0x8>; 397125a00d7SAnton Vorontsov interrupt-parent = <&ipic>; 398125a00d7SAnton Vorontsov }; 39923dd1cbfSKim Phillips }; 40023dd1cbfSKim Phillips 40123dd1cbfSKim Phillips pci0: pci@e0008500 { 40223dd1cbfSKim Phillips interrupt-map-mask = <0xf800 0 0 7>; 40323dd1cbfSKim Phillips interrupt-map = < 40423dd1cbfSKim Phillips /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ 40523dd1cbfSKim Phillips 40623dd1cbfSKim Phillips /* IDSEL AD14 IRQ6 inta */ 407cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x1 &ipic 22 0x8 40823dd1cbfSKim Phillips 40923dd1cbfSKim Phillips /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ 410cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x1 &ipic 21 0x8 411cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x2 &ipic 22 0x8 412cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x4 &ipic 23 0x8 41323dd1cbfSKim Phillips 41423dd1cbfSKim Phillips /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ 415cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x1 &ipic 23 0x8 416cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x2 &ipic 21 0x8 417cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; 41823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 419cda13dd1SPaul Gortmaker interrupts = <66 0x8>; 420cda13dd1SPaul Gortmaker bus-range = <0x0 0x0>; 421cda13dd1SPaul Gortmaker ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 422cda13dd1SPaul Gortmaker 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 4231333c3d6SAnton Vorontsov 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 424125a00d7SAnton Vorontsov sleep = <&pmc 0x00010000>; 42523dd1cbfSKim Phillips clock-frequency = <66666666>; 42623dd1cbfSKim Phillips #interrupt-cells = <1>; 42723dd1cbfSKim Phillips #size-cells = <2>; 42823dd1cbfSKim Phillips #address-cells = <3>; 4295b70a097SJohn Rigby reg = <0xe0008500 0x100 /* internal registers */ 4305b70a097SJohn Rigby 0xe0008300 0x8>; /* config space access registers */ 43123dd1cbfSKim Phillips compatible = "fsl,mpc8349-pci"; 43223dd1cbfSKim Phillips device_type = "pci"; 43323dd1cbfSKim Phillips }; 4346971df4fSAnton Vorontsov 4356971df4fSAnton Vorontsov leds { 4366971df4fSAnton Vorontsov compatible = "gpio-leds"; 4376971df4fSAnton Vorontsov 4386971df4fSAnton Vorontsov pwr { 4396971df4fSAnton Vorontsov gpios = <&mcu_pio 0 0>; 4406971df4fSAnton Vorontsov default-state = "on"; 4416971df4fSAnton Vorontsov }; 4426971df4fSAnton Vorontsov 4436971df4fSAnton Vorontsov hdd { 4446971df4fSAnton Vorontsov gpios = <&mcu_pio 1 0>; 44583e2c70eSStephan Linz linux,default-trigger = "disk-activity"; 4466971df4fSAnton Vorontsov }; 4476971df4fSAnton Vorontsov }; 44823dd1cbfSKim Phillips}; 449