123dd1cbfSKim Phillips/*
223dd1cbfSKim Phillips * MPC8379E RDB Device Tree Source
323dd1cbfSKim Phillips *
423dd1cbfSKim Phillips * Copyright 2007, 2008 Freescale Semiconductor Inc.
523dd1cbfSKim Phillips *
623dd1cbfSKim Phillips * This program is free software; you can redistribute  it and/or modify it
723dd1cbfSKim Phillips * under  the terms of  the GNU General  Public License as published by the
823dd1cbfSKim Phillips * Free Software Foundation;  either version 2 of the  License, or (at your
923dd1cbfSKim Phillips * option) any later version.
1023dd1cbfSKim Phillips */
1123dd1cbfSKim Phillips
1223dd1cbfSKim Phillips/dts-v1/;
1323dd1cbfSKim Phillips
1423dd1cbfSKim Phillips/ {
1523dd1cbfSKim Phillips	compatible = "fsl,mpc8379erdb";
1623dd1cbfSKim Phillips	#address-cells = <1>;
1723dd1cbfSKim Phillips	#size-cells = <1>;
1823dd1cbfSKim Phillips
1923dd1cbfSKim Phillips	aliases {
2023dd1cbfSKim Phillips		ethernet0 = &enet0;
2123dd1cbfSKim Phillips		ethernet1 = &enet1;
2223dd1cbfSKim Phillips		serial0 = &serial0;
2323dd1cbfSKim Phillips		serial1 = &serial1;
2423dd1cbfSKim Phillips		pci0 = &pci0;
2523dd1cbfSKim Phillips	};
2623dd1cbfSKim Phillips
2723dd1cbfSKim Phillips	cpus {
2823dd1cbfSKim Phillips		#address-cells = <1>;
2923dd1cbfSKim Phillips		#size-cells = <0>;
3023dd1cbfSKim Phillips
3123dd1cbfSKim Phillips		PowerPC,8379@0 {
3223dd1cbfSKim Phillips			device_type = "cpu";
3323dd1cbfSKim Phillips			reg = <0>;
3423dd1cbfSKim Phillips			d-cache-line-size = <32>;
3523dd1cbfSKim Phillips			i-cache-line-size = <32>;
3623dd1cbfSKim Phillips			d-cache-size = <32768>;
3723dd1cbfSKim Phillips			i-cache-size = <32768>;
3823dd1cbfSKim Phillips			timebase-frequency = <0>;
3923dd1cbfSKim Phillips			bus-frequency = <0>;
4023dd1cbfSKim Phillips			clock-frequency = <0>;
4123dd1cbfSKim Phillips		};
4223dd1cbfSKim Phillips	};
4323dd1cbfSKim Phillips
4423dd1cbfSKim Phillips	memory {
4523dd1cbfSKim Phillips		device_type = "memory";
4623dd1cbfSKim Phillips		reg = <0x00000000 0x10000000>;	// 256MB at 0
4723dd1cbfSKim Phillips	};
4823dd1cbfSKim Phillips
4923dd1cbfSKim Phillips	localbus@e0005000 {
5023dd1cbfSKim Phillips		#address-cells = <2>;
5123dd1cbfSKim Phillips		#size-cells = <1>;
5223dd1cbfSKim Phillips		compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
5323dd1cbfSKim Phillips		reg = <0xe0005000 0x1000>;
5423dd1cbfSKim Phillips		interrupts = <77 8>;
5523dd1cbfSKim Phillips		interrupt-parent = <&ipic>;
5623dd1cbfSKim Phillips
5723dd1cbfSKim Phillips		// CS0 and CS1 are swapped when
5823dd1cbfSKim Phillips		// booting from nand, but the
5923dd1cbfSKim Phillips		// addresses are the same.
6023dd1cbfSKim Phillips		ranges = <0 0 0xfe000000 0x00800000
6123dd1cbfSKim Phillips		          1 0 0xe0600000 0x00008000
6223dd1cbfSKim Phillips		          2 0 0xf0000000 0x00020000
6323dd1cbfSKim Phillips		          3 0 0xfa000000 0x00008000>;
6423dd1cbfSKim Phillips
6523dd1cbfSKim Phillips		flash@0,0 {
6623dd1cbfSKim Phillips			#address-cells = <1>;
6723dd1cbfSKim Phillips			#size-cells = <1>;
6823dd1cbfSKim Phillips			compatible = "cfi-flash";
6923dd1cbfSKim Phillips			reg = <0 0 0x800000>;
7023dd1cbfSKim Phillips			bank-width = <2>;
7123dd1cbfSKim Phillips			device-width = <1>;
7223dd1cbfSKim Phillips		};
7323dd1cbfSKim Phillips
7423dd1cbfSKim Phillips		nand@1,0 {
7523dd1cbfSKim Phillips			#address-cells = <1>;
7623dd1cbfSKim Phillips			#size-cells = <1>;
7723dd1cbfSKim Phillips			compatible = "fsl,mpc8379-fcm-nand",
7823dd1cbfSKim Phillips			             "fsl,elbc-fcm-nand";
7923dd1cbfSKim Phillips			reg = <1 0 0x8000>;
8023dd1cbfSKim Phillips
8123dd1cbfSKim Phillips			u-boot@0 {
8223dd1cbfSKim Phillips				reg = <0x0 0x100000>;
8323dd1cbfSKim Phillips				read-only;
8423dd1cbfSKim Phillips			};
8523dd1cbfSKim Phillips
8623dd1cbfSKim Phillips			kernel@100000 {
8723dd1cbfSKim Phillips				reg = <0x100000 0x300000>;
8823dd1cbfSKim Phillips			};
8923dd1cbfSKim Phillips			fs@400000 {
9023dd1cbfSKim Phillips				reg = <0x400000 0x1c00000>;
9123dd1cbfSKim Phillips			};
9223dd1cbfSKim Phillips		};
9323dd1cbfSKim Phillips	};
9423dd1cbfSKim Phillips
9523dd1cbfSKim Phillips	immr@e0000000 {
9623dd1cbfSKim Phillips		#address-cells = <1>;
9723dd1cbfSKim Phillips		#size-cells = <1>;
9823dd1cbfSKim Phillips		device_type = "soc";
9923dd1cbfSKim Phillips		compatible = "simple-bus";
10023dd1cbfSKim Phillips		ranges = <0 0xe0000000 0x00100000>;
10123dd1cbfSKim Phillips		reg = <0xe0000000 0x00000200>;
10223dd1cbfSKim Phillips		bus-frequency = <0>;
10323dd1cbfSKim Phillips
10423dd1cbfSKim Phillips		wdt@200 {
10523dd1cbfSKim Phillips			device_type = "watchdog";
10623dd1cbfSKim Phillips			compatible = "mpc83xx_wdt";
10723dd1cbfSKim Phillips			reg = <0x200 0x100>;
10823dd1cbfSKim Phillips		};
10923dd1cbfSKim Phillips
11023dd1cbfSKim Phillips		i2c@3000 {
11123dd1cbfSKim Phillips			#address-cells = <1>;
11223dd1cbfSKim Phillips			#size-cells = <0>;
11323dd1cbfSKim Phillips			cell-index = <0>;
11423dd1cbfSKim Phillips			compatible = "fsl-i2c";
11523dd1cbfSKim Phillips			reg = <0x3000 0x100>;
11623dd1cbfSKim Phillips			interrupts = <14 8>;
11723dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
11823dd1cbfSKim Phillips			dfsrr;
11923dd1cbfSKim Phillips			rtc@68 {
12023dd1cbfSKim Phillips				device_type = "rtc";
12123dd1cbfSKim Phillips				compatible = "dallas,ds1339";
12223dd1cbfSKim Phillips				reg = <0x68>;
12323dd1cbfSKim Phillips			};
12423dd1cbfSKim Phillips		};
12523dd1cbfSKim Phillips
12623dd1cbfSKim Phillips		i2c@3100 {
12723dd1cbfSKim Phillips			#address-cells = <1>;
12823dd1cbfSKim Phillips			#size-cells = <0>;
12923dd1cbfSKim Phillips			cell-index = <1>;
13023dd1cbfSKim Phillips			compatible = "fsl-i2c";
13123dd1cbfSKim Phillips			reg = <0x3100 0x100>;
13223dd1cbfSKim Phillips			interrupts = <15 8>;
13323dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
13423dd1cbfSKim Phillips			dfsrr;
13523dd1cbfSKim Phillips		};
13623dd1cbfSKim Phillips
13723dd1cbfSKim Phillips		spi@7000 {
13823dd1cbfSKim Phillips			cell-index = <0>;
13923dd1cbfSKim Phillips			compatible = "fsl,spi";
14023dd1cbfSKim Phillips			reg = <0x7000 0x1000>;
14123dd1cbfSKim Phillips			interrupts = <16 8>;
14223dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
14323dd1cbfSKim Phillips			mode = "cpu";
14423dd1cbfSKim Phillips		};
14523dd1cbfSKim Phillips
14623dd1cbfSKim Phillips		/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
14723dd1cbfSKim Phillips		usb@23000 {
14823dd1cbfSKim Phillips			compatible = "fsl-usb2-dr";
14923dd1cbfSKim Phillips			reg = <0x23000 0x1000>;
15023dd1cbfSKim Phillips			#address-cells = <1>;
15123dd1cbfSKim Phillips			#size-cells = <0>;
15223dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
15323dd1cbfSKim Phillips			interrupts = <38 8>;
15423dd1cbfSKim Phillips			phy_type = "utmi";
15523dd1cbfSKim Phillips		};
15623dd1cbfSKim Phillips
15723dd1cbfSKim Phillips		mdio@24520 {
15823dd1cbfSKim Phillips			#address-cells = <1>;
15923dd1cbfSKim Phillips			#size-cells = <0>;
16023dd1cbfSKim Phillips			compatible = "fsl,gianfar-mdio";
16123dd1cbfSKim Phillips			reg = <0x24520 0x20>;
16223dd1cbfSKim Phillips			phy2: ethernet-phy@2 {
16323dd1cbfSKim Phillips				interrupt-parent = < &ipic >;
16423dd1cbfSKim Phillips				interrupts = <17 8>;
16523dd1cbfSKim Phillips				reg = <2>;
16623dd1cbfSKim Phillips				device_type = "ethernet-phy";
16723dd1cbfSKim Phillips			};
16823dd1cbfSKim Phillips			phy3: ethernet-phy@3 {
16923dd1cbfSKim Phillips				interrupt-parent = < &ipic >;
17023dd1cbfSKim Phillips				interrupts = <18 8>;
17123dd1cbfSKim Phillips				reg = <3>;
17223dd1cbfSKim Phillips				device_type = "ethernet-phy";
17323dd1cbfSKim Phillips			};
17423dd1cbfSKim Phillips		};
17523dd1cbfSKim Phillips
17623dd1cbfSKim Phillips		enet0: ethernet@24000 {
17723dd1cbfSKim Phillips			cell-index = <0>;
17823dd1cbfSKim Phillips			device_type = "network";
17923dd1cbfSKim Phillips			model = "eTSEC";
18023dd1cbfSKim Phillips			compatible = "gianfar";
18123dd1cbfSKim Phillips			reg = <0x24000 0x1000>;
18223dd1cbfSKim Phillips			local-mac-address = [ 00 00 00 00 00 00 ];
18323dd1cbfSKim Phillips			interrupts = <32 8 33 8 34 8>;
18423dd1cbfSKim Phillips			phy-connection-type = "mii";
18523dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
18623dd1cbfSKim Phillips			phy-handle = < &phy2 >;
18723dd1cbfSKim Phillips		};
18823dd1cbfSKim Phillips
18923dd1cbfSKim Phillips		enet1: ethernet@25000 {
19023dd1cbfSKim Phillips			cell-index = <1>;
19123dd1cbfSKim Phillips			device_type = "network";
19223dd1cbfSKim Phillips			model = "eTSEC";
19323dd1cbfSKim Phillips			compatible = "gianfar";
19423dd1cbfSKim Phillips			reg = <0x25000 0x1000>;
19523dd1cbfSKim Phillips			local-mac-address = [ 00 00 00 00 00 00 ];
19623dd1cbfSKim Phillips			interrupts = <35 8 36 8 37 8>;
19723dd1cbfSKim Phillips			phy-connection-type = "mii";
19823dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
19923dd1cbfSKim Phillips			phy-handle = < &phy3 >;
20023dd1cbfSKim Phillips		};
20123dd1cbfSKim Phillips
20223dd1cbfSKim Phillips		serial0: serial@4500 {
20323dd1cbfSKim Phillips			cell-index = <0>;
20423dd1cbfSKim Phillips			device_type = "serial";
20523dd1cbfSKim Phillips			compatible = "ns16550";
20623dd1cbfSKim Phillips			reg = <0x4500 0x100>;
20723dd1cbfSKim Phillips			clock-frequency = <0>;
20823dd1cbfSKim Phillips			interrupts = <9 8>;
20923dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
21023dd1cbfSKim Phillips		};
21123dd1cbfSKim Phillips
21223dd1cbfSKim Phillips		serial1: serial@4600 {
21323dd1cbfSKim Phillips			cell-index = <1>;
21423dd1cbfSKim Phillips			device_type = "serial";
21523dd1cbfSKim Phillips			compatible = "ns16550";
21623dd1cbfSKim Phillips			reg = <0x4600 0x100>;
21723dd1cbfSKim Phillips			clock-frequency = <0>;
21823dd1cbfSKim Phillips			interrupts = <10 8>;
21923dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
22023dd1cbfSKim Phillips		};
22123dd1cbfSKim Phillips
22223dd1cbfSKim Phillips		crypto@30000 {
22323dd1cbfSKim Phillips			model = "SEC3";
22423dd1cbfSKim Phillips			device_type = "crypto";
22523dd1cbfSKim Phillips			compatible = "talitos";
22623dd1cbfSKim Phillips			reg = <0x30000 0x10000>;
22723dd1cbfSKim Phillips			interrupts = <11 8>;
22823dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
22923dd1cbfSKim Phillips			/* Rev. 3.0 geometry */
23023dd1cbfSKim Phillips			num-channels = <4>;
23123dd1cbfSKim Phillips			channel-fifo-len = <24>;
23223dd1cbfSKim Phillips			exec-units-mask = <0x000001fe>;
23323dd1cbfSKim Phillips			descriptor-types-mask = <0x03ab0ebf>;
23423dd1cbfSKim Phillips		};
23523dd1cbfSKim Phillips
23623dd1cbfSKim Phillips		sata@18000 {
23723dd1cbfSKim Phillips			compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
23823dd1cbfSKim Phillips			reg = <0x18000 0x1000>;
23923dd1cbfSKim Phillips			interrupts = <44 8>;
24023dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
24123dd1cbfSKim Phillips		};
24223dd1cbfSKim Phillips
24323dd1cbfSKim Phillips		sata@19000 {
24423dd1cbfSKim Phillips			compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
24523dd1cbfSKim Phillips			reg = <0x19000 0x1000>;
24623dd1cbfSKim Phillips			interrupts = <45 8>;
24723dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
24823dd1cbfSKim Phillips		};
24923dd1cbfSKim Phillips
25023dd1cbfSKim Phillips		sata@1a000 {
25123dd1cbfSKim Phillips			compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
25223dd1cbfSKim Phillips			reg = <0x1a000 0x1000>;
25323dd1cbfSKim Phillips			interrupts = <46 8>;
25423dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
25523dd1cbfSKim Phillips		};
25623dd1cbfSKim Phillips
25723dd1cbfSKim Phillips		sata@1b000 {
25823dd1cbfSKim Phillips			compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
25923dd1cbfSKim Phillips			reg = <0x1b000 0x1000>;
26023dd1cbfSKim Phillips			interrupts = <47 8>;
26123dd1cbfSKim Phillips			interrupt-parent = < &ipic >;
26223dd1cbfSKim Phillips		};
26323dd1cbfSKim Phillips
26423dd1cbfSKim Phillips		/* IPIC
26523dd1cbfSKim Phillips		 * interrupts cell = <intr #, sense>
26623dd1cbfSKim Phillips		 * sense values match linux IORESOURCE_IRQ_* defines:
26723dd1cbfSKim Phillips		 * sense == 8: Level, low assertion
26823dd1cbfSKim Phillips		 * sense == 2: Edge, high-to-low change
26923dd1cbfSKim Phillips		 */
27023dd1cbfSKim Phillips		ipic: interrupt-controller@700 {
27123dd1cbfSKim Phillips			compatible = "fsl,ipic";
27223dd1cbfSKim Phillips			interrupt-controller;
27323dd1cbfSKim Phillips			#address-cells = <0>;
27423dd1cbfSKim Phillips			#interrupt-cells = <2>;
27523dd1cbfSKim Phillips			reg = <0x700 0x100>;
27623dd1cbfSKim Phillips		};
27723dd1cbfSKim Phillips	};
27823dd1cbfSKim Phillips
27923dd1cbfSKim Phillips	pci0: pci@e0008500 {
28023dd1cbfSKim Phillips		interrupt-map-mask = <0xf800 0 0 7>;
28123dd1cbfSKim Phillips		interrupt-map = <
28223dd1cbfSKim Phillips				/* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
28323dd1cbfSKim Phillips
28423dd1cbfSKim Phillips				/* IDSEL AD14 IRQ6 inta */
28523dd1cbfSKim Phillips				 0x7000 0 0 1 &ipic 22 8
28623dd1cbfSKim Phillips
28723dd1cbfSKim Phillips				/* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
28823dd1cbfSKim Phillips				 0x7800 0 0 1 &ipic 21 8
28923dd1cbfSKim Phillips				 0x7800 0 0 2 &ipic 22 8
29023dd1cbfSKim Phillips				 0x7800 0 0 4 &ipic 23 8
29123dd1cbfSKim Phillips
29223dd1cbfSKim Phillips				/* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
29323dd1cbfSKim Phillips				 0xE000 0 0 1 &ipic 23 8
29423dd1cbfSKim Phillips				 0xE000 0 0 2 &ipic 21 8
29523dd1cbfSKim Phillips				 0xE000 0 0 3 &ipic 22 8>;
29623dd1cbfSKim Phillips		interrupt-parent = < &ipic >;
29723dd1cbfSKim Phillips		interrupts = <66 8>;
29823dd1cbfSKim Phillips		bus-range = <0 0>;
29923dd1cbfSKim Phillips		ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
30023dd1cbfSKim Phillips		          0x42000000 0 0x80000000 0x80000000 0 0x10000000
30123dd1cbfSKim Phillips		          0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
30223dd1cbfSKim Phillips		clock-frequency = <66666666>;
30323dd1cbfSKim Phillips		#interrupt-cells = <1>;
30423dd1cbfSKim Phillips		#size-cells = <2>;
30523dd1cbfSKim Phillips		#address-cells = <3>;
30623dd1cbfSKim Phillips		reg = <0xe0008500 0x100>;
30723dd1cbfSKim Phillips		compatible = "fsl,mpc8349-pci";
30823dd1cbfSKim Phillips		device_type = "pci";
30923dd1cbfSKim Phillips	};
31023dd1cbfSKim Phillips};
311