1/* 2 * MPC8378E RDB Device Tree Source 3 * 4 * Copyright 2007, 2008 Freescale Semiconductor Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12/dts-v1/; 13 14/ { 15 compatible = "fsl,mpc8378rdb"; 16 #address-cells = <1>; 17 #size-cells = <1>; 18 19 aliases { 20 ethernet0 = &enet0; 21 ethernet1 = &enet1; 22 serial0 = &serial0; 23 serial1 = &serial1; 24 pci0 = &pci0; 25 }; 26 27 cpus { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 31 PowerPC,8378@0 { 32 device_type = "cpu"; 33 reg = <0>; 34 d-cache-line-size = <32>; 35 i-cache-line-size = <32>; 36 d-cache-size = <32768>; 37 i-cache-size = <32768>; 38 timebase-frequency = <0>; 39 bus-frequency = <0>; 40 clock-frequency = <0>; 41 }; 42 }; 43 44 memory { 45 device_type = "memory"; 46 reg = <0x00000000 0x10000000>; // 256MB at 0 47 }; 48 49 localbus@e0005000 { 50 #address-cells = <2>; 51 #size-cells = <1>; 52 compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus"; 53 reg = <0xe0005000 0x1000>; 54 interrupts = <77 8>; 55 interrupt-parent = <&ipic>; 56 57 // CS0 and CS1 are swapped when 58 // booting from nand, but the 59 // addresses are the same. 60 ranges = <0 0 0xfe000000 0x00800000 61 1 0 0xe0600000 0x00008000 62 2 0 0xf0000000 0x00020000 63 3 0 0xfa000000 0x00008000>; 64 65 flash@0,0 { 66 #address-cells = <1>; 67 #size-cells = <1>; 68 compatible = "cfi-flash"; 69 reg = <0 0 0x800000>; 70 bank-width = <2>; 71 device-width = <1>; 72 }; 73 74 nand@1,0 { 75 #address-cells = <1>; 76 #size-cells = <1>; 77 compatible = "fsl,mpc8378-fcm-nand", 78 "fsl,elbc-fcm-nand"; 79 reg = <1 0 0x8000>; 80 81 u-boot@0 { 82 reg = <0x0 0x100000>; 83 read-only; 84 }; 85 86 kernel@100000 { 87 reg = <0x100000 0x300000>; 88 }; 89 fs@400000 { 90 reg = <0x400000 0x1c00000>; 91 }; 92 }; 93 }; 94 95 immr@e0000000 { 96 #address-cells = <1>; 97 #size-cells = <1>; 98 device_type = "soc"; 99 compatible = "simple-bus"; 100 ranges = <0 0xe0000000 0x00100000>; 101 reg = <0xe0000000 0x00000200>; 102 bus-frequency = <0>; 103 104 wdt@200 { 105 device_type = "watchdog"; 106 compatible = "mpc83xx_wdt"; 107 reg = <0x200 0x100>; 108 }; 109 110 i2c@3000 { 111 #address-cells = <1>; 112 #size-cells = <0>; 113 cell-index = <0>; 114 compatible = "fsl-i2c"; 115 reg = <0x3000 0x100>; 116 interrupts = <14 8>; 117 interrupt-parent = < &ipic >; 118 dfsrr; 119 rtc@68 { 120 device_type = "rtc"; 121 compatible = "dallas,ds1339"; 122 reg = <0x68>; 123 }; 124 }; 125 126 i2c@3100 { 127 #address-cells = <1>; 128 #size-cells = <0>; 129 cell-index = <1>; 130 compatible = "fsl-i2c"; 131 reg = <0x3100 0x100>; 132 interrupts = <15 8>; 133 interrupt-parent = < &ipic >; 134 dfsrr; 135 }; 136 137 spi@7000 { 138 cell-index = <0>; 139 compatible = "fsl,spi"; 140 reg = <0x7000 0x1000>; 141 interrupts = <16 8>; 142 interrupt-parent = < &ipic >; 143 mode = "cpu"; 144 }; 145 146 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 147 usb@23000 { 148 compatible = "fsl-usb2-dr"; 149 reg = <0x23000 0x1000>; 150 #address-cells = <1>; 151 #size-cells = <0>; 152 interrupt-parent = < &ipic >; 153 interrupts = <38 8>; 154 phy_type = "utmi"; 155 }; 156 157 mdio@24520 { 158 #address-cells = <1>; 159 #size-cells = <0>; 160 compatible = "fsl,gianfar-mdio"; 161 reg = <0x24520 0x20>; 162 phy2: ethernet-phy@2 { 163 interrupt-parent = < &ipic >; 164 interrupts = <17 8>; 165 reg = <2>; 166 device_type = "ethernet-phy"; 167 }; 168 phy3: ethernet-phy@3 { 169 interrupt-parent = < &ipic >; 170 interrupts = <18 8>; 171 reg = <3>; 172 device_type = "ethernet-phy"; 173 }; 174 }; 175 176 enet0: ethernet@24000 { 177 cell-index = <0>; 178 device_type = "network"; 179 model = "eTSEC"; 180 compatible = "gianfar"; 181 reg = <0x24000 0x1000>; 182 local-mac-address = [ 00 00 00 00 00 00 ]; 183 interrupts = <32 8 33 8 34 8>; 184 phy-connection-type = "mii"; 185 interrupt-parent = < &ipic >; 186 phy-handle = < &phy2 >; 187 }; 188 189 enet1: ethernet@25000 { 190 cell-index = <1>; 191 device_type = "network"; 192 model = "eTSEC"; 193 compatible = "gianfar"; 194 reg = <0x25000 0x1000>; 195 local-mac-address = [ 00 00 00 00 00 00 ]; 196 interrupts = <35 8 36 8 37 8>; 197 phy-connection-type = "mii"; 198 interrupt-parent = < &ipic >; 199 phy-handle = < &phy3 >; 200 }; 201 202 serial0: serial@4500 { 203 cell-index = <0>; 204 device_type = "serial"; 205 compatible = "ns16550"; 206 reg = <0x4500 0x100>; 207 clock-frequency = <0>; 208 interrupts = <9 8>; 209 interrupt-parent = < &ipic >; 210 }; 211 212 serial1: serial@4600 { 213 cell-index = <1>; 214 device_type = "serial"; 215 compatible = "ns16550"; 216 reg = <0x4600 0x100>; 217 clock-frequency = <0>; 218 interrupts = <10 8>; 219 interrupt-parent = < &ipic >; 220 }; 221 222 crypto@30000 { 223 model = "SEC3"; 224 device_type = "crypto"; 225 compatible = "talitos"; 226 reg = <0x30000 0x10000>; 227 interrupts = <11 8>; 228 interrupt-parent = < &ipic >; 229 /* Rev. 3.0 geometry */ 230 num-channels = <4>; 231 channel-fifo-len = <24>; 232 exec-units-mask = <0x000001fe>; 233 descriptor-types-mask = <0x03ab0ebf>; 234 }; 235 236 /* IPIC 237 * interrupts cell = <intr #, sense> 238 * sense values match linux IORESOURCE_IRQ_* defines: 239 * sense == 8: Level, low assertion 240 * sense == 2: Edge, high-to-low change 241 */ 242 ipic: interrupt-controller@700 { 243 compatible = "fsl,ipic"; 244 interrupt-controller; 245 #address-cells = <0>; 246 #interrupt-cells = <2>; 247 reg = <0x700 0x100>; 248 }; 249 }; 250 251 pci0: pci@e0008500 { 252 interrupt-map-mask = <0xf800 0 0 7>; 253 interrupt-map = < 254 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ 255 256 /* IDSEL AD14 IRQ6 inta */ 257 0x7000 0 0 1 &ipic 22 8 258 259 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ 260 0x7800 0 0 1 &ipic 21 8 261 0x7800 0 0 2 &ipic 22 8 262 0x7800 0 0 4 &ipic 23 8 263 264 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ 265 0xE000 0 0 1 &ipic 23 8 266 0xE000 0 0 2 &ipic 21 8 267 0xE000 0 0 3 &ipic 22 8>; 268 interrupt-parent = < &ipic >; 269 interrupts = <66 8>; 270 bus-range = <0 0>; 271 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 272 0x42000000 0 0x80000000 0x80000000 0 0x10000000 273 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>; 274 clock-frequency = <66666666>; 275 #interrupt-cells = <1>; 276 #size-cells = <2>; 277 #address-cells = <3>; 278 reg = <0xe0008500 0x100>; 279 compatible = "fsl,mpc8349-pci"; 280 device_type = "pci"; 281 }; 282}; 283