123dd1cbfSKim Phillips/* 223dd1cbfSKim Phillips * MPC8377E RDB Device Tree Source 323dd1cbfSKim Phillips * 423dd1cbfSKim Phillips * Copyright 2007, 2008 Freescale Semiconductor Inc. 523dd1cbfSKim Phillips * 623dd1cbfSKim Phillips * This program is free software; you can redistribute it and/or modify it 723dd1cbfSKim Phillips * under the terms of the GNU General Public License as published by the 823dd1cbfSKim Phillips * Free Software Foundation; either version 2 of the License, or (at your 923dd1cbfSKim Phillips * option) any later version. 1023dd1cbfSKim Phillips */ 1123dd1cbfSKim Phillips 1223dd1cbfSKim Phillips/dts-v1/; 1323dd1cbfSKim Phillips 1423dd1cbfSKim Phillips/ { 153b29dadeSKim Phillips compatible = "fsl,mpc8377rdb"; 1623dd1cbfSKim Phillips #address-cells = <1>; 1723dd1cbfSKim Phillips #size-cells = <1>; 1823dd1cbfSKim Phillips 1923dd1cbfSKim Phillips aliases { 2023dd1cbfSKim Phillips ethernet0 = &enet0; 2123dd1cbfSKim Phillips ethernet1 = &enet1; 2223dd1cbfSKim Phillips serial0 = &serial0; 2323dd1cbfSKim Phillips serial1 = &serial1; 2423dd1cbfSKim Phillips pci0 = &pci0; 250585a155SAnton Vorontsov pci1 = &pci1; 260585a155SAnton Vorontsov pci2 = &pci2; 2723dd1cbfSKim Phillips }; 2823dd1cbfSKim Phillips 2923dd1cbfSKim Phillips cpus { 3023dd1cbfSKim Phillips #address-cells = <1>; 3123dd1cbfSKim Phillips #size-cells = <0>; 3223dd1cbfSKim Phillips 3323dd1cbfSKim Phillips PowerPC,8377@0 { 3423dd1cbfSKim Phillips device_type = "cpu"; 35cda13dd1SPaul Gortmaker reg = <0x0>; 3623dd1cbfSKim Phillips d-cache-line-size = <32>; 3723dd1cbfSKim Phillips i-cache-line-size = <32>; 3823dd1cbfSKim Phillips d-cache-size = <32768>; 3923dd1cbfSKim Phillips i-cache-size = <32768>; 4023dd1cbfSKim Phillips timebase-frequency = <0>; 4123dd1cbfSKim Phillips bus-frequency = <0>; 4223dd1cbfSKim Phillips clock-frequency = <0>; 4323dd1cbfSKim Phillips }; 4423dd1cbfSKim Phillips }; 4523dd1cbfSKim Phillips 4623dd1cbfSKim Phillips memory { 4723dd1cbfSKim Phillips device_type = "memory"; 4823dd1cbfSKim Phillips reg = <0x00000000 0x10000000>; // 256MB at 0 4923dd1cbfSKim Phillips }; 5023dd1cbfSKim Phillips 5123dd1cbfSKim Phillips localbus@e0005000 { 5223dd1cbfSKim Phillips #address-cells = <2>; 5323dd1cbfSKim Phillips #size-cells = <1>; 5423dd1cbfSKim Phillips compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; 5523dd1cbfSKim Phillips reg = <0xe0005000 0x1000>; 56cda13dd1SPaul Gortmaker interrupts = <77 0x8>; 5723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 5823dd1cbfSKim Phillips 5923dd1cbfSKim Phillips // CS0 and CS1 are swapped when 6023dd1cbfSKim Phillips // booting from nand, but the 6123dd1cbfSKim Phillips // addresses are the same. 62cda13dd1SPaul Gortmaker ranges = <0x0 0x0 0xfe000000 0x00800000 63cda13dd1SPaul Gortmaker 0x1 0x0 0xe0600000 0x00008000 64cda13dd1SPaul Gortmaker 0x2 0x0 0xf0000000 0x00020000 65cda13dd1SPaul Gortmaker 0x3 0x0 0xfa000000 0x00008000>; 6623dd1cbfSKim Phillips 6723dd1cbfSKim Phillips flash@0,0 { 6823dd1cbfSKim Phillips #address-cells = <1>; 6923dd1cbfSKim Phillips #size-cells = <1>; 7023dd1cbfSKim Phillips compatible = "cfi-flash"; 71cda13dd1SPaul Gortmaker reg = <0x0 0x0 0x800000>; 7223dd1cbfSKim Phillips bank-width = <2>; 7323dd1cbfSKim Phillips device-width = <1>; 7423dd1cbfSKim Phillips }; 7523dd1cbfSKim Phillips 7623dd1cbfSKim Phillips nand@1,0 { 7723dd1cbfSKim Phillips #address-cells = <1>; 7823dd1cbfSKim Phillips #size-cells = <1>; 7923dd1cbfSKim Phillips compatible = "fsl,mpc8377-fcm-nand", 8023dd1cbfSKim Phillips "fsl,elbc-fcm-nand"; 81cda13dd1SPaul Gortmaker reg = <0x1 0x0 0x8000>; 8223dd1cbfSKim Phillips 8323dd1cbfSKim Phillips u-boot@0 { 8423dd1cbfSKim Phillips reg = <0x0 0x100000>; 8523dd1cbfSKim Phillips read-only; 8623dd1cbfSKim Phillips }; 8723dd1cbfSKim Phillips 8823dd1cbfSKim Phillips kernel@100000 { 8923dd1cbfSKim Phillips reg = <0x100000 0x300000>; 9023dd1cbfSKim Phillips }; 9123dd1cbfSKim Phillips fs@400000 { 9223dd1cbfSKim Phillips reg = <0x400000 0x1c00000>; 9323dd1cbfSKim Phillips }; 9423dd1cbfSKim Phillips }; 9523dd1cbfSKim Phillips }; 9623dd1cbfSKim Phillips 9723dd1cbfSKim Phillips immr@e0000000 { 9823dd1cbfSKim Phillips #address-cells = <1>; 9923dd1cbfSKim Phillips #size-cells = <1>; 10023dd1cbfSKim Phillips device_type = "soc"; 10123dd1cbfSKim Phillips compatible = "simple-bus"; 102cda13dd1SPaul Gortmaker ranges = <0x0 0xe0000000 0x00100000>; 10323dd1cbfSKim Phillips reg = <0xe0000000 0x00000200>; 10423dd1cbfSKim Phillips bus-frequency = <0>; 10523dd1cbfSKim Phillips 10623dd1cbfSKim Phillips wdt@200 { 10723dd1cbfSKim Phillips device_type = "watchdog"; 10823dd1cbfSKim Phillips compatible = "mpc83xx_wdt"; 10923dd1cbfSKim Phillips reg = <0x200 0x100>; 11023dd1cbfSKim Phillips }; 11123dd1cbfSKim Phillips 11223dd1cbfSKim Phillips i2c@3000 { 11323dd1cbfSKim Phillips #address-cells = <1>; 11423dd1cbfSKim Phillips #size-cells = <0>; 11523dd1cbfSKim Phillips cell-index = <0>; 11623dd1cbfSKim Phillips compatible = "fsl-i2c"; 11723dd1cbfSKim Phillips reg = <0x3000 0x100>; 118cda13dd1SPaul Gortmaker interrupts = <14 0x8>; 11923dd1cbfSKim Phillips interrupt-parent = <&ipic>; 12023dd1cbfSKim Phillips dfsrr; 121f7a0be45SReynes Philippe 122f7a0be45SReynes Philippe at24@50 { 123f7a0be45SReynes Philippe compatible = "at24,24c256"; 124f7a0be45SReynes Philippe reg = <0x50>; 125f7a0be45SReynes Philippe }; 126f7a0be45SReynes Philippe 12723dd1cbfSKim Phillips rtc@68 { 12823dd1cbfSKim Phillips compatible = "dallas,ds1339"; 12923dd1cbfSKim Phillips reg = <0x68>; 13023dd1cbfSKim Phillips }; 13144274698SAnton Vorontsov 13244274698SAnton Vorontsov mcu_pio: mcu@a { 13344274698SAnton Vorontsov #gpio-cells = <2>; 13444274698SAnton Vorontsov compatible = "fsl,mc9s08qg8-mpc8377erdb", 13544274698SAnton Vorontsov "fsl,mcu-mpc8349emitx"; 13644274698SAnton Vorontsov reg = <0x0a>; 13744274698SAnton Vorontsov gpio-controller; 13844274698SAnton Vorontsov }; 13923dd1cbfSKim Phillips }; 14023dd1cbfSKim Phillips 14123dd1cbfSKim Phillips i2c@3100 { 14223dd1cbfSKim Phillips #address-cells = <1>; 14323dd1cbfSKim Phillips #size-cells = <0>; 14423dd1cbfSKim Phillips cell-index = <1>; 14523dd1cbfSKim Phillips compatible = "fsl-i2c"; 14623dd1cbfSKim Phillips reg = <0x3100 0x100>; 147cda13dd1SPaul Gortmaker interrupts = <15 0x8>; 14823dd1cbfSKim Phillips interrupt-parent = <&ipic>; 14923dd1cbfSKim Phillips dfsrr; 15023dd1cbfSKim Phillips }; 15123dd1cbfSKim Phillips 15223dd1cbfSKim Phillips spi@7000 { 15323dd1cbfSKim Phillips cell-index = <0>; 15423dd1cbfSKim Phillips compatible = "fsl,spi"; 15523dd1cbfSKim Phillips reg = <0x7000 0x1000>; 156cda13dd1SPaul Gortmaker interrupts = <16 0x8>; 15723dd1cbfSKim Phillips interrupt-parent = <&ipic>; 15823dd1cbfSKim Phillips mode = "cpu"; 15923dd1cbfSKim Phillips }; 16023dd1cbfSKim Phillips 161dee80553SKumar Gala dma@82a8 { 162dee80553SKumar Gala #address-cells = <1>; 163dee80553SKumar Gala #size-cells = <1>; 164dee80553SKumar Gala compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; 165dee80553SKumar Gala reg = <0x82a8 4>; 166dee80553SKumar Gala ranges = <0 0x8100 0x1a8>; 167dee80553SKumar Gala interrupt-parent = <&ipic>; 168dee80553SKumar Gala interrupts = <71 8>; 169dee80553SKumar Gala cell-index = <0>; 170dee80553SKumar Gala dma-channel@0 { 171dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 172dee80553SKumar Gala reg = <0 0x80>; 173aeb42762SKumar Gala cell-index = <0>; 174dee80553SKumar Gala interrupt-parent = <&ipic>; 175dee80553SKumar Gala interrupts = <71 8>; 176dee80553SKumar Gala }; 177dee80553SKumar Gala dma-channel@80 { 178dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 179dee80553SKumar Gala reg = <0x80 0x80>; 180aeb42762SKumar Gala cell-index = <1>; 181dee80553SKumar Gala interrupt-parent = <&ipic>; 182dee80553SKumar Gala interrupts = <71 8>; 183dee80553SKumar Gala }; 184dee80553SKumar Gala dma-channel@100 { 185dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 186dee80553SKumar Gala reg = <0x100 0x80>; 187aeb42762SKumar Gala cell-index = <2>; 188dee80553SKumar Gala interrupt-parent = <&ipic>; 189dee80553SKumar Gala interrupts = <71 8>; 190dee80553SKumar Gala }; 191dee80553SKumar Gala dma-channel@180 { 192dee80553SKumar Gala compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 193dee80553SKumar Gala reg = <0x180 0x28>; 194aeb42762SKumar Gala cell-index = <3>; 195dee80553SKumar Gala interrupt-parent = <&ipic>; 196dee80553SKumar Gala interrupts = <71 8>; 197dee80553SKumar Gala }; 198dee80553SKumar Gala }; 199dee80553SKumar Gala 20023dd1cbfSKim Phillips usb@23000 { 20123dd1cbfSKim Phillips compatible = "fsl-usb2-dr"; 20223dd1cbfSKim Phillips reg = <0x23000 0x1000>; 20323dd1cbfSKim Phillips #address-cells = <1>; 20423dd1cbfSKim Phillips #size-cells = <0>; 20523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 206cda13dd1SPaul Gortmaker interrupts = <38 0x8>; 2078e8ff3a3SAnton Vorontsov phy_type = "ulpi"; 20823dd1cbfSKim Phillips }; 20923dd1cbfSKim Phillips 21023dd1cbfSKim Phillips mdio@24520 { 21123dd1cbfSKim Phillips #address-cells = <1>; 21223dd1cbfSKim Phillips #size-cells = <0>; 21323dd1cbfSKim Phillips compatible = "fsl,gianfar-mdio"; 21423dd1cbfSKim Phillips reg = <0x24520 0x20>; 21523dd1cbfSKim Phillips phy2: ethernet-phy@2 { 21623dd1cbfSKim Phillips interrupt-parent = <&ipic>; 217cda13dd1SPaul Gortmaker interrupts = <17 0x8>; 218cda13dd1SPaul Gortmaker reg = <0x2>; 21923dd1cbfSKim Phillips device_type = "ethernet-phy"; 22023dd1cbfSKim Phillips }; 221b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 222b31a1d8bSAndy Fleming reg = <0x11>; 223b31a1d8bSAndy Fleming device_type = "tbi-phy"; 22423dd1cbfSKim Phillips }; 225b31a1d8bSAndy Fleming }; 226b31a1d8bSAndy Fleming 227b31a1d8bSAndy Fleming mdio@25520 { 228b31a1d8bSAndy Fleming #address-cells = <1>; 229b31a1d8bSAndy Fleming #size-cells = <0>; 230b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 231b31a1d8bSAndy Fleming reg = <0x25520 0x20>; 232b31a1d8bSAndy Fleming 233b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 234b31a1d8bSAndy Fleming reg = <0x11>; 235b31a1d8bSAndy Fleming device_type = "tbi-phy"; 236b31a1d8bSAndy Fleming }; 237b31a1d8bSAndy Fleming }; 238b31a1d8bSAndy Fleming 23923dd1cbfSKim Phillips 24023dd1cbfSKim Phillips enet0: ethernet@24000 { 24123dd1cbfSKim Phillips cell-index = <0>; 24223dd1cbfSKim Phillips device_type = "network"; 24323dd1cbfSKim Phillips model = "eTSEC"; 24423dd1cbfSKim Phillips compatible = "gianfar"; 24523dd1cbfSKim Phillips reg = <0x24000 0x1000>; 24623dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 247cda13dd1SPaul Gortmaker interrupts = <32 0x8 33 0x8 34 0x8>; 24823dd1cbfSKim Phillips phy-connection-type = "mii"; 24923dd1cbfSKim Phillips interrupt-parent = <&ipic>; 250b31a1d8bSAndy Fleming tbi-handle = <&tbi0>; 25123dd1cbfSKim Phillips phy-handle = <&phy2>; 25223dd1cbfSKim Phillips }; 25323dd1cbfSKim Phillips 25423dd1cbfSKim Phillips enet1: ethernet@25000 { 25523dd1cbfSKim Phillips cell-index = <1>; 25623dd1cbfSKim Phillips device_type = "network"; 25723dd1cbfSKim Phillips model = "eTSEC"; 25823dd1cbfSKim Phillips compatible = "gianfar"; 25923dd1cbfSKim Phillips reg = <0x25000 0x1000>; 26023dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 261cda13dd1SPaul Gortmaker interrupts = <35 0x8 36 0x8 37 0x8>; 26223dd1cbfSKim Phillips phy-connection-type = "mii"; 26323dd1cbfSKim Phillips interrupt-parent = <&ipic>; 264f17c6323SAnton Vorontsov fixed-link = <1 1 1000 0 0>; 265b31a1d8bSAndy Fleming tbi-handle = <&tbi1>; 26623dd1cbfSKim Phillips }; 26723dd1cbfSKim Phillips 26823dd1cbfSKim Phillips serial0: serial@4500 { 26923dd1cbfSKim Phillips cell-index = <0>; 27023dd1cbfSKim Phillips device_type = "serial"; 27123dd1cbfSKim Phillips compatible = "ns16550"; 27223dd1cbfSKim Phillips reg = <0x4500 0x100>; 27323dd1cbfSKim Phillips clock-frequency = <0>; 274cda13dd1SPaul Gortmaker interrupts = <9 0x8>; 27523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 27623dd1cbfSKim Phillips }; 27723dd1cbfSKim Phillips 27823dd1cbfSKim Phillips serial1: serial@4600 { 27923dd1cbfSKim Phillips cell-index = <1>; 28023dd1cbfSKim Phillips device_type = "serial"; 28123dd1cbfSKim Phillips compatible = "ns16550"; 28223dd1cbfSKim Phillips reg = <0x4600 0x100>; 28323dd1cbfSKim Phillips clock-frequency = <0>; 284cda13dd1SPaul Gortmaker interrupts = <10 0x8>; 28523dd1cbfSKim Phillips interrupt-parent = <&ipic>; 28623dd1cbfSKim Phillips }; 28723dd1cbfSKim Phillips 28823dd1cbfSKim Phillips crypto@30000 { 2893fd44736SKim Phillips compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", 2903fd44736SKim Phillips "fsl,sec2.1", "fsl,sec2.0"; 29123dd1cbfSKim Phillips reg = <0x30000 0x10000>; 292cda13dd1SPaul Gortmaker interrupts = <11 0x8>; 29323dd1cbfSKim Phillips interrupt-parent = <&ipic>; 2943fd44736SKim Phillips fsl,num-channels = <4>; 2953fd44736SKim Phillips fsl,channel-fifo-len = <24>; 2963fd44736SKim Phillips fsl,exec-units-mask = <0x9fe>; 2973fd44736SKim Phillips fsl,descriptor-types-mask = <0x3ab0ebf>; 29823dd1cbfSKim Phillips }; 29923dd1cbfSKim Phillips 30023dd1cbfSKim Phillips sata@18000 { 30123dd1cbfSKim Phillips compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 30223dd1cbfSKim Phillips reg = <0x18000 0x1000>; 303cda13dd1SPaul Gortmaker interrupts = <44 0x8>; 30423dd1cbfSKim Phillips interrupt-parent = <&ipic>; 30523dd1cbfSKim Phillips }; 30623dd1cbfSKim Phillips 30723dd1cbfSKim Phillips sata@19000 { 30823dd1cbfSKim Phillips compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 30923dd1cbfSKim Phillips reg = <0x19000 0x1000>; 310cda13dd1SPaul Gortmaker interrupts = <45 0x8>; 31123dd1cbfSKim Phillips interrupt-parent = <&ipic>; 31223dd1cbfSKim Phillips }; 31323dd1cbfSKim Phillips 31423dd1cbfSKim Phillips /* IPIC 31523dd1cbfSKim Phillips * interrupts cell = <intr #, sense> 31623dd1cbfSKim Phillips * sense values match linux IORESOURCE_IRQ_* defines: 31723dd1cbfSKim Phillips * sense == 8: Level, low assertion 31823dd1cbfSKim Phillips * sense == 2: Edge, high-to-low change 31923dd1cbfSKim Phillips */ 32023dd1cbfSKim Phillips ipic: interrupt-controller@700 { 32123dd1cbfSKim Phillips compatible = "fsl,ipic"; 32223dd1cbfSKim Phillips interrupt-controller; 32323dd1cbfSKim Phillips #address-cells = <0>; 32423dd1cbfSKim Phillips #interrupt-cells = <2>; 32523dd1cbfSKim Phillips reg = <0x700 0x100>; 32623dd1cbfSKim Phillips }; 32723dd1cbfSKim Phillips }; 32823dd1cbfSKim Phillips 32923dd1cbfSKim Phillips pci0: pci@e0008500 { 33023dd1cbfSKim Phillips interrupt-map-mask = <0xf800 0 0 7>; 33123dd1cbfSKim Phillips interrupt-map = < 33223dd1cbfSKim Phillips /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ 33323dd1cbfSKim Phillips 33423dd1cbfSKim Phillips /* IDSEL AD14 IRQ6 inta */ 335cda13dd1SPaul Gortmaker 0x7000 0x0 0x0 0x1 &ipic 22 0x8 33623dd1cbfSKim Phillips 33723dd1cbfSKim Phillips /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ 338cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x1 &ipic 21 0x8 339cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x2 &ipic 22 0x8 340cda13dd1SPaul Gortmaker 0x7800 0x0 0x0 0x4 &ipic 23 0x8 34123dd1cbfSKim Phillips 34223dd1cbfSKim Phillips /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ 343cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x1 &ipic 23 0x8 344cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x2 &ipic 21 0x8 345cda13dd1SPaul Gortmaker 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; 34623dd1cbfSKim Phillips interrupt-parent = <&ipic>; 347cda13dd1SPaul Gortmaker interrupts = <66 0x8>; 34823dd1cbfSKim Phillips bus-range = <0 0>; 349cda13dd1SPaul Gortmaker ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 350cda13dd1SPaul Gortmaker 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 351cda13dd1SPaul Gortmaker 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 35223dd1cbfSKim Phillips clock-frequency = <66666666>; 35323dd1cbfSKim Phillips #interrupt-cells = <1>; 35423dd1cbfSKim Phillips #size-cells = <2>; 35523dd1cbfSKim Phillips #address-cells = <3>; 3565b70a097SJohn Rigby reg = <0xe0008500 0x100 /* internal registers */ 3575b70a097SJohn Rigby 0xe0008300 0x8>; /* config space access registers */ 35823dd1cbfSKim Phillips compatible = "fsl,mpc8349-pci"; 35923dd1cbfSKim Phillips device_type = "pci"; 36023dd1cbfSKim Phillips }; 3610585a155SAnton Vorontsov 3620585a155SAnton Vorontsov pci1: pcie@e0009000 { 3630585a155SAnton Vorontsov #address-cells = <3>; 3640585a155SAnton Vorontsov #size-cells = <2>; 3650585a155SAnton Vorontsov #interrupt-cells = <1>; 3660585a155SAnton Vorontsov device_type = "pci"; 3670585a155SAnton Vorontsov compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; 3680585a155SAnton Vorontsov reg = <0xe0009000 0x00001000>; 3690585a155SAnton Vorontsov ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 3700585a155SAnton Vorontsov 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; 3710585a155SAnton Vorontsov bus-range = <0 255>; 3720585a155SAnton Vorontsov interrupt-map-mask = <0xf800 0 0 7>; 3730585a155SAnton Vorontsov interrupt-map = <0 0 0 1 &ipic 1 8 3740585a155SAnton Vorontsov 0 0 0 2 &ipic 1 8 3750585a155SAnton Vorontsov 0 0 0 3 &ipic 1 8 3760585a155SAnton Vorontsov 0 0 0 4 &ipic 1 8>; 3770585a155SAnton Vorontsov clock-frequency = <0>; 3780585a155SAnton Vorontsov 3790585a155SAnton Vorontsov pcie@0 { 3800585a155SAnton Vorontsov #address-cells = <3>; 3810585a155SAnton Vorontsov #size-cells = <2>; 3820585a155SAnton Vorontsov device_type = "pci"; 3830585a155SAnton Vorontsov reg = <0 0 0 0 0>; 3840585a155SAnton Vorontsov ranges = <0x02000000 0 0xa8000000 3850585a155SAnton Vorontsov 0x02000000 0 0xa8000000 3860585a155SAnton Vorontsov 0 0x10000000 3870585a155SAnton Vorontsov 0x01000000 0 0x00000000 3880585a155SAnton Vorontsov 0x01000000 0 0x00000000 3890585a155SAnton Vorontsov 0 0x00800000>; 3900585a155SAnton Vorontsov }; 3910585a155SAnton Vorontsov }; 3920585a155SAnton Vorontsov 3930585a155SAnton Vorontsov pci2: pcie@e000a000 { 3940585a155SAnton Vorontsov #address-cells = <3>; 3950585a155SAnton Vorontsov #size-cells = <2>; 3960585a155SAnton Vorontsov #interrupt-cells = <1>; 3970585a155SAnton Vorontsov device_type = "pci"; 3980585a155SAnton Vorontsov compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; 3990585a155SAnton Vorontsov reg = <0xe000a000 0x00001000>; 4000585a155SAnton Vorontsov ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 4010585a155SAnton Vorontsov 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; 4020585a155SAnton Vorontsov bus-range = <0 255>; 4030585a155SAnton Vorontsov interrupt-map-mask = <0xf800 0 0 7>; 4040585a155SAnton Vorontsov interrupt-map = <0 0 0 1 &ipic 2 8 4050585a155SAnton Vorontsov 0 0 0 2 &ipic 2 8 4060585a155SAnton Vorontsov 0 0 0 3 &ipic 2 8 4070585a155SAnton Vorontsov 0 0 0 4 &ipic 2 8>; 4080585a155SAnton Vorontsov clock-frequency = <0>; 4090585a155SAnton Vorontsov 4100585a155SAnton Vorontsov pcie@0 { 4110585a155SAnton Vorontsov #address-cells = <3>; 4120585a155SAnton Vorontsov #size-cells = <2>; 4130585a155SAnton Vorontsov device_type = "pci"; 4140585a155SAnton Vorontsov reg = <0 0 0 0 0>; 4150585a155SAnton Vorontsov ranges = <0x02000000 0 0xc8000000 4160585a155SAnton Vorontsov 0x02000000 0 0xc8000000 4170585a155SAnton Vorontsov 0 0x10000000 4180585a155SAnton Vorontsov 0x01000000 0 0x00000000 4190585a155SAnton Vorontsov 0x01000000 0 0x00000000 4200585a155SAnton Vorontsov 0 0x00800000>; 4210585a155SAnton Vorontsov }; 4220585a155SAnton Vorontsov }; 42323dd1cbfSKim Phillips}; 424